DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b ) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the appl icant regards as his invention. Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 2 recites the limitation "the further micro LED" in line 2. There is insufficient antecedent basis for this limitation in the claim. Parent claim 1 also does not describe a further micro LED. Claim 7 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 7 recites the limitation "the further micro LED" in line 2. There is insufficient antecedent basis for this limitation in the claim. Parent claim 1 also does not describe a further micro LED. Claim 7 recites the limitation "the repulsion" in line s 2- 3. There is insufficient antecedent basis for this limitation in the claim. Parent claim 1 also does not describe a repulsion. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale , or otherwise available to the public before the effective filing date of the claimed invention. Claim s 1-3, 5, 8, 9, 19, and 20 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Ko et al. ( KR 20200053726 A , hereinafter “Ko”) . In reference to claim 1, Ko discloses a method which meets the claim. Fig. 1- 3b and 6a -13 of Ko disclose a method for aligning micro LEDs (ED) which compris es (a) disposing a first electrode layer (E1) and a second electrode layer (E2) spaced apart from each other on a substrate (BL1). An insulating layer (L6-B) is disposed on the substrate (BL1) where the first electrode layer (E1) and the second electrode layer (E2) are disposed . A groove is disposed in the insulating layer (L6-B) corresponding to an area between the first electrode layer (E1) and the second electrode layer (E2). A n electric signal (V1, V2) is applied to the first electrode layer (E1) and the second electrode layer (E2) while supplying a solution (30) containing the micro LEDs (ED) onto the substrate (BL1) , which generat es an electric field with a non-uniform magnitude to align the micro LED (ED) in the groove, wherein one micro LED (ED) is aligned in one groove (p. 13 of machine translation) . So far as understood in claim 2, fig. 3b shows that a spacing between the one micro LED (ED) and a further micro LED ( not shown in figure but understood to be formed directly in a pixel to the left or right of the single pixel shown in fig. 3b ) is greater than a diameter of the micro LED (ED). In reference to claim 3, the method includes further aligning at least one micro LED (ED) between one groove and a further groove adjacent to it . With regard to claim 5, Ko discloses (p. 10 of the machine translation) a length of the groove (A3) is greater than a length of the micro LED (ED) . In reference to claim 8, fig. 7a of Ko shows that a magnitude of the electric field in the groove is greater than a magnitude of the electric field in an area other than the groove (no electric field outside of the groove) . With regard to claim 9, the first electrode layer (E1) and the second electrode layer (E2) located in the groove area are arranged to protrude toward each other. In reference to claim 19, Ko discloses a method which meets the claim. Fig. 1-3b and 6a-13 of Ko disclose a method for manufacturing a micro LED display which comprises disposing a transistor (TR1, TR2) in each of a plurality of pixel areas defined as data lines ( DLj ) and gate lines ( SLi ) that intersect each other on a substrate (BL1). A first electrode layer (E1) and a second electrode layer (E2) are disposed and spaced apart from each other in each of the plurality of pixel areas. An insulating layer (L6-B) is disposed on the substrate (BL1) where the first electrode layer (E1) and the second electrode layer (E2) are disposed . A groove is defined in a portion of the insulating layer (L6-B) corresponding to an area between the first electrode layer (E1) and the second electrode layer (E2). A n electric signal (V1, V2) is applied to the first electrode layer (E1) and the second electrode layer (E2) while supplying a solution (30) containing the micro LEDs (ED) onto the substrate (BL1) which generat es an electric field with a non-uniform magnitude to align the micro LED (ED) in the groove, such that one micro LED (ED) is aligned in one groove and is disposed in each pixel area (p. 13 of machine translation) . With regard to claim 20, Ko discloses that for each of the plurality of pixel areas, an electric signal is applied to a first electrode layer (E1) and a second electrode layer (E2) connected to a red pixel (p. 8 of the machine translation) while supplying a solution containing red micro LEDs (ED) among a plurality of micro LEDs (ED) to arrange the plurality of red micro LEDs (ED) at a regular spacing . Ko also discloses applying an electric signal to a first electrode layer (E1) and a second electrode layer (E2) connected to a green pixel (p. 8 of the machine translation) while supplying a solution containing green micro LEDs (ED) among the plurality of micro LEDs (ED) to arrange the plurality of green micro LEDs (ED) at a regular spacing . Furthermore Ko also discloses applying an electric signal to a first electrode layer (E1) and a second electrode layer (E1) connected to a blue pixel (p. 8 of the machine translation) while supplying a solution containing blue micro LEDs (ED) among the plurality of micro LEDs to arrange the plurality of blue micro LEDs at a regular spacing. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Ko in view of Ju (United States Patent Application Publication No. US 2019 / 0180661 A1 , hereinafter “Ju”) . In reference to claim 4, Ko does not disclose the specific concentration of micro LEDs in the solution as that claimed by the applicant. However Ju discloses optimizing the concentration of micro LEDs in the solution in order to maximize the amount of micro LEDS that are aligned or mounted on a receiving substrate (p. 4, paragraph 56). Thus Ju makes it clear that the concentration of micro LEDs is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the concentration of micro LEDs in the solution , since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 4 is not patentable over Ko and Ju. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Ko in view of Negishi et al. (United States Patent Application Publication No. US 201 3/ 0 027623 A1 , hereinafter “ Negishi ”) . So far as understood in claim 7, fig. 3a, 3b, and 6a-13 of Ko show that a width of the groove is smaller than the spacing between the one micro LED (ED) and the further adjacent micro LED ( not shown in figures but understood to be formed directly in a pixel to the left or right of the single pixel shown in fig. 3b ) and that an electric field is generated in the first electrode layer (E1) and the second electrode layer (E2). Ko discloses a further adjacent micro LED (not shown in figures but understood to be formed directly in a pixel to the left or right of the single pixel shown in fig. 3b). Ko does not explicitly disclose using repulsion between one micro LED (ED) and a further adjacent micro LED to align the plurality of micro LED s (ED) when an electric field is generated in the first electrode layer (E1) and the second electrode layer (E2 ) . However fig. 48 of Negishi discloses (p. 26, paragraph 595) the use of an electrostatic or a dielectrophoretic repulsive force , from an electric field generated in a first electrode layer (1074) and a second electrode layer (1073) , between one micro LED (ED) and a further adjacent micro LED in order to align or mount LEDs (1070) on a receiving substrate (1075) in a one-time process which has the benefit of a reduced manufacturing cost (p. 27, paragraph 600). In view of the above, it would therefore be obvious to use an electrostatic or a dielectrophoretic repulsive force between one micro LED (ED) and a further adjacent micro LED in order to align or mount LEDs in the method of Ko. Claim s 10 -12, 14, 16-18, 21, and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Ko in view of Negishi . In reference to claim 10, Ko discloses a similar method. Fig. 1- 3b and 6a-13 of Ko disclose a method for aligning micro LEDs (ED) which compris es (a) disposing a first electrode layer (E1) and a second electrode layer (E2) spaced apart from each other on a substrate (BL1). An insulating layer (L6-B) is disposed on the substrate (BL1) where the first electrode layer (E1) and the second electrode layer (E2) are disposed . A plurality of groove s are defined in the insulating layer (L6-B) at a regular spacing in a portion of the insulating layer (L6-B) corresponding to an area between the first electrode layer (E1) and the second electrode layer (E2). A n electric signal (V1, V2) is generated in the first electrode layer (E1) and the second electrode layer (E2) while supplying a solution (30) containing the plurality of micro LEDs (ED) onto the substrate (BL1) to align the plurality of micro LED s (ED) at a regular spacing to align o ne micro LED (ED) in one groove (p. 13 of machine translation) . Ko discloses a further adjacent micro LED (not shown in figures but understood to be formed directly in a pixel to the left or right of the single pixel shown in fig. 3b). Ko does not explicitly disclose using a repulsion between one micro LED (ED) and a further adjacent micro LED to align the plurality of micro LED s (ED) at a regular spacing . However fig. 48 of Negishi discloses (p. 26, paragraph 595) the use of an electrostatic or a dielectrophoretic repulsive force, from an electric field generated in a first electrode layer (1074) and a second electrode layer (1073), between one micro LED (ED) and a further adjacent micro LED in order to align or mount LEDs (1070) on a receiving substrate (1075) in a one-time process which has the benefit of a reduced manufacturing cost (p. 27, paragraph 600). In view of the above, it would therefore be obvious to use an electrostatic or a dielectrophoretic repulsive force between one micro LED (ED) and a further adjacent micro LED in order to align or mount LEDs in the method of Ko. With regard to claim 11, fig. 3b shows that a spacing between the one micro LED (ED) and the further micro LED (not shown in figure but understood to be formed directly in a pixel to the left or right of the single pixel shown in fig. 3b) is greater than a diameter of the micro LED (ED). In reference to claim 12, the method includes further aligning at least one micro LED (ED) between one groove and a further groove adjacent to it . With regard to claim 14, Ko discloses (p. 10 of the machine translation) a length of the groove (A3) is greater than a length of the micro LED (ED) . In reference to claim 16, in the method Ko constructed in view of Negishi , a width of the groove is smaller than the spacing between the one micro LED (ED) and the further adjacent micro LED when the repulsion occurs between the plurality of micro LEDs (ED) as the electric field is generated in the first electrode layer (E1) and the second electrode layer (E2) . In reference to claim 17, a magnitude of the electric field in the groove is greater than a magnitude of the electric field in an area other than the groove. With regard to claim 18, the first electrode layer (E1) and the second electrode layer (E2) located in the groove area are arranged to protrude toward each other. In reference to claim 21, Ko discloses a similar method. Fig. 1-3b and 6a-13 of Ko disclose a method for manufacturing a micro LED display which comprises disposing a transistor (TR1, TR2) in each of a plurality of pixel areas defined as data lines ( DLj ) and gate lines ( SLi ) that intersect each other on a substrate (BL1). A first electrode layer (E1) and a second electrode layer (E2) are disposed and spaced apart from each other in each of the plurality of pixel areas. An insulating layer (L6-B) is disposed on the substrate (BL1) where the first electrode layer (E1) and the second electrode layer (E2) are disposed . A plurality of groove s at a regular spacing are defined in a portion of the insulating layer (L6-B) corresponding to an area between the first electrode layer (E1) and the second electrode layer (E2). A n electric field is generat ed in the first electrode layer (E1) and the second electrode layer (E2) while supplying a solution (30) containing the micro LEDs (ED) onto the substrate (BL1) which aligns the plurality of micro LEDs at a regular spacing such that one micro LED (ED) is aligned in one groove and is disposed in each pixel area (p. 13 of machine translation) . Ko discloses a further adjacent micro LED (not shown in figures but understood to be formed directly in a pixel to the left or right of the single pixel shown in fig. 3b). Ko does not explicitly disclose using a repulsion between one micro LED (ED) and a further adjacent micro LED to align the plurality of micro LED s (ED) at a regular spacing . However fig. 48 of Negishi discloses (p. 26, paragraph 595) the use of an electrostatic or a dielectrophoretic repulsive force, from an electric field generated in a first electrode layer (1074) and a second electrode layer (1073), between one micro LED (ED) and a further adjacent micro LED in order to align or mount LEDs (1070) on a receiving substrate (1075) in a one-time process which has the benefit of a reduced manufacturing cost (p. 27, paragraph 600). In view of the above, it would therefore be obvious to use an electrostatic or a dielectrophoretic repulsive force between one micro LED (ED) and a further adjacent micro LED in order to align or mount LEDs in the method of Ko. With regard to claim 22, Ko discloses that for each of the plurality of pixel areas, applying an electric signal to a first electrode layer (E1) and a second electrode layer (E2) connected to a red pixel (p. 8 of the machine translation) while supplying a solution containing red micro LEDs (ED) among a plurality of micro LEDs (ED) to arrange the plurality of red micro LEDs (ED) at a regular spacing . Ko discloses applying an electric signal to a first electrode layer (E1) and a second electrode layer (E2) connected to a green pixel (p. 8 of the machine translation) while supplying a solution containing green micro LEDs (ED) among the plurality of micro LEDs (ED) to arrange the plurality of green micro LEDs (ED) at a regular spacing . Ko also discloses applying an electric signal to a first electrode layer (E1) and a second electrode layer (E1) connected to a blue pixel (p. 8 of the machine translation) while supplying a solution containing blue micro LEDs (ED) among the plurality of micro LEDs to arrange the plurality of blue micro LEDs at a regular spacing. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Ko in view of Negishi as applied to claim 10 above and further in view of Ju . In reference to claim 13 , Ko does not disclose the specific concentration of micro LEDs in the solution as that claimed by the applicant. However Ju discloses optimizing the concentration of micro LEDs in the solution in order to maximize the amount of micro LEDS that are aligned or mounted on a receiving substrate (p. 4, paragraph 56). Thus Ju makes it clear that the concentration of micro LEDs is a result effective variable. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to adjust the concentration of micro LEDs in the solution , since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch , 617 F.2d 272, 205 USPQ 215 (CCPA 1980). Therefore claim 13 is not patentable over Ko and Ju. Allowable Subject Matter Claim s 6 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: in the examiner’s opinion, it would not be obvious to implement a method for aligning micro LEDs which compris es disposing a first electrode layer and a second electrode layer spaced apart from each other on a substrate , disposing an insulating layer on the substrate where the first and second electrode layer s are disposed , defining a groove in the insulating layer that correspond s to an area between the first and second electrode layer s, applying an electric signal to the first and second electrode layer s while supplying a solution containing the micro LEDs onto the substrate, generating an electric field with a non-uniform magnitude to align the micro LED in the groove such that one micro LED is aligned in one groove in combination with the specific groove structure as required by the applicant in claim 6. In the examiner’s opinion, it would also not be obvious to implement a method for aligning micro LEDs which compris es disposing a first electrode layer and a second electrode layer spaced apart from each other on a substrate , disposing an insulating layer on the substrate where the first and second electrode layer s are disposed , defining a plurality of groove s at a regular spacing in a portion of the insulating layer that correspond s to an area between the first and second electrode layer s, generating an electric field in the first and second electrode layer s while supplying a solution containing the micro LEDs onto the substrate to align the plurality of micro LED s at a regular spacing by a repulsion occurring between one micro LED and a further adjacent micro LED such that one micro LED is aligned in one groove in combination with the specific groove structure as required by the applicant in claim 15. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to FILLIN "Examiner name" \* MERGEFORMAT KEVIN QUINTO whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-1920 . The examiner can normally be reached FILLIN "Work Schedule?" \* MERGEFORMAT Monday-Friday, 9-5:30 . Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, FILLIN "SPE Name?" \* MERGEFORMAT Britt Hanley can be reached at FILLIN "SPE Phone?" \* MERGEFORMAT 571-270-3042 . The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KEVIN QUINTO/ Examiner, Art Unit 2893 /Britt Hanley/ Supervisory Patent Examiner, Art Unit 2893