CTNF 18/516,473 CTNF 78897 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 112 07-30-01 AIA The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claim 10 is rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The limitation “the one or more first metal layers is in direct contact with a surface of the p-doped semiconductor” does not have support in the specification as originally filed. It appears from fig. 8 of the drawing layer (814) is between metal layer (838) and p-doped semiconductor layer (810). 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 10 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. It appears from the specification the one or more metal layers are not in direct contact with the p-doped semiconductor due to the presence of TCO layer (814). Double Patenting 08-33 AIA The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg , 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman , 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi , 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum , 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel , 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington , 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA/25, or PTO/AIA/26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. 08-35 AIA Claim s 1-2 and 12-13 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim s 1-20 of copending Application No. 18/514856 (US 2025/0169251 (251)) . Although the claims at issue are not identical, they are not patentably distinct from each other because the scope of the claimed limitations of the instant application as claimed in claims 1-13 is similar to that of the claimed limitations of US 2025/0169251 . This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Regarding claim 1, (251) discloses a semiconductor structure (light emitting device) comprising: a p-doped semiconductor; one or more first transparent conductive oxide layers directly contacting the p-doped semiconductor; one or more first metal layers directly contacting the first transparent conductive oxide; an n-doped semiconductor and an active layer, the n-doped semiconductor coupled to the p-doped semiconductor through the active layer; one or more second transparent conductive oxide layers directly contacting the n-doped semiconductor; and one or more second metal layers directly contacting the second transparent conductive oxide (claim 1). Regarding claim 2, (251) discloses the one or more first transparent conductive oxide layers and the one or more second transparent conductive oxide layers comprise a same material as each other (claim 2). Regarding claim 12, (251) discloses each of the one or more first metal layers directly contacts at least one of the one or more first transparent conductive oxide layers in a total contact area smaller than an entire area of that respective one of the one or more first metal layers, and each of the one or more second metal layer directly contacts at least one of the one or more second transparent conductive layers in a total contact area smaller than an entire area of that respective one of the one or more second metal layers (claim 19). Regarding claim 13, (251) discloses each of the one or more first metal layers directly contacts the one or more first transparent conductive oxide layers at multiple contact areas discontinuous from each other, and each of the one or more second metal layers directly contacts the one or more second transparent conductive oxide layers at multiple contact areas discontinuous from each other (20). Claim 3 is rejected on the ground of nonstatutory double patenting as being unpatentable over (251) in view of Tan et al., US 2022/0384516. Regarding claim 3, (251) does not disclose the one or more first transparent conductive oxide layers and the one or more second transparent conductive oxide layers comprise a different material as each other. Tan discloses in paragraph [0129] (1140) can be made of either indium tin oxide or another conductive oxide. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify claim 2 of (251), as taught by Tan, to have the one or more first transparent conductive oxide layers and the one or more second transparent conductive oxide layers comprise a different material as each other in order to design a micro-LEDs with low with improved light extraction from the LED [0042]. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim (s) 1-5, 7 and 9-10 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Tan et al., US 2022/0384516 . Regarding claim 1, Tan discloses (fig. 13 and related text) a semiconductor structure (1300) comprising: a p-doped semiconductor (1330, [0149]); one or more first transparent conductive oxide layers (1340, [0150]) directly contacting the p-doped semiconductor (1330); one or more first metal layers (1350) directly contacting the first transparent conductive oxide (fig. 13); an n-doped semiconductor (1310) and an active layer (1320), the n-doped semiconductor coupled to the p-doped semiconductor through the active layer (fig. 13); one or more second transparent conductive oxide layers (1362, low index conductive material, like ITO, [0131]) directly contacting the n-doped semiconductor (1310, fig. 13); and one or more second metal layers (1372) directly contacting the second transparent conductive oxide (1362). Regarding claim 2, Tan discloses the one or more first transparent conductive oxide layers and the one or more second transparent conductive oxide layers comprise a same material as each other (1340 and 1362 can both be ITO). Regarding claim 3, Tan discloses the one or more first transparent conductive oxide layers and the one or more second transparent conductive oxide layers comprise a different material as each other ([0129], 1140 same as (1340) can be made with ITO or another conductive oxide). Regarding claim 4, Tan discloses a first dielectric structure (1360) disposed on both the one or more first transparent conductive oxide layers (1340) and the one or more second transparent conductive oxide layers (1362). Regarding claim 5, Tan discloses a distributed bragg reflector (DBR) (1365) disposed on the first dielectric structure (1360), the DBR overlapping in the vertical direction with both the one or more first transparent conductive oxide layers (1340) and the one or more second transparent conductive oxide layers (1362). Regarding claim 7, Tan discloses a second dielectric structure (1355, [0150]) disposed on the one or more first metal layers (1350). Regarding claim 9, Tan discloses the one or more first metal layers (1350) overlaps a surface of the n-doped semiconductor (1310, fig. 13). Regarding claim 10, as best the examiner is able to ascertain the claimed invention, Tan discloses the one or more first metal layers (1350) is not in direct contact with a surface of the p-doped semiconductor (1330) . 07-15-03-aia AIA Claim (s) 1 and 11 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Tan . Regarding claim 1, Tan discloses (fig. 20 and related text) a semiconductor structure (200) comprising: a p-doped semiconductor (2030, [0224]); one or more first transparent conductive oxide layers (2040, [0225]) directly contacting the p-doped semiconductor (2030); one or more first metal layers (2084) directly contacting the first transparent conductive oxide (2040, fig. 20); an n-doped semiconductor (2010) and an active layer (2020), the n-doped semiconductor coupled to the p-doped semiconductor through the active layer (fig. 20); one or more second transparent conductive oxide layers (2062, low index conductive material, like ITO, [0227]) directly contacting the n-doped semiconductor (2010, fig. 13); and one or more second metal layers (2072) directly contacting the second transparent conductive oxide (2062, fig. 20). Regarding claim 11, Tan discloses the one or more second metal layers (2072) are one or more bonding layers/plugs (2072) disposed on the one or more first metal layers (2084 on the sidewall of 2084) the one or more bonding layers (2072) comprising at least one of Ag, Ti, and Cu [0229] . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-15 AIA Claim (s) 6 is rejected under 35 U.S.C. 102( a)2 ) as being unpatentable by Tan in view of Chen et al., US 20210305456 . Regarding claim 6, Tan does not disclose the DBR is a first DBR, further comprising: a second DBR spaced apart from the first DBR. Chen discloses the use of DBR structure by alternately stacking first and second dielectric layers having different dielectric layers in order to increase the efficiency of the semiconductor light emitting device [0027]. Tan and Chen are analogous art because they both are directed to semiconductor devices light emitting devices and one of ordinary skill in the art would have had a reasonable expectation of success to modify Tan with the specified features of Chen because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, on the effective filing date of the claimed invention, to modify Tan to include a second DBR as taught by Chen in order to increase the efficiency of the semiconductor light emitting device [0027] . 07-15 AIA Claim (s) 8, 12 and 13 are rejected under 35 U.S.C. 102( a)2 ) as being unpatentable by Tan Regarding claim 8, Tan does not explicitly disclose the one or more first metal layers comprises silver. However, Tan discloses the use of silver metal to make other metal connections. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize an appropriate metal layers to meet the resistance requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233. Regarding 12, Tan discloses explicitly disclose each of the one or more first metal layers (1350) directly contacts at least one of the one or more first transparent conductive oxide layers (1340), and each of the one or more second metal layer (1372) directly contacts at least one of the one or more second transparent conductive layers (1362) in a total contact area smaller than an entire area of that respective one of the one or more second metal layers (fig. 13). Tan does not explicitly disclose a total contact area smaller than an entire area of that respective one of the one or more first metal layers. It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to utilize an appropriate contact area of the respective one or more metal layers meet the resistance requirements of the particular design, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. /n re Aller, 105 USPQ 233. Regarding claim 13, Tan discloses the one or more first metal layers (1350) directly contacts the one or more first transparent conductive oxide layers (1340) at multiple contact areas discontinuous from each other (fig. 13), and each of the one or more second metal layers (1372) directly contacts the one or more second transparent conductive oxide layers (1362) at multiple contact areas discontinuous from each other (fig. 13). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL A GEBREMARIAM whose telephone number is (571)272-1653. The examiner can normally be reached 8:30-4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811 Application/Control Number: 18/516,473 Page 2 Art Unit: 2811 Application/Control Number: 18/516,473 Page 3 Art Unit: 2811 Application/Control Number: 18/516,473 Page 4 Art Unit: 2811 Application/Control Number: 18/516,473 Page 5 Art Unit: 2811 Application/Control Number: 18/516,473 Page 6 Art Unit: 2811 Application/Control Number: 18/516,473 Page 7 Art Unit: 2811 Application/Control Number: 18/516,473 Page 8 Art Unit: 2811 Application/Control Number: 18/516,473 Page 9 Art Unit: 2811 Application/Control Number: 18/516,473 Page 10 Art Unit: 2811 Application/Control Number: 18/516,473 Page 11 Art Unit: 2811