DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Acknowledgment is made that applicant's Amendment, filed on April 07th, 2026, has been entered.
Upon entrance of the Amendment, claims 1-3, 5-7, 12-14, 16-18, and 20 were amended. Claims 1-20 are currently pending.
Response to Arguments
Applicant’s arguments have been considered but are moot because the new ground of rejection does not rely on combination of reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-2, 5-6, 9-10, 12-13, 16-17, and 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (U.S. Patent No. 11,887,930).
Regarding to claim 1, Lee teaches an integrated circuit die stack comprising:
a plurality of first integrated circuit dice disposed in a first tier of the integrated circuit die stack, the plurality of the first integrated circuit dice comprising a first integrated circuit die (Fig. 32, elements 159; column 173, lines 57-58) and a bridge die (Fig. 32, elements 690; column 171, lines 18-19); and
a plurality of second integrated circuit dice disposed in a second tier of the integrated circuit die stack, the plurality of the second integrated circuit dice stacked vertically above the plurality of the first integrated circuit dice of the first tier, the plurality of the second integrated circuit dice comprising a second integrated circuit die (Fig. 32, elements 399-2; column 169, line 57) and a third integrated circuit die (Fig. 32, elements 399-1; column 169, line 57),
wherein the bridge die comprises routing connections within the bridge die, the bridge die being coupled to both the second integrated circuit die and the third integrated circuit die, the routing connections laterally interconnecting the second integrated circuit die and the third integrated circuit die through the bridge die, wherein the routing connections extend within their bridge die between a first region of the bridge die coupled to the second integrated circuit die and a second region of the bridge die coupled to the third integrated circuit die (Fig. 32, please also see the attached figure with annotation).
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Regarding to claim 2, Lee teaches the routing connections are defined by a redistribution layer formed on a substrate of the bridge die (Fig. 32).
Regarding to claim 5, Lee teaches the bridge die further comprises passive integrated devices (Fig. 32).
Regarding to claim 6, Lee teaches the passive integrated devices comprise one or more capacitors, resistors, or inductors coupled to the routing connections (column 3, lines 30-31).
Regarding to claim 9, Lee teaches the second integrated circuit die covers an entirety of the first integrated circuit die (Fig. 32, note that the claim does not specify which direction the word ‘cover” prefers to).
Regarding to claim 10, Lee teaches a filler die disposed in a third tier of the integrated circuit die stack, the filler die not electrically connected to the second plurality of integrated circuit dies in the second tier (Fig. 32, element 633).
Regarding to claim 12, Lee teaches an integrated circuit die package assembly comprising:
a package substrate (Fig. 32, element 79); and
an integrated circuit die stack disposed above the package substrate within the integrated circuit die package assembly (Fig. 32), the integrated circuit die stack comprising:
a first integrated circuit die (Fig. 32, elements 159; column 173, lines 57-58) and a bridge die (Fig. 32, elements 690; column 171, lines 18-19) disposed in a first tier of the die stack (Fig. 32, please also see the attached figure with annotation); and
a second integrated circuit die (Fig. 32, elements 399-2; column 169, line 57) and a third integrated circuit die (Fig. 32, elements 399-1; column 169, line 57) disposed in a second tier that is stacked vertically above the first tier (Fig. 32, please also see the attached figure with annotation),
wherein the bridge die comprises routing connections within the bridge die, the bridge die being coupled to both the second integrated circuit die and the third integrated circuit die, the routing connections laterally interconnecting the second integrated circuit die and the third integrated circuit die through the bridge die, wherein the routing connections extend within their bridge die between a first region of the bridge die coupled to the second integrated circuit die and a second region of the bridge die coupled to the third integrated circuit die (Fig. 32, please also see the attached figure with annotation).
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Regarding to claim 13, Lee teaches the routing connections are defined by a redistribution layer formed on a substrate of the bridge die (Fig. 32).
Regarding to claim 16, Lee teaches the bridge die further comprises passive integrated devices (Fig. 32).
Regarding to claim 17, Lee teaches the passive integrated devices comprise one or more capacitors, resistors, or inductors coupled to the routing connections (column 3, lines 30-31).
Regarding to claim 19, Lee teaches the plurality of the integrated circuit dice of the first tier are mounted on an interposer or a package substrate (Fig. 32).
Regarding to claim 20, Lee teaches a method for manufacturing an integrated circuit die stack, the method comprising:
mounting the plurality of the dice of a first tier on a carrier (Fig. 32, element 79), the plurality of dice of the first tier comprising a bridge die (Fig. 32, elements 690; column 171, lines 18-19);
arranging a plurality of the dice of the second tier on top of the dice of the first tier (Fig. 32, elements 399-1 and 399-2; column 169, line 57),
forming an integrated circuit die stack by connecting the dice of the first tier with the dice of the second tier, wherein the connecting comprises connecting the bridge die with at least two dice of the second tier, the bridge die comprising routing connections within the bridge die, the bridge die being coupled to both the second integrated circuit die and the third integrated circuit die, the routing connections laterally interconnecting the second integrated circuit die and the third integrated circuit die through the bridge die, wherein the routing connections extend within their bridge die between a first region of the bridge die coupled to the second integrated circuit die and a second region of the bridge die coupled to the third integrated circuit die (Fig. 32, please also see the attached figure with annotation).
mounting the integrated circuit die stack die stack on a package substrate (Fig. 32).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3-4 and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Patent No. 11,887,930), as applied to claim 1 above, in view of Yim et al. (U.S. Patent Application Publication No. 2024/0395720).
Regarding to claim 3, Lee does not disclose the bridge die is coupled to the second integrated circuit die and the third integrated circuit die by a plurality of hybrid bonds. Yim discloses dice are bonded by a plurality of hybrid bonds ([0056], lines 5-10). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee in view of Yim to couple the bridge die to the second integrated circuit die and the third integrated circuit die by a plurality of hybrid bonds in order to increase bonding strength.
Regarding to claim 4, Yim is silent as to pitch size of the hybrid bond. Then discloses a pitch of the hybrid bonds is less than 10 μm ([0044], lines 11-12). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yim in view of Then to configure a pitch of the hybrid bonds to be less than 10 μm in order to increase density of the bonds.
Regarding to claim 7, Lee does not disclose the bridge die comprises a plurality of through silicon vias. Yim discloses a bridge die comprises a plurality of through silicon vias (Fig. 2, element 197; [0063], lines 1-2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee in view of Yim to comprise a plurality of through silicon vias in the bridge die in order to make the die useful for more applications.
Regarding to claim 8, Lee does not disclose a plurality of hybrid bonds coupling the first integrated circuit die with the second integrated circuit die and/or the third integrated circuit die. Yim discloses dice are bonded by a plurality of hybrid bonds ([0056], lines 5-10). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee in view of Yim to configure a plurality of hybrid bonds coupling the first integrated circuit die with the second integrated circuit die and/or the third integrated circuit die in order to increase bonding strength.
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Patent No. 11,887,930), as applied to claims 1 and 10 above, in view of Verhaverbeke et al. (U.S. Patent Application Publication No. 2023/0148220).
Regarding to claim 11, Lee does not disclose a stiffener surrounding the integrated circuit die stack, and a cover coupled to the stiffener and the filler die. Verhaverbeke discloses a stiffener surrounding the integrated circuit die stack (Fig. 23B, element 2350), and a cover coupled to the stiffener and the filler die (Fig. 23B, element 2330). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee in view of Verhaverbeke to configure a stiffener surrounding the integrated circuit die stack and a cover coupled to the stiffener and the filler die in order to increase reliability.
Claims 14-15 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Patent No. 11,887,930), as applied to claim 1 above, in view of Yim et al. (U.S. Patent Application Publication No. 2024/0395720).
Regarding to claim 14, Lee does not disclose the bridge die is coupled to the second integrated circuit die and the third integrated circuit die by a plurality of hybrid bonds. Yim discloses dice are bonded by a plurality of hybrid bonds ([0056], lines 5-10). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee in view of Yim to couple the bridge die to the second integrated circuit die and the third integrated circuit die by a plurality of hybrid bonds in order to increase bonding strength.
Regarding to claim 15, Yim is silent as to pitch size of the hybrid bond. Then discloses a pitch of the hybrid bonds is less than 10 μm ([0044], lines 11-12). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Yim in view of Then to configure a pitch of the hybrid bonds to be less than 10 μm in order to increase density of the bonds.
Regarding to claim 18, Lee does not disclose the bridge die comprises a plurality of through silicon vias. Yim discloses a bridge die comprises a plurality of through silicon vias (Fig. 2, element 197; [0063], lines 1-2). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee in view of Yim to comprise a plurality of through silicon vias in the bridge die in order to make the die useful for more applications.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/VU A VU/Primary Examiner, Art Unit 2897
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