Prosecution Insights
Last updated: October 02, 2026
Application No. 18/518,230

DISPLAY DEVICE

Non-Final OA §102
Filed
Nov 22, 2023
Priority
Dec 30, 2022 — RE 10-2022-0191102
Examiner
MEHTA, RATISHA
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
578 granted / 645 resolved
+21.6% vs TC avg
Moderate +6% lift
Without
With
+5.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
34 currently pending
Career history
671
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
47.4%
+7.4% vs TC avg
§102
27.9%
-12.1% vs TC avg
§112
12.7%
-27.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 645 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species A in the reply filed on 6/5/2026 is acknowledged. Claims 13-15, 22-29 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 6/5/2026. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-12, 16-21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al (US 2022/0262291; hereinafter Lee). Regarding claim 1, Figs 1-2 and 6-7 of Lee discloses a display device comprising: a substrate (110; Fig 2; ¶ [0028]) including an active area (DA; Fig 2; ¶ [0028]), a first non-active area (area outside of PA; Fig 2; ¶ [0028]) adjacent the active area (DA; Fig 2; ¶ [0028]) and a second non-active area (HA; Fig 1; ¶ [0034]) within the active area (DA; Fig 2; ¶ [0028]), the second non-active area (HA; Fig 1; ¶ [0034]) including a through hole (HA; Fig 1; ¶ [0034]) penetrating the substrate (110; Fig 2; ¶ [0028]); a plurality of light emitting elements (ED; Fig 2; ¶ [0064]) in the active area (DA; Fig 2; ¶ [0028]); an encapsulation unit (380; Fig 2; ¶ [0065]) covering the plurality of light emitting elements (ED; Fig 2; ¶ [0064]); a buffer layer (389; Fig 2; ¶ [0068]) on the encapsulation unit (380; Fig 2; ¶ [0065]); a plurality of touch electrodes (TEb; Fig 2; ¶ [0069]) on the buffer layer (389; Fig 2; ¶ [0068]) in the active area; a first sensing line (M3; Fig 6; ¶ [0036]) surrounding at least a portion of the active area (DA; Fig 2; ¶ [0028]), and in the first non-active area (PA; Fig 2; ¶ [0028]); and a third sensing line (M2; Fig 2; ¶ [0036]) disposed along an outer portion of the through-hole (HA; Fig 1; ¶ [0034]) in the second non-active area (HA; Fig 1; ¶ [0034]). Regarding claim 2, Figs 1-2 and 6-7 of Lee discloses a connection electrode (191; Fig 2; ¶ [0059]) between the substrate (110; Fig 2; ¶ [0028]) and the encapsulation unit (380; Fig 2; ¶ [0065]), the connection electrode including a plurality of holes (Fig 2). Regarding claim 3, Figs 1-2 and 6-7 of Lee discloses a plurality of touch routing lines (Figs 6-7) on the buffer layer extending from the active area to the first non-active area, wherein first ends of the plurality of touch routing lines are connected to the plurality of touch electrodes in the active area and second ends of the plurality of touch routing lines are connected to a plurality of pads in the first non-active area (Figs 6-7). Regarding claim 4, Figs 1-2 and 6-7 of Lee discloses a second sensing line (M1; Fig 6; ¶ [0089]) surrounding the at least a portion of the active area (DA; Fig 2; ¶ [0028]) and in the first non-active area (PA; Fig 2; ¶ [0028]). Regarding claim 5, Figs 1-2 and 6-7 of Lee discloses the second sensing line (M1; Fig 6; ¶ [0089]) overlaps the first sensing line (M3; Fig 2; ¶ [0036]) and is configured to form a capacitor with the first sensing line (¶ [0069]). Regarding claim 6, Figs 1-2 and 6-7 of Lee discloses a plurality of inorganic insulating layers (391; Fig 6-7; ¶ [0069]) disposed between the first sensing line (M3; Fig 2; ¶ [0036]) and the second sensing line (M1; Fig 6; ¶ [0089]). Regarding claim 7, Figs 1-2 and 6-7 of Lee discloses a dam (PA; Fig 1; ¶ [0036]) surrounding the at least a portion of the active area (DA; Fig 2; ¶ [0028]) and in the first non-active area (area outside of PA; Fig 2; ¶ [0028]), wherein the first sensing line (M3; Fig 2; ¶ [0036]) and the second sensing line (M1; Fig 6; ¶ [0089]) are disposed outside the dam. Regarding claim 8, Figs 1-2 and 6-7 of Lee discloses a dielectric layer (392; Fig 7; ¶ [0069]) in the first non-active area (area outside of PA; Fig 2; ¶ [0028]) between the first sensing line (M3; Fig 2; ¶ [0036]) and the second sensing line (M1; Fig 6; ¶ [0089]), wherein the dielectric layer is disposed outside the dam. Regarding claim 9, Figs 1-2 and 6-7 of Lee discloses a side surface of the dielectric layer is disposed on a same line as a side surface of the substrate. (Figs 1-2) Regarding claim 10, Figs 1-2 and 6-7 of Lee discloses a low potential power line (TVL; Fig 6; ¶ [0036]) disposed along a circumference of the substrate at an outer portion of the first non-active area, wherein the first sensing line (M3; Fig 2; ¶ [0036]) and the second sensing line (M1; Fig 6; ¶ [0089]) are disposed outside the low potential power line (TVL; Fig 6; ¶ [0036]). Regarding claim 11, Figs 1-2 and 6-7 of Lee discloses the first non-active area includes a pad portion in which a plurality of sensing pads (P4/P3/P1; Fig 6; ¶ [0036]( are disposed and wherein each of a first end and a second end of the first sensing line (M3; Fig 2; ¶ [0036]) and a first end and second end of the second sensing line (M1; Fig 6; ¶ [0089]) are connected to different sensing pads among the plurality of sensing pads (Fig 6). Regarding claim 12, Figs 1-2 and 6-7 of Lee discloses an area between the one end and the opposite end of the first sensing line (M3; Fig 2; ¶ [0036]) is disposed along an outer circumference of the first non-active area. (Fig 6) Regarding claim 16, Figs 1-2 and 6-7 of Lee discloses the first sensing line includes a plurality of first sub-sensing portions connected in parallel and wherein the second sensing line includes a plurality of second sub-sensing portions connected in parallel (Figs 6-7). Regarding claim 17, Figs 1-2 and 6-7 of Lee discloses a plurality of transistors (Trd/Tra; Fig 6; ¶ [0050]) disposed below the plurality of light emitting elements (ED; Fig 2; ¶ [0064]) and connected to the plurality of light emitting elements (ED; Fig 2; ¶ [0064]), wherein the first sensing line (M3; Fig 2; ¶ [0036]) is disposed on a same layer (Fig 7) as gate electrodes (150d; Fig 7; ¶ [0049]) of the plurality of transistors (Trd/Tra; Fig 6; ¶ [0050]) and wherein the second sensing line (M1; Fig 6; ¶ [0089]) is disposed on a same layer as the plurality of touch electrodes (TEb; Fig 2; ¶ [0069]). Regarding claim 18, Figs 1-2 and 6-7 of Lee discloses a detection unit (DCL/700; Fig 6; ¶ [0036]) including the first sensing line (M3; Fig 2; ¶ [0036]) and the second sensing line (M1; Fig 6; ¶ [0089]), wherein the detection unit is configured to detect at least one of a strain and a crack in the display device by measuring the capacitance between the first sensing line and the second sensing line. (¶ [0037]) Regarding claim 19, Figs 1-2 and 6-7 of Lee discloses fourth sensing line (HCD; Fig 6; ¶ [0032]) disposed along the outer portion of the through-hole in the second non-active area. Regarding claim 20, Figs 1-2 and 6-7 of Lee discloses the fourth sensing line (HCD; Fig 6; ¶ [0032]) overlaps the third sensing line (M2; Fig 2; ¶ [0036]) and is configured to form a capacitor with the third sensing line. Regarding claim 21, Figs 1-2 and 6-7 of Lee discloses a dam (Figs 6-7) disposed to surround the through-hole in the second non-active area, Wherein the third sensing line and the fourth sensing line are disposed between the dam and the through hole. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Liu et al (US 2022/0037442) Takahashi et al (US 2022/0006051) Any inquiry concerning this communication or earlier communications from the examiner should be directed to RATISHA MEHTA whose telephone number is (571)270-7473. The examiner can normally be reached Monday-Friday: 9:00am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos Feliciano can be reached at 571-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RATISHA MEHTA/Primary Examiner, Art Unit 2817
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Prosecution Timeline

Nov 22, 2023
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
95%
With Interview (+5.6%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 645 resolved cases by this examiner. Grant probability derived from career allowance rate.

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