Prosecution Insights
Last updated: October 02, 2026
Application No. 18/518,551

METHOD, APPARATUS, AND SYSTEM WITH RESIST IMAGE ESTIMATION

Non-Final OA §102
Filed
Nov 23, 2023
Priority
Nov 23, 2022 — RE 10-2022-0158629 +1 more
Examiner
KIK, PHALLAKA
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
875 granted / 964 resolved
+30.8% vs TC avg
Minimal +2% lift
Without
With
+1.6%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
14 currently pending
Career history
972
Total Applications
across all art units

Statute-Specific Performance

§101
32.2%
-7.8% vs TC avg
§103
16.7%
-23.3% vs TC avg
§102
26.3%
-13.7% vs TC avg
§112
9.2%
-30.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 964 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . This Office Action responds to the Application and IDS filed on 11/23/2023. Claims 1-20 are pending. Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 11/23/2023 has been considered, wherein the reference Watanabe et al., "Accurate Lithography Simulation Model based on Convolutional Neural Networks, Proc. of SPIE Vol. 1047, 2017, 10 pages, which was submitted but not listed on the IDS, has now been listed on the IDS as shown and considered by the Examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cao et al. (US Patent Application Publication No. 20100128969 A1). As per claims 1,3,11,12,14, Fig. 5 illustrates the elements of the claims, wherein an aerial image (AI) is obtained from the mask pattern at block 505, and a third resist image ( R) is obtained at step 515 based on the combined the simultaneously processed resist images (i.e., linearly component represented by the first terms of the R equation, and non-linearly component represented by the second terms of the R equation) combined by at least two distinct orthogonal convolution kernels (see Fig. 2), which are also based on the aerial image A as shown in Fig. 5 (see also paragraphs [0073]-[0078]; Fig. 2); wherein the third or final resist image R which meets the criteria at step 530 would be the resist image that comprises shape information of a pattern formed on a wafer that is generated by the MI; wherein the non-transitory computer readable medium and electronic device comprising memory and processor to perform the method is part of the computer-implemented method as further described in paragraphs [0009]-[0012]), being necessary to perform the computer-implemented method as is known in the art. As per claims 2,13, the compact model (i.e., mathematical process estimates rather than slow, brute-force simulations) is used to obtain the ariel image and the resist image (see paragraphs [0046]-[0065]). As per claims 4,15, the additional kernel model trained based on a difference between a resist contour image (RCI) generated based on the third RI and a measurement contour image generated through measurement as part of the training and calibration phase of this compact model framework, the kernel coefficients are optimized by minimizing the geometric discrepancy between simulation and physical reality (see paragraphs [0040]-[0075]; Figs. 4 and 6. As per claims 5,16, Cao et al. teach that the additional kernel model trained so that the difference is minimized through backpropagation as part of the iterative loop 510-530 as shown in Fig. 5. As per claims 6-10,17-19, as shown in Fig. 5, within the iterative loop 510-530, the compact model takes a candidate mask design and runs a forward simulation (Aerial Image → Resist Image) to compute what the shapes will actually look like when printed (i.e., predicted mask layout based on the third or R resist image, which in computational lithography, it is also considered resist contour image RCI—per claims 7 and 18), which is then compared to the target, from which geometric adjustments are made and the final modified data that satisfy the cost function and the terminate the iterative loop, would result in the corrected mask layout, ready for fabrication, from which the corrected mask layout is obtained; wherein (per claims 8 and 19) the mask layout image that is rasterized from the corrected mask layout as part of the pixelated image (i.e., In paragraphs [0046]-[0052], Cao et al. establish how the input mask design or target pattern is captured, converting the spatial layout into a discrete function over an (x, y) coordinate system, wherein this function maps every specific pixel coordinate to a gray-scale value between 0 (opaque) and 1 (fully transparent), creating a digital, rasterized representation of the layout and paragraphs [0057]-[0065], Cao et al. describe how this pixel grid undergoes computational transformation in which the transmission coefficients of the Transmission Cross Coefficient (TCC) optical engine act directly on this discrete multi-dimensional pixel array, to construct the aerial image; and per claim 10, wherein the third or final resist image R which meets the criteria at step 530 would be the resist image that comprises shape information of a pattern formed on a wafer that is generated by the MI. As per claims 9,20¸the generated MI (mask image) in which a three-dimensional (3D) element is reflected by inputting the mask layout image to a mask model is part of the 2D rasterized mask layout image into a dedicated mask model which applies mathematical modifications to capture three-dimensional electromagnetic effects such as wave guide effects, M3D cross-talk/shadowing, phase variations (see rejection of claims 18 and 9 above). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PHALLAKA KIK whose telephone number is (571)272-1895. The examiner can normally be reached Maxiflex Mon-Fri 8:30AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at 5712727483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Any response to this action should be mailed to: Commissioner for Patents P. O. Box 1450 Alexandria, VA 22313-1450 or faxed to: 571-273-8300 /PHALLAKA KIK/Primary Examiner, Art Unit 2851 September 19, 2026
Read full office action

Prosecution Timeline

Nov 23, 2023
Application Filed
Sep 23, 2026
Non-Final Rejection mailed — §102 (current)

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
92%
With Interview (+1.6%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 964 resolved cases by this examiner. Grant probability derived from career allowance rate.

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