Prosecution Insights
Last updated: April 19, 2026
Application No. 18/518,735

CRYSTALLINE INZNO OXIDE SEMICONDUCTOR, METHOD OF FORMING THE SAME, AND SEMICONDUCTOR DEVICE INCLUDING THE CRYSTALLINE INZNO OXIDE SEMICONDUCTOR

Non-Final OA §103
Filed
Nov 24, 2023
Examiner
JEAN BAPTISTE, WILNER
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Iucf-Hyu (Industry-University Cooperation Foundation Hanyang University)
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
92%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
923 granted / 1070 resolved
+18.3% vs TC avg
Moderate +5% lift
Without
With
+5.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
37 currently pending
Career history
1107
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
55.3%
+15.3% vs TC avg
§102
28.3%
-11.7% vs TC avg
§112
9.3%
-30.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1070 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or non-obviousness. Claim(s) 1-19, is/are rejected under 35 U.S.C. 103 as being unpatentable over Itagaki et al., US 2010/0109002 A1. Claims 1-6. Itagaki et al., disclose a crystalline In-Zn-O oxide semiconductor (such as the one in fig. 5, [0066]) comprising: -an oxide including In and Zn (item 15) wherein, in Inductively Coupled Plasma-Mass Spectrometry (ICP-MS) analysis (this limitation would read through [0069] wherein is disclosed for example, the composition of the crystal is analyzed by an electron energy loss spectroscopy (EELS) method); -and in an X-ray diffraction (XRD) analysis, the crystalline In-Zn-O oxide semiconductor has a peak showing crystallinity at a 2-theta value between about 32.3 degrees and about 33.3 degrees (this limitation would read through [0068] wherein is disclosed for example, diffraction peak depends on the composition of the oxynitride. When Chi (substrate tilt angle) is approximately 0 degree, a diffraction peak is observed at around 2.theta.=30 to 35 degrees. When Chi is approximately 32 degrees, a diffraction peak is observed at around 2.theta.=56 to 64 degrees). Itagaki et al., appear to not exactly indicate “a content of In among In and Zn is about 30 at% or more and about 75 at % or less”. However, [0092] of the reference disclose for example, it was found that the atomic composition ratio of Zn which is expressed by Zn/(Zn+In) was 65 atomic percent. Also [0066] of Itagaki et al., wherein is disclosed for example, in the case of the Zn--In--ON film, when the N ratio is equal to or larger than 20 atomic percent and the Zn ratio is equal to or larger than 50 atomic percent). It would have been obvious to modify the teachings of Itagaki et al., in order to evaluate the potential impact of co-existing Sn on In distribution in Skarn environments. Claims 7-13. Itagaki et al., disclose a method of forming a crystalline In-Zn-O oxide semiconductor (such as the one in fig. 5, [0114]), the method comprising: -co-depositing In and Zn on a substrate (this limitation would read through [0114] wherein is disclosed for example, a Zn--In--ON oxynitride film used as the active layer 12 was deposited on the glass substrate 11 in an atmosphere containing a mixture of argon and nitrogen by RF sputtering using a radical source); -and in an X-ray diffraction (XRD) analysis, the crystalline In-Zn-O oxide semiconductor has a peak showing crystallinity at a 2-theta value between about 32.3 degrees and about 33.3 degrees (this limitation would read through [0068] wherein is disclosed for example, diffraction peak depends on the composition of the oxynitride. When Chi (substrate tilt angle) is approximately 0 degree, a diffraction peak is observed at around 2.theta.=30 to 35 degrees. When Chi is approximately 32 degrees, a diffraction peak is observed at around 2.theta.=56 to 64 degrees). Itagaki et al., appear to not exactly indicate “using atomic layer deposition (ALD), wherein a ratio of a deposition cycle of In with respect to a deposition cycle of Zn is about 1 or more and about 8 or less”. As noted, Atomic Layer Deposition (ALD) is a thin-film deposition technique that allows for the precise layer-by-layer growth of materials at the atomic level, making it essential in semiconductor manufacturing and nanotechnology). In this case, [0114] of Itagaki et al., disclose Zn--In--ON oxynitride film used as the active layer 12 was deposited on the glass substrate 11 in an atmosphere containing a mixture of argon and nitrogen by RF sputtering using a radical source. Therefore, one having ordinary skill in the art would be motivated to modify the crystalline In-Zn-O oxide semiconductor by using Atomic Layer Deposition as a powerful technique that plays a critical role in the advancement of modern technology, particularly in the fields of electronics and materials science. Claims 16-19. Itagaki et al., disclose a semiconductor device (such as the one in fig. 5, [0114]) comprising: -a substrate (item 11); -a channel layer (this limitation would read through [0075] wherein is disclosed for example, a gate insulating film and a semiconductor channel layer are provided in the stated order on a gate electrode) on the substrate, the channel layer including a crystalline In-Zn-O oxide semiconductor; -a gate electrode (item 15) on the channel layer; -and a source electrode (item 12) and a drain electrode (item 13) on both sides of the channel layer, respectively, wherein in Inductively Coupled Plasma-Mass Spectrometry (ICP-MS) analysis of the crystalline In-Zn-O oxide semiconductor (this limitation would read through [0069] wherein is disclosed for example, the composition of the crystal is analyzed by an electron energy loss spectroscopy (EELS) method); -and in an X-ray diffraction (XRD) analysis, the crystalline In-Zn-O oxide semiconductor has a peak showing crystallinity at a 2-theta value between about 32.3 degrees and about 33.3 degrees (this limitation would read through [0068] wherein is disclosed for example, diffraction peak depends on the composition of the oxynitride. When Chi (substrate tilt angle) is approximately 0 degree, a diffraction peak is observed at around 2.theta.=30 to 35 degrees. When Chi is approximately 32 degrees, a diffraction peak is observed at around 2.theta.=56 to 64 degrees). Itagaki et al., appear to not exactly indicate “a content of In among In and Zn is about 30 at% or more and about 75 at % or less”. However, [0092] of the reference disclose for example, it was found that the atomic composition ratio of Zn which is expressed by Zn/(Zn+In) was 65 atomic percent. Also [0066] of Itagaki et al., wherein is disclosed for example, in the case of the Zn--In--ON film, when the N ratio is equal to or larger than 20 atomic percent and the Zn ratio is equal to or larger than 50 atomic percent). It would have been obvious to modify the teachings of Itagaki et al., in order to evaluate the potential impact of co-existing Sn on In distribution in Skarn environments. Claim 14. Itagaki et al., disclose the method of claim 7, wherein, the co-depositing the In and Zn on the substrate is performed using a co- deposition process where a temperature of the substrate is about 2000 C or more and about 3500 C or less (this limitation would read through [0072] wherein is disclosed for example, temperature range is desirably 150.degree. C. or more to 450.degree. C. or less, more desirably 150.degree. C. or more to 350.degree. C. or less). Claim 15. Itagaki et al., disclose the method of claim 7, wherein, the co-depositing the In and Zn on the substrate is performed using a co- deposition process where a temperature of the substrate is about 2000 Cor more and about 3000 C or less (this limitation would read through [0072] wherein is disclosed for example, temperature range is desirably 150.degree. C. or more to 450.degree. C. or less, more desirably 150.degree. C. or more to 350.degree. C. or less). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILNER JEAN BAPTISTE whose telephone number is (571)270-7394. The examiner can normally be reached M-T 8:00-6:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /W.J/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
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Prosecution Timeline

Nov 24, 2023
Application Filed
Mar 14, 2026
Non-Final Rejection — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
92%
With Interview (+5.4%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 1070 resolved cases by this examiner. Grant probability derived from career allow rate.

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