DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Information Disclosure Statement
The information disclosure statements filed on 11/26/2023, 09/05/2024 and 02/24/2025 have been considered.
Drawings
The drawings filed on 11/26/2023 are acceptable.
Specification
The abstract of the disclosure and the specification filed on 11/26/2023 are acceptable.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 13-16 are is/are rejected under 35 U.S.C. 102a1 as being anticipated by Munoz (US 6,3296,127).
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Regarding claim 1, Munoz et al. (US 6,3296,127) discloses:
A semiconductor package (110, column, 4 line 1), comprising:
a semiconductor chip (16, column 4 line 3) comprising a drain surface (bottom surface, column 4, line 3-6) and a source surface (column 4 lines 8-13) opposite to each other;
a drain lead frame assembly comprising a drain contact plate (13, column 4 line 4), a drain connecting section (portion of 13 within housing 22 but not overlapped with the chip 16 as shown in figure 3), and a plurality of drain leads (12a), wherein the drain contact plate 913), the drain connecting section, and the drain leads are integrally formed into one piece, the drain connecting section connects the drain contact plate to the drain leads, the drain contact plate (13)( is physically connected to the drain surface, an area of the drain contact plate is larger than an area of the drain surface (figures 6 and 3 together show plate 13 has larger dimensions than chip 16);
a source lead frame assembly (strap member 28, column 4 lines 13-15) comprising a source contact plate (30, column 4 line 18), a source connecting section (34, column 4 line 19-21), and a plurality of source leads (12b), wherein the source contact plate (30), the source connecting section (34), and the source leads (12b) are integrally formed into one piece (figure 3), the source connecting section (34) connects the source contact plate (30) to the source leads (12b), the source contact plate (30) is physically connected to the source surface, an area of the source contact plate (30) is smaller than an area of the source surface (figures 4 and 6 taken together show that plate 30 has smaller dimensions than chip 16; and
an insulating layer (22, column 4 lines 30-38) encapsulating the semiconductor chip (16) and surrounding the drain contact plate (13) and the source contact plate (30).
Regarding claim 2, Munoz further discloses:
wherein the area of the source contact plate (30) is 50% to 95% of the area of the source surface (figure 6).
Regarding claim 13, Munoz further discloses:
wherein the source connecting section (34) comprises a bending structure to position the source contact plate (30) and the source leads (12b) on different planes.
Regarding claim 14, Munoz further discloses:
a gate lead frame assembly including a gate contact plate (19a, column 4 lines 60-61), a gate connecting section (20, column 8 line 55) and a gate lead (12c, column 5 line 48-49), wherein the gate contact plate, the gate connecting section, and the gate lead are integrally formed into one piece, the gate connecting section connects the gate contact plate to the gate lead, the gate contact plate is physically connected to the source surface (figure 8).
Regarding claim 15, Munoz further discloses:
wherein the gate contact plate (19a) is coplanar with the source contact plate (30), and wherein the gate lead (12c) is coplanar with the source leads (12b).
Regarding claim 16, Munoz further discloses:
wherein the insulating layer (22) encapsulates the drain connecting section (13) and the source connecting section (34), and wherein the drain leads ( 12a) and the source leads (12b) extend out of the insulating layer from opposite sidewalls of the insulating layer (22).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3, -8, 17-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Munoz in view of Okamoto (US 2006/0138532).
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Regarding claim 3, Munoz does not disclose “wherein a first surface of the source contact plate is attached to the source surface, and wherein a surface of the insulating layer exposes a second surface of the source contact plate, the second surface is opposite to the first surface”. In a similar device, however, Okamoto discloses a semiconductor package including a chip (2) with a source surface and a drain surface (¶0075), a source contact plate (3SL, ¶0066) having a first dimension, a drain contact plate (3DL1, ¶0077) wherein an area of the drain contact plate is larger than an area of the drain surface and an insulating layer (1, ¶0076) encapsulating the semiconductor chip (2) and surrounding the drain contact plate (3DL1) and the source contact plate (3SL), wherein a first surface of the source contact plate (3SL) is attached to the source surface, and wherein a surface of the insulating layer (1) exposes a second surface of the source contact plate, the second surface is opposite to the first surface (figure 4)”. Okamoto discloses that structure as taught provides a package with improved heat dissipation (¶0077). Therefore, it would have been obvious to one having skill in the art before the effective filing date of the claimed invention to modify the device of Munoz, including providing a first surface of the source contact plate is attached to the source surface, and wherein a surface of the insulating layer exposes a second surface of the source contact plate, the second surface is opposite to the first surface in order to provide improved heat dissipation as taught by Okamoto.
Regarding claim 4, the modification of Okamoto further discloses:
wherein the surface of the insulating layer (1) is levelled with the second surface of the source contact plate (3SL).
Regarding claim 5, Munoz in view of Okamoto does not disclose “wherein the second surface of the source contact plate is closer to the source surface than the surface of the insulating layer”. However, a change in size or shape or both is an unpatentable modification when it results in optimum conditions that differ from the prior art in degree but not in kind. In Re Rose, 220 F.2d 459, 105 USPQ 237, In reDailey, 357 F.2d 669, 149 USPQ 47). In the instant case the prior art device would not perform differently if modified to the claimed shape or size. Therefore the claimed limitations are considered met.
Regarding claim 6, the modification of Okamoto further discloses:
wherein the insulating layer (1) encapsulates what would be the source connecting section (34 of Munoz, 3SL in Okamoto, at least 2 surfaces of 3SL, excluding the second surface, are encapsulated), and the insulating layer (1) completely exposes the second surface along edges of the source contact plate (3SL).
Regarding claim 7, Munoz does not disclose “wherein a first surface of the drain contact plate is attached to the drain surface, and wherein a surface of the insulating layer exposes a second surface of the drain contact plate, the second surface is opposite to the first surface”. In a similar device, however, Okamoto discloses a semiconductor package including a chip (2) with a source surface and a drain surface (¶0075), a drain contact plate (3SL, ¶0066) having a first dimension, a drain contact plate (3DL1, ¶0077) wherein an area of the drain contact plate is larger than an area of the drain surface and an insulating layer (1, ¶0076) encapsulating the semiconductor chip (2) and surrounding the drain contact plate (3DL1) and the source contact plate (3SL), wherein a first surface of the drain contact plate (3DL) is attached to the drain surface, and wherein a surface of the insulating layer (1) exposes a second surface of the drain contact plate (3DL), the second surface is opposite to the first surface. Therefore, it would have been obvious to one having skill in the art before the effective filing date of the claimed invention to modify the device of Munoz, including providing a first surface of the drain contact plate (3DL) is attached to the drain surface, and wherein a surface of the insulating layer (1) exposes a second surface of the drain contact plate (3DL), the second surface is opposite to the first surface in order to provide improved heat dissipation as taught by Okamoto.
Regarding claim 8, Munoz further discloses:
wherein the source contact plate (30), the source connecting section (34), and the source leads (12b) have a same thickness (figure 3).
Regarding claim 17, Munoz discloses:
A semiconductor package, comprising:
a semiconductor chip (16) comprising a drain surface (bottom surface) and a source surface (top surface) opposite to each other;
a drain lead frame assembly being physically connected to the drain surface, wherein the drain lead frame assembly comprises a drain contact plate (13), a drain connecting section (portion of 13 within housing 22 but not overlapped with the chip 16 as shown in figure 3), and a plurality of drain leads (12b) integrally formed into one piece, an area of the drain contact plate is larger than an area of the drain surface (figures 3 and 6);
a source lead frame assembly (28) being physically connected to the source surface, wherein the source lead frame assembly comprises a source contact plate (30), a source connecting section (34), and a plurality of source leads (12a) integrally formed into one piece, an area of the source contact plate is smaller than an area of the source surface (figures 4 and 6);
and an insulating layer (22) encapsulating the semiconductor chip and surrounding the drain contact plate (13) and the source contact plate (30), wherein a first surface of the insulating layer exposes the drain contact plate, and a second surface of the insulating layer opposite to the first surface exposes the source contact plate.
Munoz does not disclose “an insulating layer encapsulating the semiconductor chip and surrounding the drain contact plate and the source contact plate, wherein a first surface of the insulating layer exposes the drain contact plate, and a second surface of the insulating layer opposite to the first surface exposes the source contact plate” In a similar device, however, Okamoto discloses a semiconductor package including a chip (2) with a source surface and a drain surface (¶0075), a source contact plate (3SL, ¶0066) having a first dimension, a drain contact plate (3DL1, ¶0077) wherein an area of the drain contact plate is larger than an area of the drain surface and an insulating layer (1, ¶0076) encapsulating the semiconductor chip (2) and surrounding the drain contact plate (3DL1) and the source contact plate (3SL), wherein a first surface of the insulating layer (1) exposes the drain contact plate (3DL1), and a second surface of the insulating layer opposite to the first surface exposes the source contact plate (3SL). Okamoto discloses that structure as taught provides a package with improved heat dissipation (¶0077). Therefore, it would have been obvious to one having skill in the art before the effective filing date of the claimed invention to modify the device of Munoz, including providing “an insulating layer encapsulating the semiconductor chip and surrounding the drain contact plate and the source contact plate, wherein a first surface of the insulating layer exposes the drain contact plate, and a second surface of the insulating layer opposite to the first surface exposes the source contact plate in order to provide improved heat dissipation as taught by Okamoto.
Regarding claim 18, the modification of Okamoto further discloses:
wherein an exposed area of the drain contact plate (3DL1) exposed by the first surface is larger than or equal to an exposed area of the source contact plate (3SL) exposed by the second surface.
Regarding claim 19, the modification of Okamoto further discloses:
wherein the drain leads (3DL) and the source leads (3SL) collectively bend toward the second surface of the insulating layer (22).
Allowable Subject Matter
Claims 9-12 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 9, the prior art does not disclose “wherein the source contact plate further comprises at least one opening exposing the source surface” in combination with the remaining claimed features.
Regarding claim 20, the prior art does not disclose “wherein the drain leads and the source leads collectively bend toward the first surface of the insulating layer” in combination with the remaining claimed features.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A HARRISTON whose telephone number is (571)270-3897. The examiner can normally be reached Mon-Fri, 9AM-5PM.
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/WILLIAM A HARRISTON/ Primary Examiner, Art Unit 2899