Prosecution Insights
Last updated: April 19, 2026
Application No. 18/519,056

APPARATUS AND METHOD FOR FLIP CHIP LASER BONDING

Non-Final OA §102§103
Filed
Nov 26, 2023
Examiner
WOLDEGEORGIS, ERMIAS T
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Protec Co. Ltd.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
3y 0m
To Grant
83%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allow Rate
526 granted / 743 resolved
+2.8% vs TC avg
Moderate +12% lift
Without
With
+11.9%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
49 currently pending
Career history
792
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
68.7%
+28.7% vs TC avg
§102
26.6%
-13.4% vs TC avg
§112
3.6%
-36.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 743 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Acknowledgment is made of applicant's claim for foreign priority under 35 U.S.C. 119(a)-(d). Information Disclosure Statement The information disclosure statements filed on 11/26/203, 8/13/2024, and 1/09/2025 have been acknowledged and signed copies of the PTO-1449 are attached herein. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 9-10 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by AHN (US 2021/0335749 A1, hereinafter “AHN”). In regards to claim 1, Park discloses (see, for example, Figs. 1) a flip-chip laser bonding method of bonding a flip-chip type semiconductor chip to a substrate using a laser light (see, for example, Abstract), the method comprising: a step (a) of adsorbing, holding, and supporting a lower surface of a substrate by a substrate support member (See, for example, Par [0039] ‘…suppling unit 110 supplies the substrate to the fixing unit…”); a step (b) of holding and supporting an upper surface of the semiconductor chip by a chip support member (See, for example, Pars [0035] and [0043]); a step (c) of transferring the chip support member relative to the substrate support member such that a position of the semiconductor chip is aligned with respect to the substrate and bringing the semiconductor chip to be in contact with the substrate by a chip transfer unit (See, for example, Par [0040]-[0042]); and a step (d) of bonding the semiconductor chip to the substrate by irradiating the lower surface of the substrate supported on the substrate support member with the laser light by a laser head (“…laser beam instantaneously increases temperature of the solder bumps….to simultaneously bond a plurality of semiconductor chips to the substrate…”, See, for example, Pars [0045]-[0047]. In regards to claim 9, Park discloses (See, for example, Fig. 1) the semiconductor chip is bonded to the substrate using one of a solder ball and a copper pillar as a solder bump (See, for example, Par [0016]). In regards to claim 10, Park discloses (See, for example, Fig. 1) The flip-chip laser bonding method of claim 1, wherein each of the steps (a), (b), (c), and (d) are performed using a control unit configured to control operations of the substrate support member, the chip support member, the chip transfer unit, and the laser head (See, for example, Par [0007], “…a control unit configured to control the operations of the supply unit, the fixing unit, the laser unit, and the discharge unit.”) . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2-4 are rejected under 35 U.S.C. 103 as being unpatentable over AHN in view of Park et al. (US 2021/0398936 A1, hereinafter “Park”). In regards to claim 2-4, AHN discloses all limitations of claim 1 except that wherein the step (a) is performed using the substrate support member comprising a transmission portion comprising a transparent material to transmit the laser light emitted from the laser head in the step (d) to the substrate; wherein the step (a) is performed using the substrate support member comprising the transmission portion comprising quartz; and wherein the step (a) is performed using the substrate support member comprising the transmission portion comprising a porous resin. Park while disclosing laser bonding tools (See, for example, Fig. 2B) wherein the step (a) is performed using the substrate support member comprising a transmission portion comprising a transparent material to transmit the laser light emitted from the laser head in the step (d) to the substrate (11/153, “…heat can be applied to interconnects 121 or 131. In some examples, such heat can be applied to interconnects 121 or 131 while maintaining the temperature of substrate 11 lower than the temperature of heated interconnects 121 or 131….”, See, for example, Pars [0041]- [0042]); wherein the step (a) is performed using the substrate support member comprising the transmission portion comprising quartz (See, for example, Par [0041); and wherein the step (a) is performed using the substrate support member comprising the transmission portion comprising a porous resin (substrate 11 can be a re-distribution layer (“RDL”) substrate. In some examples, RDL substrates can comprise one or more conductive redistribution layers and one or more dielectric layers that can be formed layer by layer over an electronic device to which the RDL substrate is to be electrically coupled. … The dielectric layers can be made from photo-definable organic dielectric materials such as, for example, polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO)…”, See, for example, Par [0027]; also, “…Laser beams 151A can transfer or induce heat to interconnects, 121, 131, 141…”, See, for example, Par [0066]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify AHN by Park because this would help bond semiconductor device to the substrate in an efficient/effective manner. Claims 5-8 are rejected under 35 U.S.C. 103 as being unpatentable over AHN in view of KIM et al. (US 2018/0102340 A1, hereinafter “Kim”). In regards to claims 5-8, AHN discloses all limitations of claim 1 above except that the step (b) comprises holding and supporting the semiconductor chip by adsorbing the upper surface of the semiconductor chip by the chip support member; the step (b) is performed using the chip support member comprising a tilting unit configured to contact the upper surface of the semiconductor chip and tilt in accordance with an inclination of the upper surface of the semiconductor chip to adsorb and support the semiconductor chip; wherein the step (b) comprises supporting the semiconductor chip while maintaining an angle of the tilt in accordance with the inclination of the upper surface of the semiconductor chip by the tilting unit, and the step (c) comprises transferring the chip support member while maintaining the angle of the tilt of the semiconductor chip tilted in the step (b); wherein the step (b) is performed using the chip support member comprising the tilting unit comprising a contact portion configured to contact and support the upper surface of the semiconductor chip and a fixed portion tiltably supporting the contact portion, wherein the fixed portion and the contact portion are configured such that surfaces thereof facing each other are curved to allow relative tilting, and an angle of the contact portion with respect to the fixed portion is maintained by pneumatic pressure. Kim while disclosing a bonding head teaches (See, for example, Fig. 4-8) that the step (b) comprises holding and supporting the semiconductor chip (C) by adsorbing the upper surface of the semiconductor chip (C) by the chip support member (124); the step (b) is performed using the chip support member (124) comprising a tilting unit (“ the second correcting block 144… collet 124 may be free to move with respect to the second correcting block 144.” , See Pars [0033]-[0034]) configured to contact the upper surface of the semiconductor chip (C) and tilt in accordance with an inclination of the upper surface of the semiconductor chip (C) to adsorb and support the semiconductor chip (C); wherein the step (b) comprises supporting the semiconductor chip (C) while maintaining an angle of the tilt in accordance with the inclination of the upper surface of the semiconductor chip by the tilting unit (See, for example, Fig. 6), and the step (c) comprises transferring the chip support member while maintaining the angle of the tilt of the semiconductor chip tilted in the step (b) (See, for example, Figs. 5 and 6); wherein the step (b) is performed using the chip support member comprising the tilting unit (124) comprising a contact portion configured to contact and support the upper surface of the semiconductor chip (C) and a fixed portion tiltably supporting the contact portion (See, Figs. 7/8), wherein the fixed portion and the contact portion are configured such that surfaces thereof facing each other (between 142 and 144) are curved to allow relative tilting, and an angle of the contact portion with respect to the fixed portion is maintained by pneumatic pressure (See, for example, Pars [0035]-[0036]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify AHN by Kim because this would help reduce failures in the bonding process and bonding time. Claims 11-13 are rejected under 35 U.S.C. 103 as being unpatentable over AHN in view of Yoshimoto et al. (US 2007/0215673 A1, hereinafter “Yoshimoto”). In regards to claims 11-13, AHN discloses all limitations of claim 1 above except that wherein the step (c) comprises a process in which the control unit controls the chip transfer unit to adjust a height of the chip support member; wherein the step (c) comprises a process in which the control unit operates the chip transfer unit to lower the chip support member while the step (d) is being performed; and wherein the step (c) comprises a process in which the control unit operates the chip transfer unit to maintain a height of the chip transfer unit while the step (d) is being performed. However, Yoshimoto while disclosing a bonding apparatus teaches (See, for example, Figs. 1-5) that the step (c) comprises a process in which the control unit controls the chip transfer unit to adjust a height of the chip support member (“…the feed screw 16, and the flat side wall of the C-shaped lifting and lowering block 12 is held by the feed screw 16 via the slidable slide guide 15. When load is applied to the electronic component 6 more than necessity, the lifting and lowering block 12 connected to the lifting and lowering mechanism 18 is allowed to move up and down for feedback control on the set load, protecting the substrate 1, electronic component 6, load sensor 5, etc. from damages.”, See, for example, Par [0049]); wherein the step (c) comprises a process in which the control unit operates the chip transfer unit to lower the chip support member while the step (d) is being performed. (“Signals from these load sensors 5 are then detected by a pressure detection unit 20 (e.g., an A/D converter) and transmitted to a control unit 21 for measurement of both the total load on the bumps 6A of the electronic component 6 and the pressure distributed over the substrate stage S surface and for control of the pressure adjustment unit 22. In this way, set load for bonding operations is controlled.”, See, for example, Par [0051]); and wherein the step (c) comprises a process in which the control unit operates the chip transfer unit to maintain a height of the chip transfer unit while the step (d) is being performed. (“As shown in FIG. 5B, pressure values, detected by the load sensors 5A to 5D during a period from the time when the electronic component 6 and substrate 1 make first contact to the time when the bonding tool 7 is completely lifted after a predetermined period of a bonding operation, are transmitted to the control unit 21. …”, See for example, Par [0061]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify AHN by Yoshimoto because this would help improve product quality and reliability. Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over AHN in view of Yoshimoto as applied to claim 11, and further in view of Seok et. al. (US 2016/0079199 A1, hereinafter “Seok”). In regards to claim 14, AHN as modified above discloses all limitations of claim 11 except that a step (e) of capturing an image of the upper surface of the substrate placed on the substrate support member by a substrate camera; and a step (f) of capturing an image of the lower surface of the semiconductor chip supported on the chip support member by a chip camera, wherein the step (c) comprises adjusting a position and a direction of the semiconductor chip with respect to the substrate using the images captured in the steps (e) and (f). Seok while disclosing apparatus for bonding semiconductor chips teaches (See, for example, Figs. 1) further comprising: a step (e) of capturing an image of the upper surface of the substrate placed on the substrate support member by a substrate camera (“…a second camera to capture an image of the substrate and to obtain positional information regarding the substrate…”, See, for example, Abstarct); and a step (f) of capturing an image of the lower surface of the semiconductor chip supported on the chip support member by a chip camera (“…first camera to capture an image of the semiconductor chip and to obtain positional information regarding the semiconductor chip…”, See, for example, Abstract) , wherein the step (c) comprises adjusting a position and a direction of the semiconductor chip with respect to the substrate using the images captured in the steps (e) and (f) (“…The bonding controller may calculate position precision of the correction chip on the correction substrate in accordance with the fiduciary marks on the correction chip and the correction substrate as captured by the first and second cameras, respectively.”, See, for example, Pars [0016] and [0025]). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the invention to modify AHN further by Seok because this would help enhance precision. Correspondence Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERMIAS T WOLDEGEORGIS whose telephone number is (571)270-5350. The examiner can normally be reached on Monday-Friday 8 am - 5 pm E.S.T.. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERMIAS T WOLDEGEORGIS/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Nov 26, 2023
Application Filed
Jan 24, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
83%
With Interview (+11.9%)
3y 0m
Median Time to Grant
Low
PTA Risk
Based on 743 resolved cases by this examiner. Grant probability derived from career allow rate.

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