DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This is response to Application 18/519,617 filed on 11/27/2023. Claims 1-20 are pending in the office action.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7, 8-17, and 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over He et al., (GSQAS: Graph Self-supervised Quantum Architecture Search, ScienceDirect, October 9th, 2023, pages 1-14).
As per claims 1, 11, and 20: He teaches a method for generating quantum circuits, the method comprising:
a) sampling, by a processor, a search space for candidate quantum circuits for a circuit layer of a quantum circuit design (He, page 2, the search module uses a search strategy to explore high-performance quantum circuit in the search space; also see 3.1. Quantum Architecture search “QAS”, page 3, “search space” and “candidate circuit structure”, and fig. 1, search space);
b) evaluating, by the processor, performance of the candidate quantum circuits for the circuit layer (He, page 2, evaluation module calculates the performance of quantum circuit as feedback to guide the search module, page 3, 3.1. Quantum Architecture search “QAS”, evaluate performance of quantum circuits and provide practical guidance for QAS algorithm);
c) selecting, by the processor, one of the candidate quantum circuits for the circuit layer based on the evaluated performance (He, page 3, 3.1. Quantum Architecture search “QAS”, the predictor provides quantum circuits for final selection and also see fig. 1, candidate circuits); and
d) adding, by the processor, an additional circuit layer based on the quantum circuit design to the selected one of the candidate quantum circuits (He, page 9, 5.1. Variational quantum eigensolver for TFIM, a layerwise pipeline to generate quantum circuits, i.e., the circuit is constructed by iteratively adding a layer of n/2 gates. … select a gate type and then place it to either all the odd qubits or all the even qubits. If the selected gate is a two-qubit gate, it operates on either qubits (1,2), (3,4), (5,0) or qubits (0,1), (2,3),(4,5)).
He does not implicitly teach “a system: includes a processor, a memory (computer readable medium) having programming instructions stored thereon, which, when executed by the process, causes the system performing operations/method”.
He teaches a graph self-supervised quantum architecture search (GSQAS) using self-supervised learning (SSL).
It would have been obvious to one of ordinary skill in the art at the time of the effective filling date of claimed invention to understood that He’s machine learning (self-supervised learning) would have a computer involve in training process in the machine learning that provides quickly turnaround.
As per claims 2 and 12: He teaches the method of claim 1, further comprising: repeating, by the processor, steps (a)-(d) until the quantum circuit design is complete He, page 9, 5.1. Variational quantum eigensolver for TFIM, a layerwise pipeline to generate quantum circuits, i.e., the circuit is constructed by iteratively adding a layer of n/2 gates and also see fig. 1 and fig. 2, shown iteratively process).
As per claims 3 and 13: He teaches the method of claim 1, further comprising: setting, by the processor, the search space for the candidate quantum circuits based on a functionality of the circuit layer of the quantum circuit design (He, page 10, higher accuracy of the predictor in estimating the performance of quantum circuit in calculating the ground-truth performance).
As per claims 4 and 14: He teaches the method of claim 1, wherein sampling, by the processor, the search space for the candidate quantum circuits for the circuit layer of the quantum circuit design comprises: randomly sampling the search space for the candidate quantum circuits for the circuit layer of the quantum circuit design (He, page 9, randomly drawn from the search space; page 11, the trained predictor is used to estimate the performance of 50,000 circuits for coarse screening randomly selected from the circuit space).
As per claims 5 and 15: He teaches the method of claim 1, wherein evaluating, by the processor, the performance of the candidate quantum circuits for the circuit layer comprises: computing a metric including at least one of energy usage and accuracy of the candidate quantum circuits (He, page 8, filter out quantum circuits with poor performance and training a predictor to estimate the energy of the remaining quantum circuits).
As per claims 6 and 16: He teaches the method of claim 5, wherein evaluating, by the processor, the performance of the candidate quantum circuits for the circuit layer comprises: ranking, by the processor, the candidate quantum circuits based on the metric for each of the candidate quantum circuits (He, page 3, ranking of circuits, page 11, calculate the ground-truth performance of these circuits sequentially according to the order of the predict performance until the quantum classifier achieves a specified classification accuracy).
As per claims 7 and 17: He teaches the method of claim 1, wherein selecting, by the processor, the one of the candidate quantum circuits for the circuit layer based on the evaluated performance comprises: selecting the one of the candidate quantum circuits determined to have a maximum performance among the candidate quantum circuits (He, page 8, filter out quantum circuits with poor performance and training a predictor to estimate the energy of the remaining quantum circuits; page 9, remaining circuits with lower ground-truth energies below -7.7, and the density of high-performance circuits after the filter process)
As per claims 9 and 19: He teaches the method of claim 1, further comprising: setting, by the processor, the search space to include quantum gates to achieve a functionality of the circuit layer of the quantum circuit design (He, page 10, higher accuracy of the predictor in estimating the performance of quantum circuit in calculating the ground-truth performance).
As per claim 10: He teaches the method of claim 1, further comprising: setting, by the processor, the quantum circuit design as a variational quantum Eigensolver (VQE) algorithm or a variational quantum classifier (VQC) algorithm (He, page 4, VQE, page 7, VQE and VQC).
Allowable Subject Matter
Claims 8 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: the prior art of record does not teach the limitation of claims 8 and 18: further comprising: repeating, by the processor, steps (a)-(d) for the additional circuit layer, such that the evaluated performance is performed for a combination of the circuit layer connected to the additional layer.
Conclusion
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NGHIA M. DOAN
Primary Examiner
Art Unit 2851
/NGHIA M DOAN/Primary Examiner, Art Unit 2851
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