DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 2, Sub-Species B, Sub-species BB, claims 1-4, 9-11 and 15-20 in the reply filed on March 11, 2026 is acknowledged. Claims 5-8 and 12-14 have been withdrawn. Action on the merits is as follows:
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-4, 16, 18 and 19 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hwang et al. (KR 20210075549 A1).
In regards to claim 1, Hwang (Figs. 1, 2, 4, 6, 7 and associated text and items) discloses a display device (Fig. 1) comprising: a display area (item AA) including a first area (where items EA1 resides) and a second area (items NEA or where EA2 or EA3 resides) positioned outside the first area (where items EA1 resides); a cathode electrode (items 220 or 321, 322) including a plurality of cathode holes (item TA1) in the first area (where item EA1 resides); a first light emitting element (item 331) positioned in the first area (where item EA1 resides) and including a first anode electrode (item 330); a first subpixel circuit unit (items 710) positioned in the second area (items NEA or where EA2 or EA3 resides); and an anode extension line (extended portion of 330) electrically connecting the first subpixel circuit unit (item 710) and the first anode electrode (item 330).
In regards to claim 2, Hwang (Figs. 1, 2, 4, 6, 7, 8 and associated text and items) discloses further comprising a patterning layer (item 795) positioned in the same area as the cathode hole (item TA1).
In regards to claim 3, Hwang (Figs. 1, 2, 4, 6, 7 and associated text and items) discloses further comprising: a plurality of emission areas (item EA) disposed in the display area (item AA); and a plurality of signal lines (items DL, GL) for driving the plurality of emission areas (item EA), wherein at least a portion of one or more of the signal lines (items DL, GL) overlaps one or more of the cathode holes (item TA1).
In regards to claim 4, Hwang (Figs. 1, 2, 4, 6, 7 and associated text and items) discloses wherein the signal line (items DL, GL) is a gate line or a data line (items DL, GL) .
In regards to claim 16, Hwang (Figs. 1, 2, 4, 6, 7 and associated text and items) discloses wherein the cathode holes (item TA1) in the first area cause the first area (where item EA1 resides) to have a greater transmittance per unit area than other areas of the display area (item AA).
In regards to claim 18, Hwang (Figs. 1, 2, 4, 6, 7 and associated text and items) discloses wherein the emission area (item EA) per unit area in the first area (where item EA1 resides) is less than the emission area (item EA) per unit area in the second area (where item EA2 or EA3 resides).
In regards to claim 19, Hwang (Figs. 1, 2, 4, 6, 7 and associated text and items) discloses wherein the area occupied by cathode holes (item TA1) per unit area of the first area (where item EA1 resides) in a center of the first area may be larger than that nearer a boundary of the first area (where item EA1 resides).
Claim(s) 1-4 and 15-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lee et al. (Lee) (US 2024/0244886 A1).
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
In regards to claim 1, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses a display device (Fig. 2) comprising: a display area (item DA) including a first area (item OA, OA1) and a second area (item OBA) positioned outside the first area (item OA, OA1); a cathode electrode (item CE) including a plurality of cathode holes (item CH) in the first area (item OA, OA1); a first light emitting element (items ED1, ED4) positioned in the first area (item OA, OA1) and including a first anode electrode (item AE); a first subpixel circuit unit (items SPC1, SPC2 or SPC4) positioned in the second area (item OBA); and an anode extension line (item AEL) electrically connecting the first subpixel circuit unit (items SPC1, SPC2 or SPC4) and the first anode electrode (item AE).
In regards to claim 2, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses further comprising a patterning layer (item MPL) positioned in the same area as the cathode hole (item CH).
In regards to claim 3, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses further comprising: a plurality of emission areas (item EA) disposed in the display area (item DA); and a plurality of signal lines (items DL, GL) for driving the plurality of emission areas (item EA), wherein at least a portion of one or more of the signal lines (items DL, GL) overlaps one or more of the cathode holes (item CH).
In regards to claim 4, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses wherein the signal line (items DL, GL) is a gate line or a data line (items DL, GL) .
In regards to claim 15, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses further comprising an optical component (items 11, 12) positioned behind the first area (item OA, OA1), wherein the optical component (items 11, 12) is arranged to receive or transmit light through the plurality of cathode holes (item CH).
In regards to claim 16, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses wherein the cathode holes (item CH) in the first area cause the first area (item OA, OA1) to have a greater transmittance per unit area than other areas of the display area (item DA).
In regards to claim 17, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses further comprising a second subpixel circuit unit (items SPC1, SPC2 or SPC4) positioned in the second area (item OBA) adjacent to the first subpixel circuit unit (items SPC1, SPC2 or SPC4), wherein the first subpixel circuit unit (items SPC1, SPC2 or SPC4) includes a first driving transistor (item DT1, DT2 or DT4) including a first semiconductor (item ACT1 or ACT2), the second subpixel circuit unit (items SPC1 or SPC2) includes a second driving transistor (items DT1 or DT2) having a second semiconductor (items ACT1 or ACT2), wherein the first semiconductor (items ACT1 or ACT2) is on a different layer from the second semiconductor (item ACT1 or ACT2).
In regards to claim 18, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses wherein the emission area (item EA) per unit area in the first area (items OA, OA1) is less than the emission area (item EA) per unit area in the second area (item OBA).
In regards to claim 19, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses wherein the area occupied by cathode holes (item CH) per unit area of the first area (item OA, OA1) in a center of the first area (item OA, OA1) may be larger than that nearer a boundary of the first area (item OA, OA1).
In regards to claim 20, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses wherein the first area (item OA, OA1) may contain a first cathode hole (item CH) having a larger size than that of a second cathode hole (item CH), wherein the second cathode hole (item CH) may be positioned closer to the boundary of the first area (item OA, OA1) than the first cathode hole (item CH).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 9-11 is/are rejected under 35 U.S.C. 103 as being obvious over Lee et al. (Lee) (US 2024/0244886 A1).
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2).
In regards to claim 9, Lee does not specifically disclose wherein the cathode hole has an inverted triangular shape, one of three sides of which includes a concave portion.
However Lee (paragraph 154) discloses “the cathode holes CH may have various shapes other than the circular shape, such as an elliptical shape, a polygonal shape, or an irregular shape.”
It would have been obvious to modify the invention to include a cathode hole having an inverted triangular shape, one of three sides of which includes a concave portion, since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art (In re Rose, 105 USPQ 237 (CCPA 1955)).
In regards to claim 10, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses further comprising a plurality of emission areas (item EA) disposed in the display area (item DA), but does not specifically disclose wherein the plurality of emission areas constitute a V-shaped pixel in the first area, and wherein one, positioned opposite the concave portion, of vertexes of the cathode hole having the inverted triangle shape is positioned corresponding to a valley of the V-shaped pixel.
It would have been obvious to modify the invention to include a plurality of emission areas constitute a V-shaped pixel in the first area, and wherein one, positioned opposite the concave portion, of vertexes of the cathode hole having the inverted triangle shape is positioned corresponding to a valley of the V-shaped pixel, since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art (In re Rose, 105 USPQ 237 (CCPA 1955)).
In regards to claim 11, Lee (Figs. 1B, 2, 4-9, 12-17 and associated text and items) discloses further comprising a plurality of signal lines (items DL, GL) for driving the plurality of emission areas (item EA), wherein at least one of the signal lines (items DL, GL) are positioned to overlap the pixel and the cathode hole (item CH).
This rejection under 35 U.S.C. 103 might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C.102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B); or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement. See generally MPEP § 717.02.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 20240244886 A1, US 20230172029 A1, US 20230157072 A1, US 20240130197 A1, US-20240130185-A1, US-20240130193 A1, US 20240128245 A1, US 20240138219 A1), US 12514077 B2, KR 20230040134 A and EP 4185087 A read all anticipate claim 1 and other claims as well in their own way. Examiner suggests excluding these references since they all share the same assignee.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TELLY D GREEN whose telephone number is (571)270-3204. The examiner can normally be reached M-F 8am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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TELLY D. GREEN
Examiner
Art Unit 2898
/TELLY D GREEN/Primary Examiner, Art Unit 2898 March 31, 2026
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