Prosecution Insights
Last updated: April 19, 2026
Application No. 18/520,377

MEMORY CELL PROTECTIVE LAYERS IN A THREE-DIMENSIONAL MEMORY ARRAY

Non-Final OA §103
Filed
Nov 27, 2023
Examiner
DANG, PHUC T
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Micron Technology, Inc.
OA Round
1 (Non-Final)
95%
Grant Probability
Favorable
1-2
OA Rounds
2y 1m
To Grant
96%
With Interview

Examiner Intelligence

Grants 95% — above average
95%
Career Allow Rate
1716 granted / 1800 resolved
+27.3% vs TC avg
Minimal +1% lift
Without
With
+1.2%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
32 currently pending
Career history
1832
Total Applications
across all art units

Statute-Specific Performance

§101
1.0%
-39.0% vs TC avg
§103
59.2%
+19.2% vs TC avg
§102
25.0%
-15.0% vs TC avg
§112
9.4%
-30.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1800 resolved cases

Office Action

§103
DETAILED ACTION 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Cross-Reference to Related Applications 2. This application claims benefit of 63/430,272 12/05/2022 Oath/Declaration 3. The oath/declaration filed on 11/27/2023 is acceptable. Information Disclosure Statement 4. The office acknowledges receipt of the following items from the applicant: Information Disclosure Statement (IDS) filed on 05/21/2024. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 5. Claim 1 is rejected under 35 U.S.C. 103(a) as being unpatentable over Kim (U.S. Publication No. 10,903,221 B2) in view of Kim et al., hereafter “Kim’213” (U/S. Publication No. 20210013213 A1). Regarding claim 1, Kim discloses a method, comprising: forming a stack of layers (18/20) over a substrate (22), the stack of layers comprising layers of a first material (18) and layers of a dielectric material (20, SiO2); removing a portion of a layer of the first material (18), wherein a cavity (52, Fig. 14) between a first layer of the dielectric material (18) and a second layer (20) of the dielectric material is formed based at least in part on the removing; forming a barrier material (54) in the cavity (52), wherein the barrier material (54) is formed on a first surface of the first layer of the dielectric material (18) and on a second surface of the second layer of the dielectric material (20); and forming a memory cell (70) between the barrier material (54) on the first surface of the first layer of the dielectric material (18) and the barrier material (54) on the second surface of the second layer of the dielectric material (20), wherein the memory cell (70) is isolated from the dielectric material based at least in part on the barrier material (54) (e.g. Fig. 16). Kim discloses the features of the claimed invention as discussed above, but does not disclose forming a barrier material comprising boron. Kim’213, however, discloses the barrier material (116) comprises silicon nitride, boron nitride, germanium nitride, aluminum nitride, silicon oxynitride, boron oxynitride, germanium oxynitride, aluminum oxynitride, or silicon carbonitride (Fig. 1C and abstract). It would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to use the boron barrier material of Kim’213 with Kim because such material substitution or replacement would have been considered a mere substitution of art-recognized equivalent values, i.e. to reduce the dielectric constant and improve conductivity. MPEP 2144.06. 6. Claims 14 and 20 are rejected under 35 U.S.C. 103(a) as being unpatentable over Tortorelli et al., hereafter “Tortorelli” (U.S. Publication No. 11,729,999 B2) in view of Kim et al., hereafter “Kim’213” (U/S. Publication No. 20210013213 A1). Regarding claim 14, Kim discloses an apparatus, comprising: a plurality of levels of a memory array (505) arranged over a substrate and separated from each other by a respective layer of a plurality of layers of a dielectric material (525); a pillar (530-a/530-b) extending through the plurality of levels of the memory array in a first direction (Y-direction), wherein, at each level of the plurality of levels, one or more memory cells (505) of the memory array are coupled with a respective word line (515) and the pillar (530-a/530-b); and a barrier material (535-a-535-f) and located between a respective memory cell (505) and respective layers of the dielectric material (525) in between which the respective memory cell (505) is located, wherein the respective memory cell (505) is isolated from the dielectric material (525) based at least in part on the barrier material (535-a-535-f) (Fig. 5). Tortorelli, discloses the features of the claimed invention as discussed above, but does not disclose forming a barrier material comprising boron. Kim’213, however, discloses the barrier material (116) comprises silicon nitride, boron nitride, germanium nitride, aluminum nitride, silicon oxynitride, boron oxynitride, germanium oxynitride, aluminum oxynitride, or silicon carbonitride (Fig. 1C and abstract). It would have been obvious to one having ordinary skill before the effective filing date of the claimed invention to use the boron barrier material of Kim’213 with Tortorelli because such material substitution or replacement would have been considered a mere substitution of art-recognized equivalent values, i.e. to reduce the dielectric constant and improve conductivity. MPEP 2144.06. Regarding claim 20, Tortorelli and Kim’213 (citations to Tortorelli unless otherwise noted) disclose wherein the barrier material comprises boron nitride, silicon boron nitride, germanium, aluminum, one or more doped-transition metals, or any combination thereof (Fig. 1C and abstract in Kim’213). Allowable Subject Matter 7. The following is a statement of reason for the indication of allowable subject matter: Claims 9-13 would be allowed. Claims 9-13 are considered allowable since the prior art of record and the considered pertinent to the applicant’s disclosure does not teach or suggest the claimed invention of a method having doping both a first surface of the first layer of the dielectric material and a second surface of the second layer of the dielectric material with a second material comprising boron; and forming a memory cell between the doped first surface of the first layer of the dielectric material and the doped second surface of the second layer of the dielectric material, as cited in the independent claim 19. Claims 10-13 are directly or indirectly depend on the independent claim 9, then, they are also being allowed. Claims 2-8 and 15-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 8. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc T. Dang whose telephone number is 571-272-1776. The examiner can normally be reached on 8:00 am-5:00 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PHUC T DANG/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Nov 27, 2023
Application Filed
Jan 23, 2026
Non-Final Rejection — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
95%
Grant Probability
96%
With Interview (+1.2%)
2y 1m
Median Time to Grant
Low
PTA Risk
Based on 1800 resolved cases by this examiner. Grant probability derived from career allow rate.

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