Prosecution Insights
Last updated: October 01, 2026
Application No. 18/521,547

LIGHT DETECTING PIXEL USING VERTICAL GATES AND PLANAR GATES

Non-Final OA §102§103§112
Filed
Nov 28, 2023
Examiner
RAHIM, NILUFA
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
STMicroelectronics N.V.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
82%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
400 granted / 479 resolved
+15.5% vs TC avg
Minimal -1% lift
Without
With
+-1.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
28 currently pending
Career history
514
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
47.4%
+7.4% vs TC avg
§102
27.2%
-12.8% vs TC avg
§112
21.2%
-18.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 479 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species I, figs. 3A-3C, reading on claims 1-5, 7-19 in the reply filed on 07/03/2026 is acknowledged. Claims 6 and 20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 07/03/2026. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2-5 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 2 recites the limitation "wherein the first and second planar vertical gates" in lines 9-10. There is insufficient antecedent basis for this limitation in the claim. Claim 2 has cited the first and second vertical gates and the first and second planar gates in lines 2-9. However, there are no earlier recitation of “first and second planar vertical gates” have been cited in claims 1 and 2. Furthermore, this term is ambiguous as it is referring to first and second gates which are both planar and vertical. For the purposes of examination, this limitation will be interpreted as “wherein the first and second planar gates are configured to direct the one or more carriers to the first sensing node or the second sensing node using the first and second planar gate control signals”. Claims 3-5 do not cure the deficiencies and likewise rejected. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-4, 7-8, 13-18 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Mono et al. (US 20230317745 A1; hereinafter “Mono”). In re claim 1, Mono discloses, in figs. 3-5, a pixel, comprising: a substrate (substrate having a photoactive region 110, a first side 102 and a second side 102; hereinafter “Subx”) configured to generate one or more carriers in response to an incident light beam (¶19-21, 46-47); a first vertical gate 134 and a second vertical gate 134 disposed inside the substrate (Subx) (¶36), wherein the first and second vertical gates 134, 134 are configured to direct the one or more carriers to a transfer zone of the substrate 303 (see fig. 3; ¶46-47); and a first planar gate 120 and a second planar gate 122 disposed on the substrate (Subx) (¶23-24), wherein the first and second planar gates 120, 122 are configured to direct the one or more carriers from the transfer zone to a first sensing node 140 or a second sensing node 142 (¶34). In re claim 2, Mono discloses, in figs. 3-5, the pixel of claim 1, comprising: a first vertical gate input electronically coupled to the first vertical gate 134 and configured to receive a first vertical gate control signal (e.g., a negative potential; ¶43); a second vertical gate input electronically coupled to the second vertical gate 134 and configured to receive a second vertical gate control signal (e.g., a negative potential; ¶43); a first planar gate input electronically coupled to the first planar gate 120 and configured to receive a first planar gate control signal (¶34); and a second planar gate input electronically coupled to the second planar gate 122 and configured to receive a second planar gate control signal (¶34), wherein the first and second planar vertical gates (as best understood; first and second planar gates) 120, 122 are configured to direct the one or more carriers to the first sensing node 140 or the second sensing node 142 using the first and second planar gate control signals (¶34; “the first memory part 140 is configured to bin electrons generated in the photoactive region 110 when the first modulation gate 120 is active and not bin electrons when the first modulation gate 120 is inactive” and “The second memory part 142 is configured to bin electrons generated in the photoactive region when the second modulation gate 122 is active and not bin electrons when the second modulation gate 122 is inactive”). In re claim 3, Mono discloses, in figs. 3-5, the pixel of claim 2, wherein: the first and second vertical gates 134, 134 are configured to be activated using the first and second vertical gate control signals and direct the one or more carriers to the transfer zone 303 when activated (¶43, 46-47); the first planar gate 120 is configured to be activated using the first planar gate control signal and direct the one or more carriers to the first sensing node 140 when activated (¶34); and the second planar gate 122 is configured to be activated using the second planar gate control signal and direct the one or more carriers to the second sensing node 142 when activated (¶34). In re claim 4, Mono discloses, in figs. 3-5, the pixel of claim 3 outlined above. Regarding the claim limitation: “wherein: the first and second vertical gates are configured to be activated concurrently; the first planar gate is configured to be activated when the second planar gate is deactivated; and the second planar gate is configured to be activated when the first planar gate is deactivated”. Note, claim 3 is directed to a pixel device, not to a method of operating and/or using the pixel device. Since Mono discloses all the structural limitations of the pixel device recited in claim 3, the method of operating and/or using the device of claim 3 does not distinguish it from the pixel device taught by Mono. MPEP § 2114-II states that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990). In re claim 7, Mono discloses, in figs. 3-5, the pixel of claim 1, further comprising: a first deep insulation trench 410 on a first side of the substrate (e.g., on a left side of the substrate, Subx) (¶49-51); and a second deep insulation trench 410 on a second side of the substrate (e.g., on a right side of the substrate, Subx), wherein the first and second deep insulation trenches 410, 410 are configured to create a pinning potential at the substrate to deplete the substrate (¶51-52). In re claim 8, Mono discloses, in figs. 3-5, the pixel of claim 1, Wherein the pixel is configured to determine an indirect time of flight (iToF) (¶23, 61). Regarding the claim limitation: “the first planar gate and the second planar gate are configured to be activated alternatively using the first planar gate control signal and the second planar gate control signal, wherein the first planar gate control signal is a complement of the second planar gate control signal at a given time; the first and second vertical gates are configured to be activated using the first and second vertical gate control signals”. Note, claim 8 is directed to a pixel device, not to a method of operating and/or using the pixel device. Since Mono discloses all the structural limitations of the pixel device recited in claim 8, the method of operating and/or using the device of claim 8 does not distinguish it from the pixel device taught by Mono. MPEP § 2114-II states that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990). In re claim 13, Mono discloses, in figs. 3-6, a method, comprising: disposing a first vertical gate 134 and a second vertical gate 134 inside a substrate (substrate having a photoactive region 110, a first side 102 and a second side 102; hereinafter “Subx”) (¶36), wherein the first and second vertical gates 134, 134 are configured to direct one or more carriers to a transfer zone of the substrate 303 (see fig. 3; ¶46-47, 61); wherein the one or more carriers are generated inside the substrate (Subx”) in response to an incident light beam (¶19-21, 46-47, 61); and disposing a first planar gate 120 and a second planar gate 122 on the substrate (Subx) (¶23-24), wherein the first and second planar gates 120, 122 are configured to direct the one or more carriers from the transfer zone to a first sensing node 140 or a second sensing node 142 (¶34). In re claim 14, Mono discloses, in figs. 3-5, the method of claim 13, comprising: configuring a first vertical gate input to receive a first vertical gate control signal (e.g., a negative potential; ¶43), wherein the first vertical gate input is electronically coupled to the first vertical gate 134 (¶43); configuring a second vertical gate input to receive a second vertical gate control signal (e.g., a negative potential; ¶43), wherein the second vertical gate input is electronically coupled to the second vertical gate 134 (¶43); configuring a first planar gate input to receive a first planar gate control signal (¶34), wherein the first planar gate input is electronically coupled to the first planar gate 120 (¶34); configuring a second planar gate input to receive a second planar gate control signal (¶34), wherein the second planar gate input is electronically coupled to the second planar gate 122 (¶34), wherein the first and second planar gates 120, 122 are configured to direct the one or more carriers to the first sensing node 140 or the second sensing node 142 using the first and second planar gate control signals (¶34; “the first memory part 140 is configured to bin electrons generated in the photoactive region 110 when the first modulation gate 120 is active and not bin electrons when the first modulation gate 120 is inactive” and “The second memory part 142 is configured to bin electrons generated in the photoactive region when the second modulation gate 122 is active and not bin electrons when the second modulation gate 122 is inactive”). In re claim 15, Mono discloses, in figs. 3-5, the method of claim 14 comprising: configuring the first and second vertical gates to be activated using the first and second vertical gates control signals, configuring the first and second vertical gates 134, 134 to be activated using the first and second vertical gate control signals (¶43, 46-47); wherein the first and second vertical gates 134, 134 direct the one or more carriers to the transfer zone 303 when the first and second vertical gates 134, 134 are activated (¶43, 46-47); configuring the first planar gate 120 to be activated using the first planar gate control signal and direct the one or more carriers to the first sensing node 140 when activated (¶34); and configuring the second planar gate 122 to be activated using the second planar gate control signal and direct the one or more carriers to the second sensing node 142 when activated (¶34). In re claim 16, Mono discloses, in figs. 3-5, the method of claim 15 outlined above. Regarding the claim limitation: “configuring the first planar gate to be deactivated when the second planar gate is activated; configuring the second planar gate to be deactivated when the first planar gate is activated”. Note, claim 15 is directed to a method of making a pixel device, not to a method of operating and/or using the pixel device. Since Mono discloses all the limitations of the method of making the pixel device recited in claim 15, the method of operating and/or using the device of claim 15 does not distinguish it from the method of making the pixel device taught by Mono. MPEP § 2114-II states that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990). In re claim 17, Mono discloses, in figs. 3-5, the method of claim 14, comprising: disposing a first deep insulation trench 410 on a first side of the substrate (e.g., on a left side of the substrate, Subx) (¶49-51); and disposing a second deep insulation trench 410 on a second side of the substrate (e.g., on a right side of the substrate, Subx) (¶49-51), wherein the first and second deep insulation trenches 410, 410 are configured to create a pinning potential at the substrate to deplete the substrate (¶51-52). In re claim 18, Mono discloses, in figs. 3-5, the method of claim 14 comprising: activating the first vertical gate 134 using the first vertical gate control signal, wherein the first vertical gate control signal is a DC voltage (e.g., a negative potential; ¶43); and activating the second vertical gate 134 using the second vertical gate control signal, wherein the second vertical gate control signal is a DC voltage (e.g., a negative potential; ¶43). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mono as applied to claim 4 above, and further in view of Nakamura et al. (US 20250089384 A1; hereinafter “Nakamura”). In re claim 5, Mono discloses, in figs. 3-5, the pixel of claim 4, wherein the first and second vertical gate control signals are DC voltages (e.g., negative potentials; ¶43). Mono does not expressly disclose the first and second planar gate control signals include periodic waveforms and are complements of each other. In the same field of endeavor, Nakamura discloses, in figs. 15-17, a pixel, wherein: a first and a second planar gate control signals V2, V2 to a first and second transfer gates TG1, TG2 include periodic waveforms and are complements of each other (fig. 17; ¶260-263). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Nakamura into the pixel circuit of Mono in order to reduce power consumption (¶260-263 of Nakamura). Claim(s) 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mono as applied to claim 1 above, and further in view of Hamasaki et al. (US 20260056297 A1; hereinafter “Hamasaki”). In re claim 9, Mono discloses, in figs. 3-5, the pixel of claim 1 outlined above. Mono does not expressly disclose the pixel is configured to provide two-dimensional imaging. In the same field of endeavor, Hamasaki discloses, in figs. 1-9, a pixel for measuring distance is configured to provide two-dimensional imaging (¶161). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form the array of pixels in the device of Mono which can provide two-dimensional imaging to reduce error in distance measuring device (¶4-5 of Hamasaki). Regarding the claim limitation: “the first vertical gate and the second vertical gate are configured to be deactivated simultaneously, and the first planar gate and the second planar gate are configured to be deactivated simultaneously for a first period of time; the first vertical gate and the second vertical gate are configured to be activated, and the first or the second planar gates are configured to be activated for a second period of time”. Note, claim 9 is directed to a pixel device, not to a method of operating and/or using the pixel device. Since Mono in view of Hamasaki discloses all the structural limitations of the pixel device recited in claim 9, the method of operating and/or using the device of claim 9 does not distinguish it from the pixel device taught by Mono as modified by Hamasaki. MPEP § 2114-II states that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990). Claim(s) 10-12, 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Mono Yang et al. (US 20240418836 A1; hereinafter “Yang”). In re claim 10, Mono discloses, in figs. 3-5, a pixel, comprising: a substrate (substrate having a photoactive region 110, a first side 102 and a second side 102; hereinafter “Subx”) configured to generate one or more carriers in response to an incident light beam (¶19-21, 46-47); a first vertical gate 134 and a second vertical gate 134 disposed inside the substrate (Subx) (¶36), wherein the first and second vertical gates 134, 134 are configured to direct the one or more carriers towards the first and second vertical gates 134, 134 (see fig. 3; ¶46-47); a first planar gate input electronically coupled to a first planar gate 120 and configured to receive a first planar gate control signal (¶23-24, 34, 61); and a second planar gate input electronically coupled to a second planar gate 122 and configured to receive a second planar gate control signal (¶23-24, 34, 61), wherein the first and second planar gates 120, 122 are configured to direct the one or more carriers from the transfer zone to a first sensing node 140 or a second sensing node 142 (¶34, 61). Mono does not expressly disclose wherein the first and second planar gates are configured to direct the one or more carriers to a first capacitor or a second capacitor using the first and second gate control signals. In the same field of endeavor, Yang discloses in figs. 1-3, a pixel, wherein a first and a second transfer gates 320A, 320B are configured to direct the one or more carriers to a first capacitor 328A or a second capacitor 320B using a first and a second gate control signals TXA, TXB (¶20, 34-42). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to add two supplemental capacitors in the pixel array circuitry of Mono as taught by Yang in order to retain the charges stored in the memory part. In re claim 11, Mono in view of Yang discloses the pixel of claim 10. Mono further discloses in figs. 4A-4B, wherein the first and second planar gates 120, 122 and the first and second vertical gates 134, 134 are disposed in proximity of a same surface of the substrate 101. Yang further discloses in figs. 1-3, the first planar gate 320A is configured to be activated using the first gate control signal TXA and direct the one or more carriers to the first capacitor 328A when activated; and the second planar gate 320B is configured to be activated using the second planar gate control signal TXB and direct the one or more carriers to the second capacitor 328B when activated (¶20, 34-42). In re claim 12, Mono in view of Yang discloses the pixel of claim 11. Regarding the claim limitation: “wherein: the first planar gate is deactivated when the second planar gate is activated; the second planar gate is deactivated when the first planar gate is activated; and the first and second planar gate control signals include periodic waveforms and are complements of each other”. Note, claim 12 is directed to a pixel device, not to a method of operating and/or using the pixel device. Since Mono in view of Yang discloses all the limitations of the the pixel device recited in claim 12, the method of operating and/or using the device of claim 12 does not distinguish it from the the pixel device taught by Mono in view of Yang. MPEP § 2114-II states that a claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987). While features of an apparatus may be recited either structurally or functionally, claims directed to an apparatus must be distinguished from the prior art in terms of structure rather than function. In re Schreiber, 128 F.3d 1473, 1477-78, 44 USPQ2d 1429, 1431-32 (Fed. Cir. 1997); see also In re Swinehart, 439 F.2d 210, 212-13, 169 USPQ 226, 228-29 (CCPA 1971); In re Danly, 263 F.2d 844, 847, 120 USPQ 528, 531 (CCPA 1959). “[A]pparatus claims cover what a device is, not what a device does.” Hewlett-Packard Co. v. Bausch & Lomb Inc., 909 F.2d 1464, 1469, 15 USPQ2d 1525, 1528 (Fed. Cir. 1990). In re claim 19, Mono discloses the method of claim 18 outlined above. Mono does not expressly disclose the method further comprising: electronically coupling the first sensing node with a first supplemental capacitor; electronically coupling the second sensing node with a second supplemental capacitor; and configuring the first and second supplemental capacitors to determine an indirect time of flight or a two-dimensional density image using a first charge values of the first supplemental capacitor and a second charge value of the second supplemental capacitor. In the same field of endeavor, Yang discloses in figs. 1-3, a method, comprising: electronically coupling a first sensing node 334A with a first supplemental capacitor 328A; electronically coupling the second sensing node 334B with a second supplemental capacitor 328B (¶39-40); and configuring the first and second supplemental capacitors 328A, 328B to determine an indirect time of flight or a two-dimensional density image using a first charge values of the first supplemental capacitor 328A and a second charge value of the second supplemental capacitor 328B (¶20, 34-42; as described in these paragraphs, the time-of-flight pixel circuit 312 employs charge values in the supplemental capacitors 328A, 328B to determine an indirect time of flight). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to add two supplemental capacitors in the pixel array circuitry of Mono as taught by Yang in order to retain the charges stored in the memory part. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Vietzke et al. (US 20240128295 A1) discloses an indirect time of flight (iToF) sensors with vertical gates and planar gates. Any inquiry concerning this communication or earlier communications from the examiner should be directed to NILUFA RAHIM whose telephone number is (571)272-8926. The examiner can normally be reached M-F 9am-5:30pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J. Green can be reached at (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NILUFA RAHIM/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Nov 28, 2023
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12740127
SEMICONDUCTOR DEVICE
3y 4m to grant Granted Sep 15, 2026
Patent 12740248
ELECTRONIC PANEL AND ELECTRONIC APPARATUS INCLUDING THE SAME
3y 1m to grant Granted Sep 15, 2026
Patent 12727499
SEMICONDUCTOR PACKAGE
3y 1m to grant Granted Sep 01, 2026
Patent 12727290
LIGHT-EMITTING DEVICE, BACKLIGHT UNIT AND DISPLAY APPARATUS HAVING THE SAME
3y 0m to grant Granted Sep 01, 2026
Patent 12727264
SOLID-STATE IMAGING ELEMENT AND IMAGING DEVICE
3y 1m to grant Granted Sep 01, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
82%
With Interview (-1.0%)
2y 4m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 479 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month