DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Invention I (claims 1-16) in the reply filed on 04/01/2026 is acknowledged. The traversal is on the ground(s) that the amended claim 17 renders the restriction requirement as improper. This is not found persuasive because while etching was provided as an example to an alternate process to that found within the claim, other alternative processes can also be utilized such as a high aspect ratio deposition process such as PE-CVD to produce the light-shielding material in its final orientation with all through-holes without the need for coating or etching. Furthermore Applicant alleges to a “preparing step before the process of coating and etching” however no such preparing step exists within the claim. The example provided by the Examiner is a step process of transferring the processed (etched) light-shielding material from a carrier substrate and therefore a preparing step (currently not within the claim and not found within the disclosure) before the process of coating and etching the light shielding material would not be a functional equivalent.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 6-12, and 14-16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Suh et al. (U.S. Publication No. 2022/0367434 A1; hereinafter Suh) With respect to claim 1. Suh discloses a display panel, comprising: a substrate [90]; a light-shielding layer [77] disposed on the substrate, wherein the light-shielding layer comprises a plurality of through-holes; a transparent insulation layer [81/82/83], wherein the transparent insulation layer comprises a plurality of transparent portions arranged in the plurality of through-holes respectively (see ¶[0106]; allows colored light to pass through); a light-emitting layer disposed on the transparent insulation layer, wherein the light-emitting layer comprises a plurality of light-emitting diode (LED) chips [61/71,62/72, 63/73] are disposed to the plurality of through-holes in a one-to-one correspondence, each of the plurality of LED chips is disposed on a corresponding one of the plurality of transparent portions, and a light-emitting surface the LED chip faces to the transparent portion; a device array layer [20] disposed on the light-shielding layer, wherein the device array layer comprises a driver, and a plurality of metal wirings [26a/51/26b] configured to connect the plurality of LED chips with the driver; and a sealing layer [50] disposed on the substrate, wherein the sealing layer encapsulates the light-shielding layer, the transparent insulation layer, the light-emitting layer, and the device array layer (see Figure 3; inverted).
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With respect to claim 2, Suh discloses wherein the transparent insulation layer further comprises an extension portion disposed on the light-shielding layer, the extension portion is integrally formed with the plurality of transparent portions, and the device array layer is disposed on the extension portion (see Figure 3; each of [81],[82] and [83] possess extensions that overlap [77]).
With respect to claim 3, Suh discloses wherein the plurality of LED chips comprises a red chip, a green chip, and a blue chip, and the plurality of metal wirings are respectively connected to positive electrodes and negative electrodes of the plurality of LED chips (see ¶[0083] and ¶[0087-0090]).
With respect to claim 4, Suh discloses wherein the light-emitting layer comprises at least one light-emitting unit group; each light-emitting unit group comprises at least one group of pixels, and a sealant [50] encapsulating the at least one group of pixels; and each group of pixels comprises a red chip, a green chip and a blue chip (see ¶[0082] and ¶[0088-0090]; sealing layer comprises the sealant material).
With respect to claim 6, Suh discloses wherein a region on the substrate corresponding to the plurality of through-holes is transparent (see ¶[0107]).
With respect to claim 7, Suh discloses wherein a transparent adhesive layer [75] is disposed between the light-emitting layer and the transparent insulation layer (See Figure 3).
With respect to claim 8, Suh discloses wherein the light-shielding layer is provided with a plurality of baffles [70], and each of the plurality of baffles is arranged between adjacent two of the plurality of LED chips (See Figure 3).
With respect to claim 9, Suh discloses a tiled display panel, wherein the tiled display panel is formed by tiling the display panels of claim 1 (see Figure 1).
With respect to claim 10, Suh discloses wherein the transparent insulation layer further comprises an extension portion disposed on the light-shielding layer, the extension portion is integrally formed with the plurality of transparent portions, and the device array layer is disposed on the extension portion (see Figure 3; each of [81],[82] and [83] possess extensions that overlap [77]).
With respect to claim 11, Suh discloses wherein the plurality of LED chips comprises a red chip, a green chip, and a blue chip, and the plurality of metal wirings are respectively connected to positive electrodes and negative electrodes of the plurality of LED chips (see ¶[0083] and ¶[0087-0090]).
With respect to claim 12, Suh discloses wherein the light-emitting layer comprises at least one light-emitting unit group; each light-emitting unit group comprises at least one group of pixels, and a sealant encapsulating the at least one group of pixels; and each group of pixels comprises a red chip, a green chip and a blue chip (see ¶[0082] and ¶[0088-0090]; sealing layer comprises the sealant material).
With respect to claim 14, Suh discloses wherein a region on the substrate corresponding to the plurality of through-holes is transparent (see ¶[0107]).
With respect to claim 15, Suh discloses wherein a transparent adhesive layer [75] is disposed between the light-emitting layer and the transparent insulation layer (see Figure 3).
With respect to claim 16, Suh discloses wherein the light-shielding layer is provided with a plurality of baffles [70], and each of the plurality of baffles is arranged between adjacent two of the plurality of LED chips (See Figure 3).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 5 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Watanabe et al. (U.S. Publication No. 2024/0243109 A1)
With respect to claim 5, Suh fails to disclose wherein positive electrodes or negative electrodes of the plurality of LED chips in each light-emitting unit group shares a same one of the plurality of metal wirings. In the same field of endeavor, Watanabe teaches wherein positive electrodes or negative electrodes of the plurality of LED chips in each light-emitting unit group shares a same one [13] of the plurality of metal wirings (see Figure 7 ¶[0074]). Implementation of a shared metal wiring as taught by Watanabe allows for a singular line for voltage regulation, thereby improving reliability (see ¶[0075). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention.
With respect to claim 13, Suh fails to disclose wherein positive electrodes or negative electrodes of the plurality of LED chips in each light-emitting unit group shares a same one of the plurality of metal wirings.
In the same field of endeavor, Watanabe teaches wherein positive electrodes or negative electrodes of the plurality of LED chips in each light-emitting unit group shares a same one [13] of the plurality of metal wirings (see Figure 7 ¶[0074]). Implementation of a shared metal wiring as taught by Watanabe allows for a singular line for voltage regulation, thereby improving reliability (see ¶[0075). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. - Mezouari et al. (U.S. Patent No. 12,588,345 B1) discloses an LED device.
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/JONATHAN HAN/Primary Examiner, Art Unit 2818
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