DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Response to Amendment
The following office action is in response to the amendment and remarks filed on 7/29/26.
Applicant’s amendment to claims 1 and 5 is acknowledged.
Claims 1-9 are pending and claims 2, 4 and 9 are withdrawn.
Claims 1, 3 and 5-8 are subject to examination at this time.
Response to Arguments
Applicant's arguments filed 7/29/26 have been fully considered but they are not persuasive.
In claim 1, the opening is not required to be a void/empty space. Because claim 1 is a comprising claim, it does not preclude the opening from containing additional elements or being filled.
Thus, Seo teaches the amendment limitation “wherein a region of an upper surface of the semiconductor element member (130) in which the insulating layer (137/141) does not cover the semiconductor layer (125/127/129) is exposed through an opening (e.g. opening 137b labeled/shown in fig. 22, para. [0138] – [0139])”.
Allowable Subject Matter
Claim 8 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 3, 5 and 7 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Seo et al., US Publication No. 2012/0074441 A1.
Seo anticipates:
A photoelectric conversion element comprising (see fig.27 annotated below)
PNG
media_image1.png
434
766
media_image1.png
Greyscale
a semiconductor module (e.g. LED) comprising a semiconductor element member (130) and a seal covering a side of the semiconductor element member, the semiconductor element member including a light emission/irradiation surface configured to emit light or to be irradiated by light, a semiconductor substrate (121), a semiconductor layer (125/127/129), and an electrode (e.g. vertical vias of 139c); and
an insulating layer (137/141) provided on one surface of the semiconductor module and covering a redistribution wire (e.g. horizontal trace of 139c) of the electrode (e.g. vertical vias of 139c) and of at least one external connection terminal (139a/140a, 139b/140b),
wherein the insulating layer (137/141) is configured to include a first insulating layer (137) and a second insulating layer (141), the redistribution wire (e.g. horizontal trace of 139c) being provided between the first insulating layer (137) and the second insulating layer (141), and is formed so as not to cover at least a portion of the semiconductor layer (125/127/129) (e.g. See annotated fig. 27 above showing regions of semiconductor layer (125/127/129) not covered by the insulating layer (137/141).) and wherein a region of an upper surface of the semiconductor element member (130) in which the insulating layer (137/141) does not cover the semiconductor layer (125/127/129) is exposed through an opening (e.g. opening 137b labeled/shown in fig. 22, para. [0138] – [0139]). See Seo at para. [0001] – [0157], figs. 1-27.
3. The photoelectric conversion element according to claim 1, wherein the photoelectric conversion element has a fan out wafer level package structure (e.g. The LEDs has a fan-out through larger bumps 165a, 165b.), fig. 27.
5. The photoelectric conversion element according to claim 1, (see fig. 27 annotated above) wherein in a case in which the semiconductor element member (130) is divided into a connection region (e.g. connection region annotated) in which the electrode (e.g. electrode annotated; vertical via of 139c) can be disposed and a central region (e.g. A central region is over center of the left peripheral LED, where the opening is located.) excluding the connection region, the insulating layer (137/141) is formed so as not to cover the central region.
7. The photoelectric conversion element according to claim 1, wherein the at least one external connection terminal (139a/140a, 139b/140b) comprises a plurality of external connection terminals and forms a land grid array or a ball grid array (e.g. coupled to bumps 165a, 165b), fig. 27.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Michele Fan whose telephone number is 571-270-7401. The examiner can normally be reached on M-F from 7:30 am to 4 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jeff Natalini, can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Michele Fan/
Primary Examiner, Art Unit 2818
23 September 2026