Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant's cooperation is requested in correcting any errors of which applicant may become aware in the specification.
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 11/29/2023 is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1,3-4,20-22,25 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kahn et al, US 20200083133 A1.
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Pertaining to claim1, Kahn teaches ( see fig.3 above) A semiconductor device, comprising: a semiconductor body[100] comprising a first surface and a second surface; an active region[610] comprising at least one semiconductor cell ( see para 0029) configured to conduct a load current ( see para 0071) between the first surface and the second surface; an edge termination region[690] separating the active region [610] from a chip edge; and a first layer [410] within at least a part of the edge termination region[670], the first layer[410] comprising silicon, nitrogen and hydrogen ( see para 0049,0060), wherein, in atomic numbers, a ratio of the silicon to the nitrogen is at least 3.3 to 4 in at least a portion of the first layer ( see para 0039 with the ration for example being greater than 5), wherein at least the portion of the first layer comprises at most 16 percent hydrogen in atomic numbers ( see para 0040 wherein at least the portion of the first layer comprises at most 14 percent hydrogen in atomic numbers which is less most 16 percent hydrogen in atomic numbers in the claim).
Pertaining to claim3, Kahn teaches ( see fig.3 above) The semiconductor device of claim 1, wherein the first layer[410] is in direct contact to the semiconductor body[100].
Pertaining to claim4, Kahn teaches ( see fig.3 above) The semiconductor device of claim 1, further comprising: a second layer [420] comprising silicon, nitrogen and hydrogen, wherein, in atomic numbers, a ratio of the silicon to the nitrogen is lower in the second layer than in the first layer ( see claim 19 for example).
Pertaining to claim 20, Kahn teaches ( see fig.3 above) A semiconductor device, comprising: a semiconductor body [100] comprising a first surface and a second surface; an active region [610] comprising at least one semiconductor cell ( see para 0029) configured to conduct a load current ( see para 0071) between the first surface and the second surface; an edge termination region[690] separating the active region[610] from a chip edge; a first layer[410] at least within the edge termination region[690], the first layer[410] comprising silicon, nitrogen and hydrogen ( see para 0049,0060); and a second layer[420] at least within the edge termination region[690], the second layer comprising silicon, nitrogen and hydrogen ( see para 0049,0060), wherein, in atomic numbers, a ratio of the silicon to the nitrogen is at least 10 percent higher in the first layer[410] than in the second layer[420] when the S:N in the second region is 1.6 ( see para 0064).
Pertaining to claim 21, Kahn teaches ( see fig.3 above) The semiconductor device of claim 20, wherein the second layer[420] comprises at most 16 percent hydrogen in atomic numbers ( see para 0036 wherein at least the portion of the second layer[420] comprises at most 14 percent hydrogen in atomic numbers which is less most 16 percent hydrogen in atomic numbers in the claim.
Pertaining to claim 22, Kahn teaches ( see fig.1A) The semiconductor device of claim 20, wherein the second layer[420] is arranged above the first layer[410].
Pertaining to claim25, Kahn teaches ( see fig.3 above) A method for manufacturing a semiconductor device, the method comprising: providing a semiconductor body[100] comprising a first surface, a second surface, an active region [610] comprising at least one semiconductor cell ( see para 0029) configured to conduct a load current ( see para 0071) between the first surface and the second surface, and an edge termination region [690] separating the active region [610] from a chip edge; and forming a first layer [410] within the edge termination region[690], the first layer [410] comprising silicon, nitrogen and hydrogen ( see para 0049,0060), wherein, in atomic numbers, a ratio of the silicon to the nitrogen is at least 3.3 to 4 in at least a portion of the first layer ( see para 0039 with the ration for example being greater than 5), wherein at least the portion of the first layer comprises at most 16 percent hydrogen in atomic numbers ( see para 0040 wherein at least the portion of the first layer comprises at most 14 percent hydrogen in atomic numbers which is less most 16 percent hydrogen in atomic numbers in the claim).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kahn et al, US 20200083133 A1.
Pertaining to claim 2, Kahn teaches ( see fig.3 above) The semiconductor device of claim 1, wherein the first layer comprises at most 14 percent hydrogen in atomic numbers, but is silent , wherein the first layer comprises at most 13 percent hydrogen in atomic numbers, however , viewing the prior art reference as whole , A prima facie case of obviousness exists where the claimed ranges and prior art ranges do not overlap but are close enough that one skilled in the art would have expected them to have the same properties. Titanium Metals Corp. of Amer. v. Banner, 778 F.2d 775, 227 USPQ 773 (Fed. Cir. 1985)..
Allowable Subject Matter
Claims 6-19,24 allowed.
The closest prior art of record of Kahn et al, US 20200083133 A1 teaches the limitation of " A semiconductor device, comprising: a semiconductor body comprising a first surface and a second surface; an active region comprising at least one semiconductor cell configured to conduct a load current between the first surface and the second surface; an edge termination region separating the active region from a chip edge; and a first layer within the edge termination region, the first layer comprising silicon, nitrogen and hydrogen, but it does not teach or suggest, singularly or in combination, at least the limitations of the independent claim 6 including “wherein an electrical conductivity of the first layer has a local or global maximum between 273 K and 373 K and/or the electrical conductivity of the first layer has a falling slope with increasing at a specified maximum working temperature.
but it does not teach or suggest, singularly or in combination, at least the limitations of the independent claim 24 including “above the first load terminal and/or above the edge termination structure, a first layer comprising silicon, nitrogen and hydrogen, in at least a portion of the first layer, a number of silicon atoms is greater than 82.5% of a number of nitrogen atoms, wherein of all the silicon atoms, nitrogen atoms and hydrogen atoms within at least the portion of the first layer, at most 12% are hydrogen atoms.”
Claims 5,23 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The closest prior art of record of Kahn et al, US 20200083133 A1 teaches the limitation of claim1 and 20, but it does not teach or suggest, singularly or in combination, at least the limitations of the dependent claim 5 and 23 including “wherein the first layer is an uppermost barrier layer in the edge termination region with no additional humidity resistant layer above the first layer.” in combination with the remaining limitations of the claim.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. See PTO 892.
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/MAMADOU L DIALLO/Primary Examiner, Art Unit 2897