DETAILED ACTION
Election/Restrictions
Applicant's election with traverse of Group I in the reply filed on 04/24/2026 is acknowledged. The traversal is on the ground(s) that the product of claims 1-17 correspond directly to the method of manufacturing disclosed in claim 18 and are therefore not independent or distinct. This is not found persuasive because the distinct inventions occupy different classifications, such as H10D30/475 for apparatus claims and H10D30/015 for method claims, which constitutes a search burden.
The requirement is still deemed proper and is therefore made FINAL.
Claim 18 is withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected group, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 04/24/2026.
Specification
The abstract of the disclosure is objected to because it states that “A source electrode is electrically connected to the second channel layer such that the source of the first transistor forms a base of a second transistor, and the source electrode forms a collector of the second transistor.” The drawings (See Figs. 1A and 1C) and specification (See ¶¶ 0016 and 0057) disclose that the drain, and not the source, forms a collector of the second transistor. A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 states the following: “a source electrode electrically connected to the second channel layer of the second semiconductor structure such that the source of the first transistor forms a base of a second transistor, and the source electrode forms a collector of the second transistor.” The drawings show in Figs. 1A and 1C that the drain 118, and not the source 114, is connected to the collector 120. Furthermore, the specification states in ¶¶ 0016 and 0057 that the drain electrode forms a collector of the second transistor. Therefore, for the purpose of compact prosecution, claim 1 will be interpreted as “the drain electrode forms a collector of the second transistor.”
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4 states the following: “wherein the second leg is parallel to a longitudinal extension of the source electrode.” Fig. 1A shows that the second leg, which is the base metal contact 113, is orthogonal to the longitudinal extension of the source 114. Furthermore, applicant’s specification discloses the following in ¶0047:
Referring to FIG. 1A, the source electrode 114 may be considered to be the first leg and may be parallel to a longitudinal extension of the drain 118 along x-axis and the second leg may be considered to be the base metal contact 113 and may be orthogonal to a lateral extension of the source electrode 114.
Therefore, for the purpose of compact prosecution, claim 4 will be interpreted as “wherein the second leg is orthogonal to a longitudinal extension of the source electrode.”
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 11-13 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over AINA et al. (US 5187110), hereinafter “Aina,” in view of UENO (US 20130043485 A1), hereinafter “Ueno.”
Re: Independent Claim 11, Aina discloses an apparatus (See Figs. 1, 3, 4, and 7; FIG. 7 illustrates a FET-HBT Darlington pair), comprising:
a high electron mobility transistor (HEMT) comprising a barrier layer and a channel layer such that there is an accumulation … at an interface of the barrier layer and the channel layer in an on state of the HEMT (See Fig. 1; Fig. 7: InGaAs layer 124, i.e., barrier, InP active region 123, i.e., channel; col. 3, lns. 27-50: if an npn HBT is utilized, the FET should be a p-channel MISFET, MESFET, HEMT or MISHEMT. If a pnp HBT is utilized, the FET should be n-channel… When voltage is applied at V.sub.in 10, FET 11 is turned on); and
a bipolar junction transistor (BJT) structurally coupled to the HEMT such that a source of the HEMT is electrically coupled to a base of the BJT and the channel layer of the HEMT forms an emitter layer of the BJT (See Fig. 1; col. 3, lns. 27-50: In FIG. 1, the input signal V.sub.in 10 is coupled directly to gate 12 of FET 11. The drain terminal 13 of FET 11 is coupled to the positive supply terminal V.sub.cc 19. The amplified signal output is retrieved from a source terminal 14 of FET 11 and is coupled to the base 16 of HBT 15. The emitter 17 of HBT 15 is coupled to ground 22. The collector 18 of HBT 15 is coupled to the drain 13 of FET 11).
However, Aina does not specifically disclose … of two-dimensional gas (2-DEG).
In a similar field of endeavor, Ueno discloses … of two-dimensional gas (2-DEG) (Fig. 7 shows a compound device with including a HEMT 412, transistors 312 and 314, and 2DEG channels 114 and 108; ¶0006: GaN-based transistors using a 2DEG; ¶0069: The high-voltage element 412 is an HEMT in which the carrier is a 2DEG 108.).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the current application to have included materials such as GaN to create complementary transistor structures capable of using a 2DEG as a carrier (See Ueno, ¶¶0006 and 0008).
Re: Claim 12, the combination of Aina and Ueno discloses the apparatus of claim 11.
Aina further discloses wherein a drain of the HEMT is electrically coupled to a collector of the BJT (col. 3, lns. 27-50: The collector 18 of HBT 15 is coupled to the drain 13 of FET 11).
Re: Claim 13, the combination of Aina and Ueno discloses the apparatus of claim 11.
Aina further discloses wherein the HEMT is operable to provide an input current at the source in the on state of the HEMT and provide zero current at the source in an off state of the HEMT (col. 3, lns. 27-50: In FIG. 1, the input signal V.sub.in 10 is coupled directly to gate 12 of FET 11. The drain terminal 13 of FET 11 is coupled to the positive supply terminal V.sub.cc 19. The amplified signal output is retrieved from a source terminal 14 of FET 11 and is coupled to the base 16 of HBT 15. The emitter 17 of HBT 15 is coupled to ground 22. The collector 18 of HBT 15 is coupled to the drain 13 of FET 11), and
wherein the BJT is operable to amplify the input current in an on state of the BJT (col. 3, lns. 27-50: The amplified signal output is retrieved from a source terminal 14 of FET 11 and is coupled to the base 16 of HBT 15.).
Re: Claim 15, the combination of Aina and Ueno discloses the apparatus of claim 11.
Aina further discloses wherein the HEMT and the BJT have a common substrate layer (Fig. 3-7 show complementary transistors having a common substrate).
Allowable Subject Matter
Claims 1 and 4 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Claims 2, 3 and 5-10 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Claims 14 and 16-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
MOENS et al. (US 10,964,733 B2) – Figs. 4, 6, 10, and 11 show structures which are relevant to the claimed invention.
BRAR et al. (US 20070069286 A1) – Figs. 23 and 25 show structures which are relevant to the claimed invention.
CHAN (US 20130043483 A1) – Figs. 2b and 3l show structures which are relevant to the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM ADROVEL whose telephone number is (571)272-3048. The examiner can normally be reached 7:30 AM - 5:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, LEONARD CHANG can be reached at (571) 270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/WILLIAM ADROVEL/Examiner, Art Unit 2898
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
Prosecution Insights