Prosecution Insights
Last updated: July 05, 2026
Application No. 18/523,541

DISPLAY DEVICE

Non-Final OA §103
Filed
Nov 29, 2023
Priority
Dec 30, 2022 — RE 10-2022-0190451
Examiner
VALENZUELA, PATRICIA D
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
646 granted / 716 resolved
+22.2% vs TC avg
Minimal +2% lift
Without
With
+2.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
69 currently pending
Career history
790
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
86.1%
+46.1% vs TC avg
§102
5.0%
-35.0% vs TC avg
§112
1.9%
-38.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 716 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee(USPGPUB DOCUMENT: 2018/0123074, hereinafter Lee) in view of Cho (USPGPUB DOCUMENT: 2020/0176521, hereinafter Cho). Re claim 1 Lee discloses a display device, comprising: a substrate(100) on which a plurality of sub-pixels(pixel array in 200) are defined; an anode(261) disposed on the substrate(100) to correspond to each of the plurality of sub-pixels(pixel array in 200); an organic light emitting layer(262) disposed on the anode(261); a cathode(263) disposed on the organic light emitting layer(262); a bank(270) covering an edge of the anode(261) to define a plurality of emission area[0049]s[0049]; an encapsulation layer(300) disposed on the cathode(263); a black matrix(410) disposed on the encapsulation layer(300) to correspond to the bank(270), and including a plurality of openings[0059] overlapping the plurality of emission area[0049]s[0049] respectively; and a plurality of color filters(421) disposed on the encapsulation layer(300) to correspond to the plurality of sub-pixels(pixel array in 200), respectively, wherein each of the plurality of color filters(421) includes a first region(region of 421) overlapping a corresponding emission area[0049] and a second region(region adjacent to region of 421) adjacent the first region(region of 421) and having at least a portion disposed to cover at least a portion of an upper surface of the black matrix(410), Lee does not disclose wherein at least one of the plurality of color filters(421) includes a plurality of holes in at least one of an edge of the first region(region of 421) and the second region(region adjacent to region of 421). Cho discloses wherein at least one of the plurality of color filters[0135 of Cho] includes a plurality of holes(133a/133b/131a/131b)[0136 of Cho] It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Cho to the teachings of Lee in order to minimize light transmittance deteriorated [0003, Lee]. In doing so, wherein at least one of the plurality of color filters[0135 of Cho] includes a plurality of holes(133a/133b/131a/131b)[0136 of Cho] in at least one of an edge of the first region(region of 421) and the second region(region adjacent to region of 421). Re claim 2 Lee and Cho disclose the display device of claim 1, wherein at least one opening of the plurality of openings[0059] corresponds to the first region(region of 421) and the corresponding emission area[0049], and a width of the corresponding opening is approximately equal to a width of the first region(region of 421) and to a width of the corresponding emission area[0049], and wherein the second region(region adjacent to region of 421) is disposed to be in contact with the upper surface of the black matrix(410). Re claim 3 Lee and Cho disclose the display device of claim 2, further comprising: a color filter buffer layer disposed between the encapsulation layer(300) and the plurality ofcolor filters(421),wherein the first region(region of 421) includes the plurality of holes(133a/133b/131a/131b)[0136 of Cho] at the edge thereof, and the plurality of holes(133a/133b/131a/131b)[0136 of Cho] of the first region(region of 421) expose at least a portion of the color filter buffer layer. Re claim 4 Lee and Cho disclose the display device of claim 2, wherein the second region(region adjacent to region of 421) includes the plurality of holes(133a/133b/131a/131b)[0136 of Cho] , and the plurality of holes(133a/133b/131a/131b)[0136 of Cho] of the second region(region adjacent to region of 421) expose at least a portion of the black matrix(410). Re claim 5 Lee and Cho disclose the display device of claim 1, wherein a width of a corresponding opening is greater than a width of the first region(region of 421), wherein the width of the first region(region of 421) is approximately equal to a width of the corresponding emission area[0049], wherein the second region(region adjacent to region of 421) includes a first sub-region adjacent the first region(region of 421) and in contact with a side surface of the black matrix(410), and a second sub-region adjacent the first sub- region and in contact with the upper surface of the black matrix(410), and wherein at least one of the plurality of color filters(421) includes the plurality of holes(133a/133b/131a/131b)[0136 of Cho] in at least one of the edge of the first region(region of 421), the first sub-region, and the second sub-region. Re claim 6 Lee and Cho disclose the display device of claim 5, further comprising: a color filter buffer layer disposed between the encapsulation layer(300) and the plurality of color filters(421), wherein the first region(region of 421) includes the plurality of holes(133a/133b/131a/131b)[0136 of Cho] at the edge thereof, and the plurality of holes(133a/133b/131a/131b)[0136 of Cho] of the first region(region of 421) expose at least a portion of the color filter buffer layer. Re claim 7 Lee and Cho disclose the display device of claim 5, further comprising: a color filter buffer layer disposed between the encapsulation layer(300) and the plurality of color filters(421), wherein at least one of the first sub-region and the second sub-region includes the plurality of holes(133a/133b/131a/131b)[0136 of Cho] , and wherein the plurality of holes(133a/133b/131a/131b)[0136 of Cho] of the first sub-region expose at least a portion of the color filter buffer layer, and the plurality of holes(133a/133b/131a/131b)[0136 of Cho] of the second sub-region expose at least a portion of the black matrix(410). Re claim 8 Lee and Cho disclose the display device of claim 1, wherein at least one of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] passes through at least a portion of a corresponding color filter in a thickness direction of the corresponding color filter from an upper surface of the corresponding color filter. Re claim 9 Lee and Cho disclose the display device of claim 1, wherein the plurality of holes(133a/133b/131a/131b)[0136 of Cho] are disposed in a plurality of columns from outside to inside of the plurality of color filters(421) on a plane. Re claim 10 Lee and Cho disclose the display device of claim 1, wherein at least one of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] has a circular shape, a polygonal shape, a line shape, or an annular shape on a plane. Re claim 11 Lee and Cho disclose the display device of claim 1, wherein at least one of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] has a circular shape on a plane, a diameter of the at least one of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] is about 0.1 pm to about 5 pm, and a distance between a pair of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] that are adjacent to each other is about 0.1 pmto about 5pm. Re claim 12 Lee and Cho disclose the display device of claim 1, wherein at least one of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] is tilted from the first region(region of 421) to the second region(region adjacent to region of 421). Re claim 13 Lee and Cho disclose the display device of claim 1, wherein at least one of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] includes a filler. Re claim 14 Lee and Cho disclose the display device of claim 13, wherein the plurality of color filters(421) include a material having a refractive index of 1.5 or more, and wherein the filler includes a material having a refractive index of 1.4 or less. Re claim 15 Lee discloses a display device, comprising: a plurality of sub-pixels(pixel array in 200) defined on a substrate(100); a plurality of organic light emitting elements(260) disposed to correspond to the plurality of sub-pixels(pixel array in 200), respectively, and having a plurality of emission area[0049]s[0049], respectively;bank(270)s to define the plurality of emission area[0049]s[0049] corresponding to the plurality of sub- pixels; an encapsulation layer(300) disposed on the plurality of organic light emitting elements(260); a black matrix(410) disposed on the encapsulation layer(300) to correspond to the bank(270)s, and including a plurality of openings[0059] corresponding to the plurality of emission area[0049]s[0049], respectively; and a plurality of color filters(421) disposed on the encapsulation layer(300) to correspond to the plurality of sub-pixels(pixel array in 200), respectively, Lee does not disclose wherein each of the plurality of color filters(421) includes a plurality of holes grouped into an inner pattern and an outer pattern having different sizes. Cho discloses wherein each of the plurality of color filters[0135] includes a plurality of holes(133a/133b/131a/131b)[0136] grouped into an inner pattern and an outer pattern having different sizes(width W2 and the width W3 are provided to be different from one another)[0136]. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Cho to the teachings of Lee in order to minimize light transmittance deteriorated [0003, Lee]. Re claim 16 Lee and Cho disclose the display device of claim 15, wherein a size of the inner pattern is less than a size of the outer pattern. Re claim 17 Lee and Cho disclose the display device of claim 15, wherein each of the inner pattern and the outer pattern is an annular pattern. Re claim 18 Lee and Cho disclose the display device of claim 15, wherein at least one of the inner pattern and the outer pattern includes a circular shape, a polygonal shape, a line shape, or an annular shape on a plane. Re claim 19 Lee and Cho disclose the display device of claim 1, wherein some of the plurality of holes(133a/133b/131a/131b)[0136 of Cho] are partial holes(133a/133b/131a/131b)[0136 of Cho] that partially penetrate a corresponding color filter of the plurality of color filters(421). Re claim 20 Lee discloses a display device, comprising: a plurality of sub-pixels(pixel array in 200) defined on a substrate(100); a plurality of organic light emitting elements(260) disposed to correspond to the plurality of sub-pixels(pixel array in 200), respectively, and having a plurality of emission area[0049]s[0049], respectively;an encapsulation layer(300) disposed on the plurality of organic light emitting elements(260); and a plurality of color filters(421) disposed on the encapsulation layer(300) to correspond to the plurality of sub-pixels(pixel array in 200), respectively, Lee does not disclose wherein each of the plurality of color filters(421) includes a first part, a second part that is outward of the first part, and a third part that is outward of the second part, and wherein a plurality of holes are included in the second part and encircle the first part. Cho discloses wherein each of the plurality of color filters includes a first part(131/132/133), a second part(131/132/133) that is outward of the first part, and a third part(131/132/133) that is outward of the second part, and wherein a plurality of holes(133a/133b/131a/131b)[0136] are included in the second part and encircle the first part. It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to apply the teachings of Cho to the teachings of Lee in order to minimize light transmittance deteriorated [0003, Lee]. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PATRICIA D VALENZUELA whose telephone number is (571)272-9242. The examiner can normally be reached Monday-Friday 10am-6pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PATRICIA D VALENZUELA/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Nov 29, 2023
Application Filed
Apr 02, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12672539
THIN FILM RESISTOR, THERMISTOR AND METHOD OF PRODUCING THE SAME
3y 0m to grant Granted Jun 30, 2026
Patent 12666951
SEMICONDUCTOR DEVICE
3y 1m to grant Granted Jun 23, 2026
Patent 12666952
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
3y 1m to grant Granted Jun 23, 2026
Patent 12666946
SEMICONDUCTOR DEVICE
2y 11m to grant Granted Jun 23, 2026
Patent 12660616
Lid Structure With Openings To Alleviate Leakage Of Thermal Interface Material Of A Chip Assembly
3y 2m to grant Granted Jun 16, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
92%
With Interview (+2.1%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 716 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month