DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
Claims 1-20 are pending.
Claims 3, 6, 11 and 14 are currently amended.
Claims 1-2, 4-5, 7-10, 12-13 and 15-20 are original.
Claims 1-6, 10-14 and 18-20 are rejected herein.
Claims 7-9 and 15-17 are objected to herein.
Response to Arguments
In view of Applicant’s amendment to the title filed 06/25/2026, the objection to the title in the prior Office Action dated 03/26/2026 is withdrawn.
In view of Applicant’s amendments to the claims filed 06/25/2026, the objections to claims 3, 6, 11 and 14 in the prior Office Action dated 03/26/2026 are withdrawn.
Otherwise, Applicant's arguments filed 06/25/2026 have been fully considered but they are not persuasive.
Applicant disagrees with the objection to claim 20 and argues that “[c]laim 20 depends from independent claim 19, whereas claim 13 depends from independent claim 11” and that “[t]he two claims reside in different claim chains and depend from different independent claims, and Applicant retains both claims so as to maintain distinct claim scope as between the two independent claim chains.” Remarks, page 10. This argument is not persuasive. Accordingly, the objection to claim 20 is maintained.
Notably, when two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m). Claims 13 and 20 “cover the same thing.” It is irrelevant that the claims may “reside in different claim chains.”
Regarding independent claims 1 and 11, Applicant argues that “Lee does not disclose light emitting devices having different orthographic projection areas as between the first region and the second region.” Remarks, page 12-15. Applicant’s argument relies on an interpterion of the following claim language: “an area of an orthographic projection of the light emitting devices in the second region … is greater than an area of an orthographic projection of the light emitting devices in the first region.” In particular, Applicant argues that “[r]ead in light of the specification, this limitation requires the individual light emitting devices located in the second region A2 to have a larger orthographic projection area than the individual light emitting devices located in the first region A1.” Remarks, page 14. This argument is not persuasive.
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the feature upon which applicant relies (i.e., individual light emitting devices located in the second region having larger orthographic projection areas than individual light emitting devices located in the first region) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Notably, the text of Applicant’s specification also fails to explicitly recite any comparative relationship between areas of orthographic projections of “individual” light emitting devices in the respective regions. Indeed, the text of Applicant’s specification make no mention of an “individual” light emitting device with respect to any comparison related to the orthographic projection area of the “individual” light emitting device.
Moreover, the respective claims explicitly recite “an area” (singular) of “an orthographic projection” (singular) of the “light emitting devices” (plural) in the second region is greater than “an area” (singular) of “an orthographic projection” (singular) of the “light emitting devices” (plural) in the first region. Nowhere do the claims recite any comparative relationship between the areas of orthographic projections of “individual” light emitting devices in the respective regions. Accordingly, under the broadest reasonable interpretation (BRI), “an area of an orthographic projection of the light emitting devices” (i.e., as claimed) is fairly read as a singular area defined by the orthographic projection of plural light emitting devices. Importantly, as so read, Lee discloses the relevant claimed feature.
Regarding claim 2, Applicant argues that the progressive increase in orthographic projection area among the column sets is neither disclosed nor suggested. Remarks, page 15. This argument is not persuasive.
In particular, Applicant argues that “the light emitting units 107, 109, 111 of Lee are uniform in size, so there is no column set in Lee in which the individual light emitting units have a larger orthographic projection area than the individual light emitting units of another column set.” Remarks, page 15. However, the aforementioned limitation (i.e., a column set in which the individual light emitting units have a larger orthographic projection area than the individual light emitting units of another column set) is not recited in the rejected claim, and while the claims are interpreted in light of the specification, limitations from the specification are not read into the claims.
Applicant further argues that “[t]he partition of regions 151 and 152 into a "CS1" and a "CS2" having different numbers of columns is arbitrary, and it does not reflect any teaching in Lee.” Remarks, page 15. This argument is not persuasive. Indeed, Lee does teach the claimed column sets as clearly seen in FIG. 5. The annotations to FIG. 5 do not alter what Lee teaches, but are merely included to identify which columns of Lee are being read on the claimed column sets. That Lee may not explicitly identify a given set of columns by a specific reference character does not mean that Lee does not teach the claimed column sets. Notably, under the BRI, a claimed “column set” may include any number of columns. There is no limitation recited in the claim that requires the columns sets to have the same number of columns or be of equal size.
Applicant further argues that “[c]laim 2 requires that the light emitting devices of the ith column set have a greater orthographic projection area than the light emitting devices of the (i-1)th column set.” Remarks, page 15. This argument is not persuasive. Claim 2 recites that “an area” (singular) of “an orthographic projection” (singular) of “the light emitting devices” (plural) of “a (i-1)th one of the column sets” is less than “an area” (singular) of “an orthographic projection” (singular) of “the light emitting devices” (plural) of “an ith one of the column sets.” Significantly, under the BRI, there is no requirement that the orthographic projection area of any individual light emitting device is greater than the orthographic projection area of any other individual light emitting device, regardless of the column set in which the individual light emitting devices are located. Importantly, as so read, Lee discloses the relevant claimed feature.
Regarding claim 4, Applicant argues that Jeon does not teach that “any plurality of signal connection lines in Jeon carries equal currents.” Remarks, page 17. This argument is not persuasive. Notably, Jeon discloses that “Each of the plurality of secondary power lines SPL may be electrically connected to an adjacent pixel common power line CPL without being electrically connected to the first pixel common power pad CPP1 and may be supplied with a pixel common power through the adjacent pixel common power line CPL. Accordingly in some embodiments, the first substrate 100 according to the present disclosure may further include a plurality of line connection patterns LCP which electrically connect a pixel common power line CPL and a secondary power line SPL adjacent to each other.” Paragraph [0236]. See also FIG. 6 of Jeon showing two LCP connecting the CPL and SPL. As such, the SPL and CPL are both supplied the “pixel common power” (i.e., from the CCP1) and accordingly at least two (i.e., a plurality) of the CPLs, SPLs and LCPs carries equal currents.
Regarding claims 11 and 12, Applicant advances the same arguments made with respect to claims 1, 2 and 4. Remarks, pages 17-18. Again, these arguments are not persuasive for at least the same reasons detailed herein above with respect to claims 1, 2 and 4.
Regarding claims 5-6, 10, 13-14 and 18, Applicant argues that “[e]ach of claims 5-6, 10, 13-14, and 18 depends, directly or indirectly, from independent claim 1 or independent claim 11, and is patentable for at least the reasons that claims 1 and 11 are patentable.” Remarks, page 19. This argument is not persuasive. First, neither of claims 1 or 11 have been deemed patentable and accordingly dependence therefrom is not dispositive of patentability. Second, Applicant has not identified any additional limitation or feature recited in any of the respective dependent claims which would further patentably distinguish it over the cite prior art, nor has Applicant specified how the particular rejection of any respective dependent claim is further in error.
Regarding claim 19 and 20, Applicant advances the same arguments made with respect to claims 1 and 2. Remarks, page 19. Again, these arguments are not persuasive for at least the same reasons detailed herein above with respect to claims 1 and 2.
Claim Objections
Claim 20 is objected to under 37 CFR 1.75 as being a substantial duplicate of claim 13. When two claims in an application are duplicates or else are so close in content that they both cover the same thing, despite a slight difference in wording, it is proper after allowing one claim to object to the other as being a substantial duplicate of the allowed claim. See MPEP § 608.01(m).
Claim Rejections - 35 USC § 103
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-4 and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 20190043940 A1) in view of Jeon (US 20210202686 A1).
Regarding claim 1, Lee discloses (see generally, e.g., FIG. 1A and annotated FIG. 5 herein):
A display panel (101), comprising a pixel region (151, 152) defined in the display panel (101), wherein the pixel region (151, 152) comprises a first region (151) and a second region (152), and the display panel (101) further comprises:
a plurality of light emitting devices (107, 109, 111) disposed in the first region (151) and the second region (152) (note, in FIG. 5 the light emitting devices are illustrated but are not labeled with the corresponding reference characters, however, they are label with corresponding reference characters, e.g., in FIG. 1A);
a signal connection line (see paragraph [0024] – note, the “various wiring lines” of the “wiring layer” read on the claimed signal connection line and are hereinafter referenced by “SCL”); and
an area of an orthographic projection of the light emitting devices (107, 109, 111) in the second region (152) on a plane in which the display panel (101) is located is greater than an area of an orthographic projection of the light emitting devices (107, 109, 111) in the first region (151) on the plane in which the display panel (101) is located (see FIG. 5).
Lee does not explicitly disclose:
a signal input terminal disposed in the first region,
wherein the signal input terminal is sequentially connected to the light emitting devices (107, 109, 111) in the first region (151) and the light emitting devices (107, 109, 111) in the second region (152) through the signal connection line (SCL).
However, in analogous art, Jeon discloses (see generally, e.g., FIGS. 1A and 6):
a signal input terminal (CPP1) disposed in the first region (PAo),
wherein the signal input terminal (CPP1) is sequentially connected to the light emitting devices (Po, Pi) in the first region (PAo) and the light emitting devices (Po, Pi) in the second region (PAi) through the signal connection line (CPL). See also, e.g., paragraphs [0205]-[0206].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included a signal terminal as taught by Jeon in the first region (151) of the display panel (101) of Lee, wherein the signal terminal is sequentially connected to the light emitting devices (107, 109, 111) in the first region (151) of Lee and the light emitting devices (107, 109, 111) in the second region (152) of Lee through the signal connection line (SCL) of Lee according to known methods to yield predictable results, for example, to provide an input through which electrical signals can be supplied to drive and/or operate the light emitting devices.
The conclusion of obviousness is further supported by an “obvious to try” rational. See, e.g., MPEP § 2143(I)(E). In particular, it is found that: (1) at the relevant time, there had been a recognized problem or need in the art, namely, a need to supply a signal to drive and/or operate the light emitting devices in first and second regions of a display panel; (2) there had been a finite number of identified, predictable potential solutions to the recognized need or problem, e.g., (i) disposing a signal input terminal in the first region so as to be sequentially connected to the light emitting devices in the first region and the light emitting devices in the second region, or (ii) disposing a signal input terminal in the second region so as to be sequentially connected to the light emitting devices in the second region and the light emitting devices in the first region; and (3) one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success.
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ANNOTATED FIG. 5 OF LEE
Regarding claim 2, Lee in view of Jeon as applied to claim 1 discloses the display panel according to claim 1.
Lee further discloses wherein:
the first region (151) and the second region (152) are disposed along a first direction (x), the light emitting devices (107, 109, 111) in the second region (152) are arranged in a quantity N of column sets (CS1, CS2) along the first direction (x), wherein N is an integer (i.e., 2) greater than 1; and
along a direction (x) from a location near the signal input terminal to a location away from the signal input terminal (note, as modified in accordance with the teachings of Jeon, the signal terminal is disposed in the first region (151) of Lee), an area of an orthographic projection of the light emitting devices (107, 109, 111) of a (i-1)th one (i.e., 1st one – CS1) of the column sets (CS1, CS2) on the plane in which the display panel (101) is located is less than an area of an orthographic projection of the light emitting devices (107, 109, 111) of an ith one (i.e., 2nd one – CS2) of the column sets (CS1, CS2) on the plane in which the display panel (101) is located, wherein i (i.e., i=2) is equal to N.
Regarding claim 3, Lee in view of Jeon as applied to claim 1 discloses the display panel according to claim 1.
Lee further discloses wherein:
the light emitting devices (107, 109, 111) arranged in a quantity M of row sets (RS1, RS2) along a second direction (y), wherein M is an integer (i.e., 2) greater than 1, the second direction (y) intersects the first direction (x); and
along a direction (y) from a location near the signal input terminal to a location away from the signal input terminal, an area of an orthographic projection of the light emitting devices of a (j-1)th one (i.e., 1st one – RS1) of the row sets (RS1, RS2) on the plane in which the display panel (101) is located is less than an area of an orthographic projection of the light emitting devices of a jth one (i.e., 2nd one – RS2) of the row sets (RS1, RS2) on the plane in which the display panel (101) is located, wherein j (i.e., j=2) is equal to M.
Note, while Lee does not explicitly disclose a specific location of the signal input terminal within the first region, Jeon does explicitly disclose a pad part (110), i.e., including the signal input terminal (CPP1), disposed in the first region (PAo) near and/or along an upper edge thereof. See, e.g., FIG. 1a and paragraphs [0110]-[0111].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included the signal input terminal as taught by Jeon near the upper edge in the first region (151) of the display panel (101) of Lee, according to known methods to yield predictable results, for example, so that the signal input terminal does not interfere with the light emitting devices while still being included within the display area, and thus, a non-display area (or a bezel area) may not be formed. See, e.g., paragraph [0111] of Jeon.
When the signal input terminal is so disposed near the upper edge in the first region (151) of Lee as taught be Jeon, the row sets (RS1, RS2) are arranged as claimed, i.e., along a direction (y) from a location near the signal input terminal (i.e., near the upper edge) to a location away (i.e., downward) from the signal input terminal.
Regarding claim 4, Lee in view of Jeon as applied to claim 3 discloses the display panel according to claim 3.
Lee in view of Jeon further discloses wherein each of the row sets (RS1, RS2 – see, e.g., annotated FIG. 5 of Lee herein) is at least connected to one of the signal connection lines (CPL, SPL, LCP – see, e.g., FIG. 6 of Jeon), and currents of a plurality of the signal connection lines (CPL, SPL, LCP – see, e.g., FIG. 6 of Jeon) are equal.
Regarding claim 11, Lee discloses (see generally, e.g., FIG. 1A and annotated FIG. 5 herein):
A display panel (101), comprising a pixel region (151, 152) defined in the display panel (101), wherein the pixel region (151, 152) comprises a first region (151) and a second region (152), and the display panel (101) further comprises:
a plurality of light emitting devices (107, 109, 111) disposed in the first region (151) and the second region (152) (note, in FIG. 5 the light emitting devices are illustrated but are not labeled with the corresponding reference characters, however, they are label with corresponding reference characters, e.g., in FIG. 1A); and
a signal connection line (see paragraph [0024] – note, the “various wiring lines” of the “wiring layer” read on the claimed signal connection line and are hereinafter referenced by “SCL”); and
an area of an orthographic projection of the light emitting devices (107, 109, 111) in the second region (152) on a plane in which the display panel (101) is located is greater than an area of an orthographic projection of the light emitting devices (107, 109, 111) in the first region (151) on the plane in which the display panel (101) is located (see FIG. 5).
Lee does not explicitly disclose:
a signal input terminal disposed in the first region,
wherein the signal input terminal is sequentially connected to the light emitting devices (107, 109, 111) in the first region (151) and the light emitting devices (107, 109, 111) in the second region (152) through the signal connection line (SCL).
However, in analogous art, Jeon discloses (see generally, e.g., FIGS. 1A and 6):
a signal input terminal (CPP1) disposed in the first region (PAo),
wherein the signal input terminal (CPP1) is sequentially connected to the light emitting devices (Po, Pi) in the first region (PAo) and the light emitting devices (Po, Pi) in the second region (PAi) through the signal connection line (CPL). See also, e.g., paragraphs [0205]-[0206].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included a signal terminal as taught by Jeon in the first region (151) of the display panel (101) of Lee, wherein the signal terminal is sequentially connected to the light emitting devices (107, 109, 111) in the first region (151) of Lee and the light emitting devices (107, 109, 111) in the second region (152) of Lee through the signal connection line (SCL) of Lee according to known methods to yield predictable results, for example, to provide an input through which electrical signals can be supplied to drive and/or operate the light emitting devices.
The conclusion of obviousness is further supported by an “obvious to try” rational. See, e.g., MPEP § 2143(I)(E). In particular, it is found that: (1) at the relevant time, there had been a recognized problem or need in the art, namely, a need to supply a signal to drive and/or operate the light emitting devices in first and second regions of a display panel; (2) there had been a finite number of identified, predictable potential solutions to the recognized need or problem, e.g., (i) disposing a signal input terminal in the first region so as to be sequentially connected to the light emitting devices in the first region and the light emitting devices in the second region, or (ii) disposing a signal input terminal in the second region so as to be sequentially connected to the light emitting devices in the second region and the light emitting devices in the first region; and (3) one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success.
Lee further discloses:
wherein the first region (151) and the second region (152) are disposed along a first direction (x), the light emitting devices (107, 109, 111) in the second region (152) are arranged in a quantity N of column sets (CS1, CS2) along the first direction (x), wherein N is an integer (i.e., 2) greater than 1;
wherein along a direction (x) from a location near the signal input terminal to a location away from the signal input terminal (note, as modified in accordance with the teachings of Jeon, the signal terminal is disposed in the first region (151) of Lee) , an area of an orthographic projection of the light emitting devices (107, 109, 111) of a (i-1)th one (i.e., 1st one – CS1) of the column sets (CS1, CS2) on the plane in which the display panel (101) is located is less than an area of an orthographic projection of the light emitting devices (107, 109, 111) of an ith one (i.e., 2nd one – CS2) of the column sets (CS1, CS2) on the plane in which the display panel (101) is located, wherein i (i.e., i=2) is equal to N;
wherein the light emitting devices (107, 109, 111) arranged in a quantity M of row sets (RS1, RS2) along a second direction (y), wherein M is an integer (i.e., 2) greater than 1, the second direction (y) intersects the first direction (x); and
wherein along a direction (y) from a location near the signal input terminal to a location away from the signal input terminal, an area of an orthographic projection of the light emitting devices of a (j-1)th one (i.e., 1st one – RS1) of the row sets (RS1, RS2) on the plane in which the display panel (101) is located is less than an area of an orthographic projection of the light emitting devices of a jth one (i.e., 2nd one – RS2) of the row sets (RS1, RS2) on the plane in which the display panel (101) is located, wherein j (i.e., j=2) is equal to M.
Note, while Lee does not explicitly disclose a specific location of the signal input terminal within the first region, Jeon does explicitly disclose a pad part (110), i.e., including the signal input terminal (CPP1), disposed in the first region (PAo) near and/or along an upper edge thereof. See, e.g., FIG. 1a and paragraphs [0110]-[0111].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included the signal input terminal as taught by Jeon near the upper edge in the first region (151) of the display panel (101) of Lee, according to known methods to yield predictable results, for example, so that the signal input terminal does not interfere with the light emitting devices while still being included within the display area, and thus, a non-display area (or a bezel area) may not be formed. See, e.g., paragraph [0111] of Jeon.
When the signal input terminal is so disposed near the upper edge in the first region (151) of Lee as taught be Jeon, the row sets (RS1, RS2) are arranged as claimed, i.e., along a direction (y) from a location near the signal input terminal (i.e., near the upper edge) to a location away (i.e., downward) from the signal input terminal.
Regarding claim 12, Lee in view of Jeon as applied to claim 11 discloses the display panel according to claim 11.
Lee in view of Jeon further discloses wherein each of the row sets (RS1, RS2 – see, e.g., annotated FIG. 5 of Lee herein) is at least connected to one of the signal connection lines (CPL, SPL, LCP – see, e.g., FIG. 6 of Jeon), and currents of a plurality of the signal connection lines (CPL, SPL, LCP – see, e.g., FIG. 6 of Jeon) are equal.
Claims 5-6, 10, 13-14 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Jeon as applied respectively to claims 1 and 11 above, and further in view of Forrest (US 5703436 A).
Regarding claim 5, Lee in view of Jeon and Forrest as applied to claim 1 discloses the display panel according to claim 1.
Lee does not explicitly disclose wherein:
the light emitting device comprises a first light emitting chip, a second light emitting chip, and a third light emitting chip, the first light emitting chip is a red light emitting chip, the second light emitting chip is a green light emitting chip, and the third light emitting chip is a blue light emitting chip; and
an effective light emitting area of the first light emitting chip is greater than an effective light emitting area of the second light emitting chip, and the effective light emitting area of the second light emitting chip is greater than an effective light emitting area of the third light emitting chip.
However, in analogous art, Forrest discloses (see, e.g., FIG. 2C):
wherein the light emitting device (29) comprises a first light emitting chip (22), a second light emitting chip (21), and a third light emitting chip (20), the first light emitting chip (22) is a red light emitting chip (see arrow R), the second light emitting chip (21) is a green light emitting chip (see arrow G), and the third light emitting chip (20) is a blue light emitting chip (see arrow B); and
wherein an effective light emitting area of the first light emitting chip (22) is greater than an effective light emitting area of the second light emitting chip (21), and the effective light emitting area of the second light emitting chip (21) is greater than an effective light emitting area of the third light emitting chip (20). See also generally column 6, lines 59-67.
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used the light emitting device (29) as taught by Forrest for the light emitting devices in the display panel (101) of Lee, according to known methods to yield predictable results, for example, so that each light emitting device may be a multicolor light emitting device allowing each pixel to output a spectrum of colors and/or hues. See, e.g., column 6, lines 59-67 of Forrest.
Regarding claim 6, Lee in view of Jeon and Forrest as applied to claim 5 discloses the display panel according to claim 5.
Lee further discloses wherein the display panel (101) further comprises a driver substrate (see paragraph [0024] – note, the “wiring layer” including “electronic circuits” required for the display device reads on the claimed driver substrate and is hereinafter referenced by “DS”).
When Lee is modified to use the light emitting device (29) of Forrest as discussed above with respect to claim 5, Lee in view of Forrest further discloses the first light emitting chip (22 – Forrest) is disposed on the driver substrate (DS – Lee), the second light emitting chip (21 – Forrest) is disposed on the first light emitting chip (22 – Forrest), the third light emitting chip (20 – Forrest) is disposed on the second light emitting chip (21 – Forrest), and an orthographic projection of the first light emitting chip (22 – Forrest) on the driver substrate (DS – Lee), an orthographic projection of the second light emitting chip (21 – Forrest) on the driver substrate (DS – Lee), and an orthographic projection of the third light emitting chip (20 – Forrest) on the driver substrate (DS – Lee) at least overlap one another.
Regarding claim 10, Lee in view of Jeon and Forrest as applied to claim 6 discloses the display panel according to claim 6.
Forrest further discloses wherein in overlapping portions, light (R) emitted from the first light emitting chip (22) is emitted out through the second light emitting chip (21) and the third light emitting chip (20).
Regarding claim 13, Lee in view of Jeon and Forrest as applied to claim 11 discloses the display panel according to claim 11.
Lee does not explicitly disclose wherein:
the light emitting device comprises a first light emitting chip, a second light emitting chip, and a third light emitting chip, the first light emitting chip is a red light emitting chip, the second light emitting chip is a green light emitting chip, and the third light emitting chip is a blue light emitting chip; and
an effective light emitting area of the first light emitting chip is greater than an effective light emitting area of the second light emitting chip, and the effective light emitting area of the second light emitting chip is greater than an effective light emitting area of the third light emitting chip.
However, in analogous art, Forrest discloses (see, e.g., FIG. 2C):
wherein the light emitting device (29) comprises a first light emitting chip (22), a second light emitting chip (21), and a third light emitting chip (20), the first light emitting chip (22) is a red light emitting chip (see arrow R), the second light emitting chip (21) is a green light emitting chip (see arrow G), and the third light emitting chip (20) is a blue light emitting chip (see arrow B); and
wherein an effective light emitting area of the first light emitting chip (22) is greater than an effective light emitting area of the second light emitting chip (21), and the effective light emitting area of the second light emitting chip (21) is greater than an effective light emitting area of the third light emitting chip (20). See also generally column 6, lines 59-67.
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used the light emitting device (29) as taught by Forrest for the light emitting devices in the display panel (101) of Lee, according to known methods to yield predictable results, for example, so that each light emitting device may be a multicolor light emitting device allowing each pixel to output a spectrum of colors and/or hues. See, e.g., column 6, lines 59-67 of Forrest.
Regarding claim 14, Lee in view of Jeon and Forrest as applied to claim 13 discloses the display panel according to claim 13.
Lee further discloses wherein the display panel (101) further comprises a driver substrate (see paragraph [0024] – note, the “wiring layer” including “electronic circuits” required for the display device reads on the claimed driver substrate and is hereinafter referenced by “DS”).
When Lee is modified to use the light emitting device (29) of Forrest as discussed above with respect to claim 13, Lee in view of Forrest further discloses the first light emitting chip (22 – Forrest) is disposed on the driver substrate (DS – Lee), the second light emitting chip (21 – Forrest) is disposed on the first light emitting chip (22 – Forrest), the third light emitting chip (20 – Forrest) is disposed on the second light emitting chip (21 – Forrest), and an orthographic projection of the first light emitting chip (22 – Forrest) on the driver substrate (DS – Lee), an orthographic projection of the second light emitting chip (21 – Forrest) on the driver substrate (DS – Lee), and an orthographic projection of the third light emitting chip (20 – Forrest) on the driver substrate (DS – Lee) at least overlap one another.
Regarding claim 18, Lee in view of Jeon and Forrest as applied to claim 14 discloses the display panel according to claim 14.
Forrest further discloses wherein in overlapping portions, light (R) emitted from the first light emitting chip (22) is emitted out through the second light emitting chip (21) and the third light emitting chip (20).
Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Jeon and Forrest.
Regarding claim 19, Lee discloses (see generally, e.g., FIG. 1A and annotated FIG. 5 herein):
A display panel (101), comprising a pixel region (151, 152) defined in the display panel (101), wherein the pixel region (151, 152) comprises a first region (151) and a second region (152), and the display panel (101) further comprises:
a plurality of light emitting devices (107, 109, 111) disposed in the first region (151) and the second region (152) (note, in FIG. 5 the light emitting devices are illustrated but are not labeled with the corresponding reference characters, however, they are label with corresponding reference characters, e.g., in FIG. 1A); and
a signal connection line (see paragraph [0024] – note, the “various wiring lines” of the “wiring layer” read on the claimed signal connection line and are hereinafter referenced by “SCL”); and
an area of an orthographic projection of the light emitting devices (107, 109, 111) in the second region (152) on a plane in which the display panel (101) is located is greater than an area of an orthographic projection of the light emitting devices (107, 109, 111) in the first region (151) on the plane in which the display panel (101) is located (see FIG. 5).
Lee does not explicitly disclose:
a signal input terminal disposed in the first region,
wherein the signal input terminal is sequentially connected to the light emitting devices (107, 109, 111) in the first region (151) and the light emitting devices (107, 109, 111) in the second region (152) through the signal connection line (SCL).
However, in analogous art, Jeon discloses (see generally, e.g., FIGS. 1A and 6):
a signal input terminal (CPP1) disposed in the first region (PAo),
wherein the signal input terminal (CPP1) is sequentially connected to the light emitting devices (Po, Pi) in the first region (PAo) and the light emitting devices (Po, Pi) in the second region (PAi) through the signal connection line (CPL). See also, e.g., paragraphs [0205]-[0206].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included a signal terminal as taught by Jeon in the first region (151) of the display panel (101) of Lee, wherein the signal terminal is sequentially connected to the light emitting devices (107, 109, 111) in the first region (151) of Lee and the light emitting devices (107, 109, 111) in the second region (152) of Lee through the signal connection line (SCL) of Lee according to known methods to yield predictable results, for example, to provide an input through which electrical signals can be supplied to drive and/or operate the light emitting devices.
The conclusion of obviousness is further supported by an “obvious to try” rational. See, e.g., MPEP § 2143(I)(E). In particular, it is found that: (1) at the relevant time, there had been a recognized problem or need in the art, namely, a need to supply a signal to drive and/or operate the light emitting devices in first and second regions of a display panel; (2) there had been a finite number of identified, predictable potential solutions to the recognized need or problem, e.g., (i) disposing a signal input terminal in the first region so as to be sequentially connected to the light emitting devices in the first region and the light emitting devices in the second region, or (ii) disposing a signal input terminal in the second region so as to be sequentially connected to the light emitting devices in the second region and the light emitting devices in the first region; and (3) one of ordinary skill in the art could have pursued the known potential solutions with a reasonable expectation of success.
Lee further discloses:
wherein the first region (151) and the second region (152) are disposed along a first direction (x), the light emitting devices (107, 109, 111) in the second region (152) are arranged in a quantity N of column sets (CS1, CS2) along the first direction (x), wherein N is an integer (i.e., 2) greater than 1;
wherein along a direction (x) from a location near the signal input terminal to a location away from the signal input terminal (note, as modified in accordance with the teachings of Jeon, the signal terminal is disposed in the first region (151) of Lee) , an area of an orthographic projection of the light emitting devices (107, 109, 111) of a (i-1)th one (i.e., 1st one – CS1) of the column sets (CS1, CS2) on the plane in which the display panel (101) is located is less than an area of an orthographic projection of the light emitting devices (107, 109, 111) of an ith one (i.e., 2nd one – CS2) of the column sets (CS1, CS2) on the plane in which the display panel (101) is located, wherein i (i.e., i=2) is equal to N;
Lee does not explicitly disclose:
wherein the light emitting device comprises a first light emitting chip, a second light emitting chip, and a third light emitting chip, the first light emitting chip is a red light emitting chip, the second light emitting chip is a green light emitting chip, and the third light emitting chip is a blue light emitting chip; and
wherein an effective light emitting area of the first light emitting chip is greater than an effective light emitting area of the second light emitting chip, and the effective light emitting area of the second light emitting chip is greater than an effective light emitting area of the third light emitting chip.
However, in analogous art, Forrest discloses (see, e.g., FIG. 2C):
wherein the light emitting device (29) comprises a first light emitting chip (22), a second light emitting chip (21), and a third light emitting chip (20), the first light emitting chip (22) is a red light emitting chip (see arrow R), the second light emitting chip (21) is a green light emitting chip (see arrow G), and the third light emitting chip (20) is a blue light emitting chip (see arrow B); and
wherein an effective light emitting area of the first light emitting chip (22) is greater than an effective light emitting area of the second light emitting chip (21), and the effective light emitting area of the second light emitting chip (21) is greater than an effective light emitting area of the third light emitting chip (20). See also generally column 6, lines 59-67.
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have used the light emitting device (29) as taught by Forrest for the light emitting devices in the display panel (101) of Lee, according to known methods to yield predictable results, for example, so that each light emitting device may be a multicolor light emitting device allowing each pixel to output a spectrum of colors and/or hues. See, e.g., column 6, lines 59-67 of Forrest.
Regarding claim 20, Lee in view of Jeon and Forrest as applied to claim 19 discloses the display panel according to claim 19.
Lee further discloses:
wherein the light emitting devices (107, 109, 111) arranged in a quantity M of row sets (RS1, RS2) along a second direction (y), wherein M is an integer (i.e., 2) greater than 1, the second direction (y) intersects the first direction (x); and
Lee in view of Jeon further discloses:
wherein along a direction (y) from a location near the signal input terminal to a location away from the signal input terminal, an area of an orthographic projection of the light emitting devices of a (j-1)th one (i.e., 1st one – RS1) of the row sets (RS1, RS2) on the plane in which the display panel (101) is located is less than an area of an orthographic projection of the light emitting devices of a jth one (i.e., 2nd one – RS2) of the row sets (RS1, RS2) on the plane in which the display panel (101) is located, wherein j (i.e., j=2) is equal to M. See, e.g., annotated FIG. 5 of Lee herein.
Note, while Lee does not explicitly disclose a specific location of the signal input terminal within the first region, Jeon does explicitly disclose a pad part (110), i.e., including the signal input terminal (CPP1), disposed in the first region (PAo) near and/or along an upper edge thereof. See, e.g., FIG. 1a and paragraphs [0110]-[0111].
It would have been obvious to and within the capabilities of one of ordinary skill in the art before the effective filing date of the claimed invention to have included the signal input terminal as taught by Jeon near the upper edge in the first region (151) of the display panel (101) of Lee, according to known methods to yield predictable results, for example, so that the signal input terminal does not interfere with the light emitting devices while still being included within the display area, and thus, a non-display area (or a bezel area) may not be formed. See, e.g., paragraph [0111] of Jeon.
When the signal input terminal is so disposed near the upper edge in the first region (151) of Lee as taught be Jeon, the row sets (RS1, RS2) are arranged as claimed, i.e., along a direction (y) from a location near the signal input terminal (i.e., near the upper edge) to a location away (i.e., downward) from the signal input terminal.
Allowable Subject Matter
Claims 7-9 and 15-17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter.
Regarding claim 7, the prior art of record, alone or in combination, fails to disclose, along with the other claimed limitations and/or features, inter alia: “a cathode layer and a cathode wiring, the cathode layer is disposed between the driver substrate and the first light emitting chip, a via hole is defined in each of the light emitting devices, the via hole penetrates the third light emitting chip, the second light emitting chip, and the first light emitting chip and exposes the cathode layer, the cathode wiring is disposed in the via hole, and the cathode wiring is connected to the cathode layer, and a cathode of the first light emitting chip, a cathode of the second light emitting chip, and a cathode of the third light emitting chip is connected to the cathode wiring,” in such a manner as to anticipate the claim or render the claim obvious.
Claims 8-9 depend from claim 7, and accordingly are indicated as including allowable subject matter for at least the same reasons as claim 7.
Regarding claim 15, the prior art of record, alone or in combination, fails to disclose, along with the other claimed limitations and/or features, inter alia: “a cathode layer and a cathode wiring, the cathode layer is disposed between the driver substrate and the first light emitting chip, a via hole is defined in each of the light emitting devices, the via hole penetrates the third light emitting chip, the second light emitting chip, and the first light emitting chip and exposes the cathode layer, the cathode wiring is disposed in the via hole, and the cathode wiring is connected to the cathode layer, and a cathode of the first light emitting chip, a cathode of the second light emitting chip, and a cathode of the third light emitting chip is connected to the cathode wiring,” in such a manner as to anticipate the claim or render the claim obvious.
Claims 16-17 depend from claim 15, and accordingly are indicated as including allowable subject matter for at least the same reasons as claim 15.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN P CORNELY whose telephone number is (571)272-4172. The examiner can normally be reached Monday - Thursday 8:30 AM - 4:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JOHN P. CORNELY
Examiner
Art Unit 2812
/J.P.C./Examiner, Art Unit 2812
/DAVIENNE N MONBLEAU/Supervisory Patent Examiner, Art Unit 2812
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