Prosecution Insights
Last updated: April 19, 2026
Application No. 18/524,171

DISPLAY PANELS AND DISPLAY DEVICES

Non-Final OA §102§103
Filed
Nov 30, 2023
Examiner
KIM, SU C
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Shenzhen China Star Optoelectronics Semiconductor Display Technology Co. Ltd.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
2y 11m
To Grant
65%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
695 granted / 899 resolved
+9.3% vs TC avg
Minimal -12% lift
Without
With
+-12.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
48 currently pending
Career history
947
Total Applications
across all art units

Statute-Specific Performance

§103
57.6%
+17.6% vs TC avg
§102
25.0%
-15.0% vs TC avg
§112
6.5%
-33.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 899 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-5, 9-17, & 19-20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Park et al. (US 20150221695). Regarding claim 1, Park discloses that a display panel, comprising: a substrate 120; a first wiring layer 122, disposed on the substrate 120; a second wiring layer 222ab, disposed on and insulated from the first wiring layer 122, and comprising: a first connection part 313p; and a second connection part, 311p electrically connected to the first connection part, and disposed on a side of the first connection part (Fig. 4A); an insulation layer 225 & 210, disposed on the second wiring layer 222ab, and provided with a plurality of first via holes 312p above the first wiring layer 122 and a plurality of second via holes 311p & 313p above the first connection part and the second connection part; and a transfer layer 275, disposed on the insulation layer 225 & 210, and connecting to the first wiring layer 122 and the second wiring layer 222ab through the plurality of first via holes 312p and the plurality of second via holes 311p & 313p. PNG media_image1.png 414 480 media_image1.png Greyscale Reclaim 2, Park discloses that a distance between each of the second via holes 311p above the first connection part 311p (at contact) and a corresponding one of the first via holes 312p is greater than or equal to a distance between each of the second via holes above the second connection part and a corresponding one of the first via holes (Fig.4A, the first via is longer than the second via). Reclaim 3, Park discloses that each of the second via holes 311p above the second connection part 311p is arranged on a perpendicular bisector between two adjacent ones of the second via holes above the first connection part (Fig. 4A). Reclaim 4, Park discloses that each of the second via holes 311p above the first connection part and a corresponding one of the second via holes above the second connection part are arranged symmetrically with respect to a center of a corresponding one of the first via holes (Fig. 4A, in y axis). Reclaim 9, Park discloses that a projection of the first connection part 313p (at contact) on the substrate 110 partially overlaps with a projection of the first wiring layer 122 on the substrate 110, and a projection of the second connection part 311p on the substrate partially overlaps with the projection of the first wiring layer 122 on the substrate (Fig. 4A); the second via holes 313p above the first connection part are all arranged in an overlapping area of the first connection part (at contact area of a via) and the first wiring layer 122, the second via holes 311p above the second connection part (at contact part of via) are all arranged in an overlapping area of the second connection part and the first wiring layer 122, and each of the second via holes exposes part of the second wiring layer (Fig. 4A). Reclaim 10, Park discloses that the display panel further comprises a display area and a non-display area, the first connection part is disposed in the display area and extends into the non-display area, the second connection part is disposed in at an edge on a side of the non- display area away from the display area (Fig. 4A, LCD, para. 0181). Reclaim 11, Park discloses that an overlapping area of projections of the second connection part 311p and the first wiring layer 125 on the substrate 110 is less than an overlapping area of projections of the first connection part and the first wiring layer on the substrate (Fig. 4A). Reclaim 12, Park discloses that in a direction from the display area towards the non-display area, a length of the second connection part 311p is shorter than a length of the first connection part 313p (para. 0181). Reclaim 13, Park discloses that the first connection part 313p and the second connection part 311p are respectively provided on opposite sides of the plurality of first via holes (Fig. 4A). Reclaim 14, Park discloses that the plurality of first via holes 312p are arranged side by side in one or more columns each having a column direction perpendicular to an arrangement direction of the first connection part 313p and the second connection part 311p (Fig. 4A). Reclaim 15, Park discloses that the second via holes 311p above the first connection part and the second connection part are arranged side by side in one or more columns each having a column direction parallel to the column direction of the plurality of first via holes 312p (Fig. 4A). Reclaim 16, Park discloses that the second via holes 311p above the second connection part (at contact of the second via) are arranged side by side in one column, and the transfer layer is only electrically connected to portions of the second wiring layer corresponding to the second via holes above the second connection part with even numbers starting from any end of the column (Fig. 4A). Reclaim 17, Park discloses that the first connection part 311p and the second connection part 312p (at contact of the via) are provided on a same side of the plurality of first via holes (Fig. 4A). Reclaim 19, Park discloses that another insulation layer, defined as a first insulation layer 125, disposed on the substrate and covering the first wiring layer 125, wherein the second wiring layer 222ab is disposed on the first insulation layer 125, the insulation layer disposed on the second wiring layer 225 is defined as a second insulation layer, the second insulation layer is disposed on the first insulation layer 125 and covering the second wiring layer 22ab; and wherein the transfer layer 275 is disposed on the second insulation layer 225, each of the first via holes 312p penetrates the first insulation layer and the second insulation layer to expose part of the first wiring layer 122, and each of the second via holes above the first connection part penetrates the second insulation layer 225 to expose part of the first connection part, and each of the second via holes above the second connection part penetrates the second insulation layer to expose part of the second connection part (Fig. 4A). Regarding claim 20, Park discloses that a display device, comprising a display panel, and the display panel comprising: a substrate 110; a first wiring layer 125, disposed on the substrate; a second wiring layer 222ab, disposed on and insulated 125 from the first wiring layer, and comprising: a first connection part (at contact of via 3119 & 313P); and a second connection part (at contact of via 3119 & 313P), electrically connected to the first connection part, and disposed on a side of the first connection part; an insulation layer 225, disposed on the second wiring layer 222ab, and provided with a plurality of first via holes above the first wiring layer and a plurality of second via holes above the first connection part and the second connection part; and a transfer layer 275, disposed on the insulation layer 225, and connecting to the first wiring layer and the second wiring layer through the plurality of first via holes and the plurality of second via holes (Fig. 4A). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 5-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 20150221695). Reclaim 5, Park fails to teach that the plurality of first via holes are arranged side by side and at equal intervals, the second via holes above the first connection part are arranged side by side and at equal intervals, and the second via holes above the second connection part are arranged side by side and at equal intervals. However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain space between vias, because it would have been to obtain a certain space between vias to achieve control magnetic field around vias and equalize vias density in that area. Reclaim 6, Park discloses that an arrangement direction of the plurality of first via holes, an arrangement direction of the second via holes above the first connection part, and an arrangement direction of the second via holes above the second connection part are the same (Fig. 4A). Reclaim 7, Park fails to specify that a number of the second via holes above the first connection part is greater than or equal to a number of the second via holes above the second connection part. However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain space between vias, because it would have been to obtain a certain space between vias to achieve control magnetic field around vias and equalize vias density in that area. Reclaim 8, Park fails to teach that a diameter of each of the second via holes above the first connection part is less than or equal to a diameter of each of the second via holes above the second connection part, and the diameter of each of the second via holes is less than a diameter of each of the first via holes. However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization. Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain ratio of a diameter of the second via hole and the first via hole, because it would have been to obtain a certain space between vias to achieve properly electrical contact due to different depth of vias by reducing air bubble during deposition of metals i.e. a first via is deeper than a second via hole). Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Park et al. (US 20150221695) in view of Kwon (US 20070048969 ). Reclaim 18, Park discloses that each of the second via holes above the first connection part has a slope of a side wall and a slope of a side wall of each of the second via holes above the second connection part (Fig. 4A). However, Park fails to teach each of the second via holes above the first connection part has a slope of a side wall less than a slope of a side wall of each of the second via holes above the second connection part. However, Kwon suggests that each of the second via holes above the first connection part has a slope of a side wall less than a slope of a side wall of each of the second via holes above the second connection part (Fig. 6, note: different slops on the different via). Therefore, it would have been obvious to one of ordinary skill in the art before effective filing date of applicant(s) claimed invention was made to provide Park with each of the second via holes above the first connection part has a slope of a side wall less than a slope of a side wall of each of the second via holes above the second connection part as taught by Kwon in order to improve in yield and device reliability (para. 0088) and also, the claim would have been obvious because a particular know technique was recognized as part of the ordinary capabilities of one skilled in the art. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SU C KIM whose telephone number is (571)272-5972. The examiner can normally be reached M-F 9:00 to 5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SU C KIM/ Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Nov 30, 2023
Application Filed
Feb 03, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
65%
With Interview (-12.4%)
2y 11m
Median Time to Grant
Low
PTA Risk
Based on 899 resolved cases by this examiner. Grant probability derived from career allow rate.

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