DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed on July 2, 20260has been entered. Claim(s) 2 and 15 has/have been canceled and claim(s) 21-22 has/have been added. Therefore, claim(s) 1, 3-14, and 16-22 are pending in the application.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim(s) 21-22 is/are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
With respect to claim 21, as currently presented, the claim requires manufacturing a second plurality of through-vias in a wafer, wherein the second plurality of through-vias are discrete through-vias, where a second layout that comprises a large through-via and the second plurality of through-vias, also includes a large guard ring that encircles the second plurality of through-vias. While the specification discloses large guard ring(s) in a second layout that encircle a large through-via(s) formed by merging a plurality of discrete through-vias, as shown in Figs. 5-6, specification fails to disclose a large guard ring that encircles a plurality a discrete through-vias of the second plurality of through-vias, in the second layout that are manufactured in a wafer along with the large through-via, as recited in the claim. Accordingly, the claim contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 22, which directly depends from claim 21, and which inherits issues of claim 21, is rejected for similar reason.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Knickerbocker (US 2011/0042795, hereinafter “Knickerbocker”, previously cited) in view of Kwon et al. (US 2015/0187742, hereinafter “Kwon”, previously cited) and Lukanc (US 6,615,400, hereinafter “Lukanc”, previously cited).
Regarding claim 18, Knickerbocker teaches in Figs. 3A-3B, 6, 9A-9C and 10A-10C (Figs. 3B and 6 shown below) and related text a method comprising: finding a first plurality of through-vias (e.g. vias 614 connected to Vdd, Fig. 6) from a first layout of an integrated circuits (e.g. layout of plane 610a, Fig. 6), wherein in the first layout, the first plurality of through-vias are in contact with a metal pad (e.g. pad on top of vias 614 connected to Vdd, Fig. 6 and ¶[0078]); finding a second plurality of through-vias (e.g. vias 326 between vias 614 connected to Vdd and vias 614 connected to GND, Fig. 6) from the first layout (e.g. layout of plane 610a, Fig. 6), wherein in a second layout, the second plurality of through-vias are discrete through-vias (Fig. 6); and manufacturing through-via and the second plurality of through-vias in a wafer (Figs. 9A-9C, 10A-10C, and ¶[0073]).
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Knickerbocker, however, does not explicitly teach that the first plurality of through-vias are merged to form a large through-via in a second layout, wherein the large through-via replaces the first plurality of through-vias. Knickerbocker also does not explicitly teach wherein in the first layout the second plurality of through-vias are in contact with a plurality of metal pads.
To begin with, Lukanc teaches in Fig. 1-5 and related text that a first plurality of through-vias (e.g. e.g. vias 205 on the left side of area 210, Fig. 2, 100, Fig. 1) in a first layout, similar to those disclosed by Knickerbocker, can be merged to form a large though-via (e.g. 405, Figs. 4-5 and 120, Fig. 1) in a second layout (Fig. 4), wherein the large through-via (405, Figs. 4-5) replaces the first plurality of through-vias (125, Fig. 1), in order to improve device manufacturing and provide a higher quality device (col. 2, ll. 53-55).
Thus, since the prior art teaches all of the claimed elements using such elements would lead to predictable results and, as such, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to merge the first plurality of though-vias, disclosed by Knickerbocker, to form a large though-in a second layout, wherein the large through-via replaces the first plurality of through-vias, in order to improve device manufacturing and provide a higher quality device.
Moreover, forming metal pads at the end of the through-vias disclosed by Knickerbocker and Lukanc, so that the through-vias are in contact with the metal pads would have been obvious to one of ordinary skill in the art as evidenced by Kwon. Specifically, Kwon in Figs. 1 and 8 and related text teaches that when through-vias (e.g. 120, Fig. 1 and ¶[0083]), similar to those disclosed by Knickerbocker and Lukanc, are formed through a substrate (110, Figs. 1 and 8) pads (122, Fig. 1 and ¶[0084]) can be formed and in contact with the through-vias in order to provide connection areas for subsequently formed wiring and/or connection members.
Thus, since the prior art teaches all of the claimed elements using such elements would lead to predictable results and, as such, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form a plurality of metal pads, as disclosed by Kwon, that contact the second plurality of through-vias, disclosed by Knickerbocker and Lukanc, in order to provide connection areas for the subsequently formed wiring and/or connection members.
Regarding claim 19 (18), the combined teaching of Knickerbocker, Lukanc and Kwon discloses wherein the first layout (Knickerbocker, layout of plane 306a, Fig. 3B and 610, Fig. 6) further comprises an additional through-via (Knickerbocker, e.g. one of the vias 326 connected to Vdd, Fig. 3B and 614) in contact with the metal pad (Knickerbocker, e.g. metal pad on top of four vias 326 or vias 614 connected to Vdd, Figs. 3B and 6), and wherein in the wafer, the additional through-via and the large through-via (Knickerbocker and Lukanc, e.g. large through-via 328 connected to vias 326 connected to Vdd, Figs. 3B and 6) are separate through-vias (i.e. in Knickerbocker modified by Lukanc the large through-via and the additional through-vias would be separate) that are connected in parallel (Knickerbocker, e.g. connected though the pad connecting vias 326, Figs. 3B and 6, where it is noted that based on the teaching of Lukanc only some of the vias disclosed by Knickerbocker would be combined into the large through-via, which would results in additional through-vias being present separate from the large through-via).
Regarding claim 20 (18), the combined teaching of Knickerbocker, Lukanc and Kwon discloses wherein the second plurality of through-vias (Knickerbocker, e.g. vias 614 between vias 614 connected to Vdd and GND, Fig. 6) are arranged as a row (Knickerbocker, Fig. 6).
Allowable Subject Matter
Claim(s) 1, 3-14 and 16-17 allowed.
The following is an examiner’s statement of reasons for indicating allowable subject matter:
Regarding claim 1, the prior art of record, alone or in combination, and to the examiner’s knowledge does not teach, disclose, suggest, or render obvious, at least to the skilled artisan, the instant invention regarding a method of determining and merging a plurality of through-silicon vias from a first layout, into a large through-silicon via in a second layout, particularly characterized by the steps of merging guard rings that encircle each of the second plurality of through-silicon vias into a large guard ring that encircles the large through-silicon via, in combination with all other method steps recited in the claim. Claim(s) 3-12, which either directly or indirectly depend from claim(s) 1, and which include all of the limitations recited in claim(s) 1, is/are allowed for similar reasons.
Regarding claim 13, the prior art of record, alone or in combination, and to the examiner’s knowledge does not teach, disclose, suggest, or render obvious, at least to the skilled artisan, the instant invention regarding a method of determining and merging a plurality of through-silicon vias, particularly characterized by the step of generating a second layout that comprises merging guard rings encircling the plurality of though-vias to form a large guard ring encircling the large through-silicon via, in combination with all other method steps recited in the claim. Claim(s) 14 and 16-17, which either directly or indirectly depend from claim(s) 13, and which include all of the limitations recited in claim(s) 13, is/are allowed for similar reasons.
Response to Arguments
Applicant’s arguments with respect to claim(s) 18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANETA B CIESLEWICZ whose telephone number is 303-297-4232. The examiner can normally be reached M-F 8:30 AM - 2:30 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/A.B.C/Examiner, Art Unit 2893
/SUE A PURVIS/Supervisory Patent Examiner, Art Unit 2893
