DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The IDS filed on November 30th, 2023 has been considered.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: Integrated circuit comprising a high voltage isolation device including a silicon nitride bilayer.
Claim Objections
Claims 1 and 12 are objected to because of the following informalities:
In claim 1, line 9, “first SiN” should be --first SiN layer--.
In claim 12, line 8, “the first SiN” should be --the first SiN layer--.
Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over West et al. (U.S. Pub. 2015/0333055) in view of JP2002270879A, machine English translation included.
In re claim 1, West discloses an integrated circuit (IC) 100, comprising: a semiconductor substrate 102 (see paragraph [0013] and fig. 1); a metal bottom plate 130 over the semiconductor substrate 102 (see paragraph [0016] and fig. 1); a metal top plate 132 over the metal bottom plate 130 (see paragraph [0016] and fig. 1); and a dielectric structure disposed between the top 132 and bottom 130 plates, the dielectric structure including a silicon nitride (SiN) layer 144 underlying the top plate 132 (see paragraph [0017] and fig. 1).
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West discloses that a second sub-layer of silicon nitride 144 is disposed underlying the top plate 132 and a first sub-layer of silicon oxide nitride 142 underneath and directly contacting the second sub-layer of silicon nitride 144 (see paragraph [0017] and fig. 1) but is silent to wherein the dielectric structure including a silicon nitride (SiN) bilayer underlying the top plate, the SiN bilayer including a first SiN layer directly contacting the top plate and having a first refractive index (RI), and a second SiN layer underneath and directly contacting the first SiN layer and having a second RI greater than the first RI.
However, JP2002270879A discloses a semiconductor device including, inter-alia, a dielectric structure including a silicon nitride (SiN) bilayer (3a,3b), the SiN bilayer including a first SiN layer 3b having a first refractive index (RI), and a second SiN layer 3a underneath and directly contacting the first SiN layer 3b and having a second RI greater than the first RI in order to provide a semiconductor device having excellent reflection characteristics (see page 2 of English translation and fig. 1).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by JP2002270879A into the integrated circuit of West in order to enable the dielectric structure including a silicon nitride (SiN) bilayer underlying the top plate, the SiN bilayer including a first SiN layer directly contacting the top plate and having a first refractive index (RI), and a second SiN layer underneath and directly contacting the first SiN layer and having a second RI greater than the first RI in West to be formed in order to provide a semiconductor device having excellent reflection characteristics (see page 2 of English translation of JP2002270879A). Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id.
In re claim 2, as applied to claim 1 above, West is silent to wherein the first SiN layer has an RI of about 2.0 to 2.15.
However, JP2002270879A discloses wherein the first SiN layer 3b has an RI of about 1.9 to 2.1 (see page 2 of English translation).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by JP2002270879A into the integrated circuit of West in order to adjust the amount of silane and ammonia during deposition in order to obtain a first SiN layer to have an RI of about 2.0 to 2.15 since where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See in re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955).
In re claim 3, as applied to claim 1 above, West is silent to wherein the second SiN layer has an RI of about 2.2 to 2.4.
However, JP2002270879A discloses wherein the second SiN layer 3a has an RI of 2.1 or more and 2.3 or less (see page 2 of English translation).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by JP2002270879A into the integrated circuit of West in order to adjust the amount of silane and ammonia during deposition in order to obtain a second SiN layer to have an RI of about 2.2 to 2.4 since where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See in re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955).
In re claim 4, as applied to claim 1 above, West and JP2002270879A are silent to wherein the first SiN layer has a thickness less than about 20% of a total thickness of the SiN bilayer.
However, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the thickness of the first SiN layer with respect to the total thickness of the SiN bilayer during routine experimentation so that the first SiN layer has a thickness less than about 20% of a total thickness of the SiN bilayer since it is respectfully submitted that the configuration regarding about the size of the first SiN layer was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966)). Furthermore, a change in size is generally recognized as being within the level of ordinary skill in the art. See In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955), Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), and MPEP 2144.04.
In re claim 5, as applied to claim 1 above, West discloses wherein the silicon nitride layer 144 has a thickness of about 200 nm to 600 nm (see paragraph [0017]) and JP2002270879A discloses wherein the first SiN layer 3b has a thickness of about 20 nm or more (see page 2 of English translation) but is silent to wherein the first SiN layer has a thickness of about 50 nanometers (nm) to 100 nm.
However, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the thickness of the first SiN layer to be in a range of about 50 nm to 100 nm during routine experimentation since where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See in re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955).
In re claim 6, as applied to claim 1 above, West discloses wherein the silicon nitride layer 144 has a thickness of about 200 nm to 600 nm (see paragraph [0017]) and JP2002270879A discloses wherein the second SiN layer 3a has a thickness of about 20 nm or more (see page 2 of English translation) but is silent to wherein the second SiN layer has a thickness of about 500 to 700 nm.
However, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the thickness of the second SiN layer to be in a range of about 500 nm to 700 nm during routine experimentation since where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See in re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955).
In re claim 7, as applied to claim 1 above, West in combination with JP2002270879A discloses wherein the SiN bilayer extends beyond the top plate (see paragraph [0017] and fig. 1 of West).
In re claim 8, as applied to claim 7 above, West in combination with JP2002270879A discloses wherein the SiN bilayer includes an isolation break region 150 in a portion extending beyond the top plate 132 (see paragraph [0017] and fig. 1 of West).
In re claim 9, as applied to claim 1 above, West in combination with JP2002270879A discloses wherein the SiN bilayer is disposed over an oxynitride layer 142 overlying a main dielectric component 136 of the dielectric structure, the main dielectric component 136 having a thickness 138 of at least 2 microns (µm) (about 16 to 20 µm) (see paragraph [0016] and fig. 1 of West).
In re claim 10, as applied to claim 1 above, West in combination with JP2002270879A discloses wherein the top plate 132 is formed from a topmost metal layer of a multilevel metal interconnect formation over the semiconductor substrate 102 (see paragraph [0017] and fig. 1 of West).
In re claim 11, as applied to claim 1 above, West in combination with JP2002270879A discloses wherein the bottom plate 130 is formed from an intermediate metal layer of a multilevel metal interconnect formation over the semiconductor substrate 102 (see paragraph [0017] and fig. 1).
In re claim 12, West discloses a method of fabricating an integrated circuit (IC) 100, comprising: forming a bottom electrode 130 of an isolation component over a semiconductor substrate 102 (see paragraph [0016] and fig. 1); and forming a dielectric structure between the bottom electrode 130 and a top electrode 132 of the isolation component, the dielectric structure including a silicon nitride (SIN) layer 144 underlying the top electrode 132 (see paragraph [0017] and fig. 1).
West discloses that a second sub-layer of silicon nitride 144 is disposed underlying the top electrode 132 and a first sub-layer of silicon oxide nitride 142 underneath and directly contacting the second sub-layer of silicon nitride 144 (see paragraph [0017] and fig. 1) but is silent to wherein the dielectric structure including a silicon nitride bilayer underlying the top electrode, the SiN bilayer including a first SiN layer directly contacting the top electrode and having a first refractive index (RI), and a second SiN layer underneath and directly contacting the first SiN layer and having a second RI greater than the first RI.
However, JP2002270879A discloses a semiconductor device including, inter-alia, a dielectric structure including a silicon nitride (SiN) bilayer (3a,3b), the SiN bilayer including a first SiN layer 3b having a first refractive index (RI), and a second SiN layer 3a underneath and directly contacting the first SiN layer 3b and having a second RI greater than the first RI in order to provide a semiconductor device having excellent reflection characteristics (see page 2 of English translation and fig. 1).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by JP2002270879A into the integrated circuit of West in order to enable wherein the dielectric structure including a silicon nitride bilayer underlying the top electrode, the SiN bilayer including a first SiN layer directly contacting the top electrode and having a first refractive index (RI), and a second SiN layer underneath and directly contacting the first SiN layer and having a second RI greater than the first RI in West to be formed in order to provide a semiconductor device having excellent reflection characteristics (see page 2 of English translation of JP2002270879A). Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id.
In re claim 13, as applied to claim 12 above, West is silent to wherein the first RI is in a range from about 2.0 to about 2.15.
However, JP2002270879A discloses wherein the first SiN layer 3b has an RI of about 1.9 to 2.1 (see page 2 of English translation).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by JP2002270879A into the integrated circuit of West in order to adjust the amount of silane and ammonia during deposition in order to obtain a first RI in a range from about 2.0 to about 2.15 since where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See in re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955).
In re claim 14, as applied to claim 12 above, West is silent to wherein the second RI is in a range from about 2.2 to about 2.4.
However, JP2002270879A discloses wherein the second SiN layer 3a has an RI of 2.1 or more and 2.3 or less (see page 2 of English translation).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by JP2002270879A into the integrated circuit of West in order to adjust the amount of silane and ammonia during deposition in order to obtain a second RI in a range from about 2.2 to about 2.4 since where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation. See in re Aller, 220 F.2d 454, 456, 105 USPQ 233 (CCPA 1955).
In re claim 15, as applied to claim 12 above, West and JP2002270879A are silent to wherein the first SiN layer has a thickness less than about 20% of a total thickness of the SiN bilayer.
However, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to optimize the thickness of the first SiN layer with respect to the total thickness of the SiN bilayer during routine experimentation so that the first SiN layer has a thickness less than about 20% of a total thickness of the SiN bilayer since it is respectfully submitted that the configuration regarding about the size of the first SiN layer was a matter of choice which a person of ordinary skill in the art would have found obvious absent persuasive evidence that the particular configuration was significant (In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966)). Furthermore, a change in size is generally recognized as being within the level of ordinary skill in the art. See In re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955), Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), and MPEP 2144.04.
In re claim 16, as applied to claim 12 above, West in combination with JP2002270879A discloses wherein the method further comprising forming an isolation break region 150 in a portion of the SiN bilayer extending beyond the top electrode 132 (see paragraph [0017] and fig. 1 of West).
In re claim 17, as applied to claim 12 above, West in combination with JP2002270879A discloses wherein the SiN bilayer is formed over an oxynitride layer 142 overlying a main dielectric component 136 of the dielectric structure, the main dielectric component 136 overlying the bottom electrode 130 and having a thickness 138 of at least 2 microns (µm) (about 16 to 20 µm) (see paragraph [0016] and fig. 1 of West).
In re claim 18, as applied to claim 12 above, West in combination with JP2002270879A discloses wherein the top electrode 132 is formed from a topmost metal layer of a multilevel metal interconnect formed over the semiconductor substrate 102 (see paragraph [0017] and fig. 1 of West).
In re claim 19, as applied to claim 12 above, West in combination with JP2002270879A discloses wherein the bottom electrode 130 is formed from an intermediate metal layer of a multilevel metal interconnect formed over the semiconductor substrate 102 (see paragraph [0017] and fig. 1).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Lakowicz et al. (U.S. Pub. 2015/0338345) discloses that the refractive index of Si3N4 can be adjusted by the relative amounts of silane and ammonia during deposition (see paragraph [0093]).
Matsushita (U.S. Pub. 2017/0256626) discloses that amount of silane gas (SiH4) and ammonia gas (NH3) can be adjust so that the refractive index of the silicon nitride layer becomes less than 1.9 (see paragraph [0056]).
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/KHIEM D NGUYEN/Primary Examiner, Art Unit 2892