DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restriction
Applicant’s election without traverse of Group I, claims 1-10 in the reply filed on 02/18/2026 is acknowledged.
Claims 11-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim.
Claims 1-10 have been fully considered in Examination.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 11/30/2023 is/are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) is/are being considered by the examiner.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the components described in the specification and claims must be shown and explicitly denoted in the figures with reference labels or the feature(s) canceled from the claim(s). The specification should also be amended to support corresponding reference labels for the drawings. No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because it does not contain reference labels for the disclosed components. The specification should be amended to include reference labels corresponding to the reference labels to be added to the figures (see Drawings Objection above) for each of the claimed components.
Claim Objections
Claims objected to because of the following informalities:
Claim 4, line 1: “wherein encapsulating material comprises” should read --- wherein the encapsulating material comprises ---
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
The limitation(s) “a fill factor of 70 percent and greater” is not properly described or defined by the instant application. Based on the support provided by the instant application’s drawings and specification, it cannot be clearly determined what specifically the term “fill factor” refers to in the context of claim 1. Therefore, for the purposes of Examination, the limitation(s) “a fill factor of 70 percent and greater” has been interpreted as --- a fill factor of each of the plurality of die of 70 percent and greater --- however, this edit may be altered if Applicant intends otherwise.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 5 and 9-10 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 5 recites the limitation “further comprising separating each of the packaged components” in line 1. There is insufficient antecedent basis for this limitation in the claim. There is no specific prior recitation of “package components” in claim 5 or claim 1 on which claim 5 depends, rendering it unclear what “packaged components” refers to in claim 5. Therefore, for Examination purposes, Examiner has interpreted “further comprising separating each of the packaged components” as --- further comprising separating each of a plurality of packaged components --- however, this edit may be altered if Applicant intends otherwise.
Claim 9 recites the limitation “the frontside surface” in line 3. There is insufficient antecedent basis for this limitation in the claim. There is no prior recitation of “a frontside surface” in claim 9 or claim 1 on which claim 9 depends, rendering it unclear what “the frontside surface” in claim 9 refers to. Therefore, for Examination purposes, Examiner has interpreted “the frontside surface” as --- a frontside surface --- however, this edit may be altered if Applicant intends otherwise.
Claim 10 recites the limitation “the frontside surface” in line 3. There is insufficient antecedent basis for this limitation in the claim. There is no prior recitation of “a frontside surface” in claim 10 or claim 1 on which claim 10 depends, rendering it unclear what “the frontside surface” in claim 10 refers to. Therefore, for Examination purposes, Examiner has interpreted “the frontside surface” as --- a frontside surface --- however, this edit may be altered if Applicant intends otherwise.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (U.S. PG Pub No US2014/0264905A1) in view of Chou (U.S. PG Pub No US2019/0035715A1).
Regarding claim 1, Lee teaches a method [see figs. 3a-3m, 0044] for panel scale packaging of a plurality of transformer devices (packaging dies 124 [0044] comprising transformers [0025]), the method [0044] comprising:
providing a substrate member (136 with 138) fig. 3D [0048], the substrate member (136 with 138) comprising a dielectric material (138 may be formed of dielectric material like beryllium oxide or glass) [0048], a first (top) side surface and a second (bottom) side surface;
spatially disposing a plurality of die (multiple 124s) fig. 3e [0049] comprising a plurality of transformer devices (dies may include transformers) [0024] in a predetermined pattern (pattern defined by at least 2 dies) on a portion of the first side surface (top of 136 with 138) to achieve a fill factor of each of the plurality of die of 70 percent and greater (fill-factor of die 124 in space where die is disposed is nearly 100% because die is shown as solid object almost-completely fills area where die is disposed [see fig. 3f, 0050], except for the negligible amount of space (<<30% of volume) occupied by pads 132) overlying the first (top) side surface such that each pair of die (right/left 124) are configured with a predetermined pitch (some non-zero lateral spacing) between the pair of die (right/left 124s);
forming an encapsulating material (140) fig. 3f [0050] overlying a surface region of the plurality of die (124), and filling each of the regions defining the pitch (lateral spacing between 124s) to form an upper surface (top) region of encapsulating material (140) overlying an entirety of the plurality of die (124s) to seal each die (124) bounded by a portion of the encapsulating material (140) and a portion of the substrate member (136 with 138) to cause formation of a panel structure (140-panel hosting 124s) encapsulating each of the plurality of die (124); and
releasing [see fig. 3g, 0051] the substrate member (136 with 138) to free the panel structure (140-panel hosting 124s) including the plurality of die (124);
exposing (upon release/removal of 136, 138 [see fig. 3g, 0051]) a backside (bottom of 140 in fig. 3g) of the panel structure (140-panel hosting 124s) to expose a (bottom in fig. 3g) portion of each of the plurality of die (124); and
forming a plurality of redistribution layers (158s formed in 144, may be formed as RDL layers) fig. 3i [0056] overlying the backside (shown as top of 140 in fig. 3i) of the panel structure (140-panel hosting 124s) and configured to form an interconnection structure (comprising 132 with 158) fig. 3j [0055-0056] between each of the plurality of die (124s) and one or more contact pads (156) fig. 3j [0054] configured from the redistribution layers (158s).
However, Lee does not explicitly disclose the substrate member having a length of at least 500 milli-meters, and being shaped as a trapezoid (rectangular shape shown instead).
Chou teaches a method [0017] of forming die package [0020] comprising the substrate member (102) fig. 1 [0017] (“carrier [0017]) having a length of at least 500 milli-meters (may have 600 mm length) [0017], and being shaped as a trapezoid (may have ‘any polygonal shape’ – encompassing trapezoid [0017]).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the die package formation method of Lee such that the carrier substrate has a length of more than 500 mm [0017] in order to ensure enough size [0017] so that a sufficient number of electronic device die components [0003] may be manufactured and incorporated into the package [0017], as taught by Chou. Moreover, the modification from a rectangular to a trapezoidal carrier substrate is treated as a mere change of shape [0017 Chou] which does not introduce unexpected or apparently-significant differences to the performance characteristics of the carrier substrate. (See MPEP 2144.04, IV, B).
Cheng teaches a method [see title, fig. 1] comprising the substrate member (12) fig. 1 [0044] (“carrier” [0044]) being shaped as a trapezoid [0044] (or a rectangle) [0044].
Regarding claim 2, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. Lee also teaches wherein the one or more contact pads (156) [0054] comprises (hosts formation of) one or more solder balls (166) fig. 3l [0062] (formed atop 156s);
wherein the substrate member (136 with 138) fig. 3f [0048-0051] is a carrier [0048-0051].
Regarding claim 3, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. Lee also teaches wherein the one or more pads (156) [0054] comprises (hosts formation of) an overlying dielectric material (162) fig. 3k [0059] (formed atop 156s).
Regarding claim 4, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. Lee also teaches wherein the encapsulating material (140) fig. 3f [0050] comprises an epoxy material (“cresol novolac epoxy”) [0050].
Regarding claim 5, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. Lee also teaches further comprising separating each of a plurality of packaged components (packaging dies 124 [0044] comprising transformers [0025]) using a saw blade (168) fig. 3l [0062] configured to a spacing (spacing in-between 124s) based upon (proportional to) a package dimension of the die (124).
Regarding claim 7, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. Lee also teaches wherein the spatially disposing (of 124s) [see fig. 3e, 0048] comprises a pick and place operation [0048] to move each die (124) [0049] one by one (individually) from a first location (on 122) fig. 3a [0044] to a location on the first side surface region (top of 136 with 138) fig. 3e [0049].
Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Lee (U.S. PG Pub No US2014/0264905A1) modified by Chou (U.S. PG Pub No US2019/0035715A1), as applied in claim 1 above, and further in view of Liu (U.S. PG Pub No US2019/0103353A1).
Regarding claim 6, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. However, Lee does not explicitly disclose further comprising planarizing the upper surface region (top of 140) fig. 3f [0050] using a polishing process or a grinding process.
Liu teaches a method of packing dies [see figs. 4A-4K, 0043, 0053] further comprising planarizing the upper surface region (top of encapsulant 114) figs. 4F-4G [0050] using a polishing process (CMP) [0053].
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the die package formation method of Lee such that the upper surface of the encapsulant material hosting the dies is polished [0053] in order to improve the planarity of a top surface of the encapsulant [0053], as taught by Liu.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Lee (U.S. PG Pub No US2014/0264905A1) modified by Chou (U.S. PG Pub No US2019/0035715A1), as applied in claim 1 above, and further in view of Tischler (U.S. PG Pub No US2013/0187178A1).
Regarding claim 8, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. However, Lee does not explicitly disclose wherein the plurality of die (124) fig. 3e [0049] comprises at least 10,000 die or at least 100,000 die (total die # of array not disclosed).
Tischler teaches a method of packing dies [see figs. 4A-4E, 0107, 0123] wherein the plurality of die (210) fig. 4E [0123] comprises least 100,000 die (may be over 500,000 dies formed in method [0123]).
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the die package formation method of Lee such that hundreds of thousands of dies [0123] are formed in the dicing and packaging process [0123] in order to enhance the output of dies produced by the method [0123] and their integration density in the finished product [0183], as taught by Tischler.
Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (U.S. PG Pub No US2014/0264905A1) modified by Chou (U.S. PG Pub No US2019/0035715A1), as applied in claim 1 above, and further in view of Costa (U.S. PG Pub No US20230163103A1).
Regarding claim 9, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. Lee also teaches further comprising spatially disposing a plurality of die (150) fig. 3i [0053] onto (supported by) a portion of a frontside surface (shown as top of 124 in fig. 3g).
However, Lee does not explicitly disclose spatially disposing a plurality of die (150) fig. 3i [0053] comprising a low noise amplifier configured on a silicon on insulating substrate onto (supported by) a portion of a frontside surface (shown as top of 124 in fig. 3g) (150 not said to comprise low noise amplifier or silicon on insulating substrate) [0053].
Costa teaches a method [see title, 0043] comprising disposing a plurality of die (18) fig. 1 [0043] (plurality used when implemented in the method of Lee comprising a plurality of dies 124s/150s) comprising a low noise amplifier [0043] configured on a silicon on insulating substrate [0043] (may be SOI and/or LNA die) [0043] onto (supported by) a portion of a frontside surface (shown as top of 16 in fig. 1) (150 not said to comprise low noise amplifier or silicon on insulating substrate) [0053].
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the die package formation method of Lee such that the upper dies are configured with low noise amplifier (LNA) circuitry [0043] in order to control and improve signal output [0043] of the plurality of first dies of Lee.
Regarding claim 10, Lee teaches the method [see figs. 3a-3m, 0044] of claim 1. However, Lee does not explicitly disclose further comprising spatially disposing a plurality of die (150) fig. 3i [0053] comprising a low noise amplifier configured on a silicon on insulating substrate onto a portion of a frontside surface (shown as top of 124 in fig. 3g); and
separating [see fig. 3l, 0062] at least one die (150) comprising the low noise amplifier and at least one die (124) comprising the transformer [0025] to create a separate co-packaged chip device (170) fig. 3m [0063].
However, Lee does not explicitly disclose spatially disposing a plurality of die (150) fig. 3i [0053] comprising a low noise amplifier configured on a silicon on insulating substrate onto a portion of a frontside surface (shown as top of 124 in fig. 3g) (150 not said to comprise low noise amplifier or silicon on insulating substrate) [0053]; and
at least one die (150) comprising the low noise amplifier.
Costa teaches a method [see title, 0043] comprising spatially disposing a plurality of die (18) fig. 1 [0043] (plurality used when implemented in the method of Lee comprising a plurality of dies 124s/150s) comprising a low noise amplifier [0043] configured on a silicon on insulating substrate [0043] (may be SOI and/or LNA die) [0043] onto (supported by) a portion of a frontside surface (shown as top of 16 in fig. 1) (150 not said to comprise low noise amplifier or silicon on insulating substrate) [0053]; and
at least one die (18) comprising the low noise amplifier [0043].
Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the die package formation method of Lee such that the upper dies are configured with low noise amplifier (LNA) circuitry [0043] in order to control and improve signal output [0043] of the plurality of first dies of Lee.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Cheng (U.S. PG Pub No US2022/0302357A1) explicitly teaches a trapezoidal-shaped carrier substrate for a die packaging method. Hsu (U.S. PG Pub No US2017/0229322A1) and Bishop (U.S. PG Pub No US2017/0103927A1) teach other examples of methods for packaging dies with transformers involving use of a temporary substrate/carrier.
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/SEAN AYERS WINTERS/Examiner, Art Unit 2892 03/07/2026
Prosecution Insights