DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
The examiner acknowledges the amendments to claims 1, 8, 14, and 16, and the addition of new claims 19-20. Claims 1-6, 8-10, 14, and 16-20 are pending in the application. Claims 7, 11-13, and 15 are cancelled.
Response to Arguments
Applicant's arguments filed 21 May 2026 have been fully considered but they are not persuasive.
On page 9 of the remarks, applicant argues:
First, Uchibori operates in a different technical field and addresses a different problem than the claimed invention.
Uchibori is titled "Method and System for Controlling Chip Warpage During Bonding" and is directed to controlling warpage of individual semiconductor chips during solder reflow bonding operations. See Uchibori at Abstract, paragraphs [0001]-[0002]. Uchibori's "back layer" is a polymer or polymer epoxy (paragraph [0034]) applied to individual chips to counteract CTE- mismatch-induced warpage during the solder reflow process that bonds chips to a packaging substrate. Uchibori's back layer has a CTE "approximately 10 to 100 times higher than the CTE of the materials used to form chip 112" (paragraph [0034]).
This is a different technical context from the claimed subject matter which relates to a wafer processing tool that integrates a wafer bow measurement system and deposits a compensating film on a wafer in a process chamber. Uchibori does not describe a wafer processing tool, a process chamber for depositing films on wafers, a wafer bow measurement system integrated into a wafer process flow, or a robot transferring a wafer from measurement units to a process chamber within a single tool.
A person of ordinary skill in wafer deposition processing would not look to chip-level packaging techniques for guidance on controlling compensating film thickness in a wafer deposition tool. The problems addressed are different (chip warpage during reflow VS. wafer bow from deposited films), the materials are different (polymer/epoxy VS. deposited thin films), the scales are different (individual chips VS. full wafers), and the system architectures are different (standalone measurement and manual application VS. integrated tool with automated measurement and deposition).
In response to applicant's argument that the Uchibori reference operates in a different technical field and addresses a different problem than the claimed invention, it has been held that a prior art reference must either be in the field of the inventor’s endeavor or, if not, then be reasonably pertinent to the particular problem with which the inventor was concerned, in order to be relied upon as a basis for rejection of the claimed invention. See In re Oetiker, 977 F.2d 1443, 24 USPQ2d 1443 (Fed. Cir. 1992). A reference is considered to be reasonably pertinent to the particular problem with which the inventor is faced if a person of ordinary skill would have consulted it and applied its teachings when faced with the problem that the inventor was trying to solve. See Airbus, 41 F.3d at 1380-82.
In this case, the Uchibori reference is in the field of correcting warpage of semiconductor material. The problem faced by Uchibori is to correct the warpage of a semiconductor chip, the chip of Uchibori having a silicon layer (102 in Fig. 1-3, paragraph 0021) and a silicon dioxide layer (104 in Fig. 1-3, paragraph 0021). Silicon is a material commonly used as semiconductor wafers. A person having ordinary skill in the art, when looking for a way to more efficiently compensate for the bow of a wafer, would have consulted and applied the teachings of the Uchibori reference, which teaches a way of correcting chip warpage by applying a film on the backside of the chip having a thickness that correlates to bow values from different regions of the chip, as a way to solve the problem of correcting wafer warpage. A skilled artisan would not have found it an undue burden to investigate the effect of applying Uchibori’s semiconductor chip warpage compensation technique to compensating the warpage of a semiconductor wafer. Thus, the Uchibori reference is considered analogous to the claimed invention. See MPEP § 2141.01(a).
On pages 9-10 of the remarks, applicant argues:
Second, Cheng's feed-forward control is for clamping force adjustment, not for controlling compensating film thickness.
The Examiner relies on Cheng paragraph [0053] for feed-forward control. However, Cheng's feed-forward control adjusts clamping forces of a multi-zone electrostatic chuck to achieve uniform heat transfer during processing. See Cheng paragraphs [0036]-[0039]. Cheng's controller adjusts voltages applied to chuck electrodes in different zones, not deposition parameters or film thickness. Cheng paragraph [0040] states that the treatment performed in the process chamber includes "deposition, e.g., by CVD, ALD, PVD, annealing, etching, degassing, pre-cleaning, cleaning, post- cleaning, etc." but the feed-forward control relates to how the wafer is clamped during these treatments, not to what is deposited or how thick a compensating film should be.
Cheng does not teach or suggest using measured warpage values to control the thickness of a compensating film deposited on a second surface of the wafer. The Examiner's assertion that "it would have been obvious.. to have the thickness of the second film being based on the wafer bow values" (Office Action, paragraph 26) relies on Uchibori for this teaching, but as discussed above, Uchibori operates in a different technical field and does not provide motivation to modify Cheng's clamping-force-focused system into a compensating-film-thickness-control system.
In response, the examiner points to paragraphs 24-26 of the non-final office action mailed 01 April 2026. The examiner recites that, while Cheng teaches using the wafer bow values to adjust a treatment of the wafer, the treatment being a film deposition (see Cheng paragraphs 0039-0040 and 0053), Cheng does not teach using the warpage values to control the thickness of the compensating film deposited on the second surface. The examiner relies on the Uchibori reference to teach this limitation. As outlined above, the Uchibori reference is considered to be analogous art as it is reasonably pertinent to the particular problem with which the inventor of the instant application was concerned. The Uchibori reference also teaches the measurement of warpage values for the semiconductor chip and uses the warpage value to control the thickness of the compensating film to be deposited on the backside of the semiconductor chip. Thus, both Cheng and Uchibori teach gathering warpage values of a semiconductor material and using the warpage values to control the treatment of the material.
Since the Cheng reference does not teach any control over the thickness of the compensating film deposited on the wafer, it would have been obvious for a skilled artisan to apply the technique of the Uchibori reference which involves depositing a compensating film on semiconductor material with a certain thickness that is based on the wafer bow values. A skilled artisan would have recognized this modification as an improvement to the wafer processing tool of Cheng as it leads to a more efficient way to compensate for wafer warpages. Cheng teaches that, after the treatment is performed, the treated wafer is remeasured, and the clamping forces are adjusted and used for clamping a subsequent wafer in a subsequent run of the treatment (Fig. 6 of Cheng). Since the technique of Uchibori enhances the warpage compensation of the wafer of Cheng, subsequent wafers will receive treatment at a higher quality.
On pages 10-11 of the remarks, applicant argues:
Third, the amended claims recite structural features not taught by the combination.
Claims 1 and 14 now recite "wherein the one or more measurement units are integrated into the wafer processing tool, and the robot transfers the wafer from the one or more measurement units directly to the deposition module within the wafer processing tool."
Neither Cheng nor Uchibori teaches this structural arrangement.
In Cheng, the metrology chambers (150, 450) are separate chambers positioned around a central transfer chamber alongside the process chambers (120, 420). See Cheng FIG. 1 and FIG. 4. The metrology chambers are peer chambers to the process chambers, all connected to the same transfer chamber. While the robot (130) can transfer wafers among these chambers, the metrology chambers are not "measurement units integrated into the wafer processing tool" as claimed. Instead, they are separate enclosed chambers with their own environments.
Uchibori has no integrated wafer processing tool at all. Uchibori's warpage measurement is performed by standalone methods such as "shadow moire or laser reflection" (paragraph [0022]) or by "mechanical simulation, e.g., finite element analysis (FEA)" (paragraph [0022]). The back layer is then created through "depositing, masking, etching, and/or other appropriate process" (paragraph [0044]). There is no robot transferring a wafer from measurement units to a process chamber within a single tool.
The combination of Cheng and Uchibori thus fails to teach or suggest the claimed structural arrangement where measurement units are integrated into the wafer processing tool and a robot transfers the wafer from the measurement units directly to the process chamber within the same tool.
In response, the examiner argues that the Cheng reference does teach the one or more measurement units are integrated into the wafer processing tool, and that the robot transfers the wafer from the one or more measurement units directly to a deposition module within the wafer processing tool. The wafer processing tool of the claimed invention generally refers to a deposition module for processing a wafer, a wafer bow measurement system, and the robot. In reference to the drawings, the examiner has interpreted the claimed wafer processing tool of the instant application as being shown in Figures 6-8, the wafer processing tool being the combination of measurement module 500 and deposition module 600. The examiner has interpreted the claimed wafer processing tool as being taught by Cheng’s “wafer processing system” shown as reference signs 100 and 400 in Figures 1 and 4, respectively. Figure 1 of Cheng shows the measurement units (metrology chambers 150) and deposition modules (processing chambers 120) integrated into wafer processing system 100. Cheng does not teach or suggest that the metrology chambers 150 are separate or standalone units. In fact, Cheng teaches that in some embodiments the metrology chambers 150 are integrated into one or more of the processing chambers 120. Thus, it is the examiner’s position that the one or more measurement units of Cheng are integrated into the wafer processing tool of Cheng, and are not separate/standalone modules as applicant argues.
Additionally, Cheng does teach the robot transfers the wafer from the measurement units directly to the process chamber within the same tool. As outlined above, Cheng teaches the metrology units are integrated into the wafer processing system (and/or the processing chambers in some embodiments). Figure 4 of Cheng shows a block diagram representing the flow of a wafer (260) from a metrology chamber (450) directly to a process chamber (420), the process chamber depositing a film (469) onto the wafer. Thus, Cheng teaches the robot transferring the wafer directly from a measurement unit to a deposition module.
Finally, on page 11 of the remarks, applicant argues:
Fourth, the proposed combination requires impermissible hindsight.
The Examiner's combination requires extracting the warpage compensation concept from Uchibori (chip packaging context using polymer back layers), the metrology and processing system architecture from Cheng (clamping force control context), and combining them in a manner not suggested by either reference to arrive at the claimed integrated wafer processing tool with measurement-based feed-forward control of compensating film thickness. Neither Cheng nor Uchibori suggests modifying their respective systems in the manner proposed. This reconstruction appears guided by Applicant's own disclosure rather than the teachings of the prior art.
In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971). In this case, controlling the thickness of a film deposited on a wafer to compensate for warpage was knowledge which was within the level of ordinary skill at the time the claimed invention was made. The Uchibori reference is not the only piece of prior art that uses a measured wafer bow to control the thickness of a film deposited on a wafer to compensate for bow (see e.g. Bellotti et al. (US 2018/0082960 A1)).
Since the Cheng reference does not specifically recite controlling the thickness of the compensating film, does not teach away from varying the thicknesses of films deposited on wafers for bow compensation, and the concept of controlling the thickness of compensating films based on wafer bow values is known to the art, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the Cheng reference to include the warpage compensation concept of Uchibori.
Therefore, for the reasons outlined above, claims 1 and 14 remain rejected under 35 U.S.C. § 103 over the Cheng reference in view of the Uchibori reference. Since it is the examiner’s position is that the applicant’s arguments are not persuasive for the independent claims, the rejection of the dependent claims is sustained in the absence of persuasive arguments to the contrary.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-6, 8-10, and 16-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, line 20 recites the limitation “the process module”. There is insufficient antecedent basis for this limitation in the claim. The claim does not previously recite ‘a process module’. While claim 1 does recite “the wafer bow measurement system further including a module”, it is unclear if the process module is intended to refer to the module of the wafer bow measurement system, or if the process module is intended to be a separate module. Therefore, claim 1 is indefinite and is rejected under 35 U.S.C. § 112(b). Claims 2-6, 8-10, and 16-20 depend on claim 1 and are therefore also rejected to under 35 U.S.C. § 112(b). The examiner assumes “the process module” recited on line 20 of claim 1 is supposed to refer the module of the wafer bow measurement system. If this is applicant’s intent, please amend accordingly.
Regarding claim 10, lines 3-4 recite the limitation “the process module”. There is insufficient antecedent basis for this limitation in the claim. Similar to claim 1, claim 10 does not previously recite ‘a process module’. Since claim 10 depends on claim 1, it is similarly unclear if the process module is intended to refer to the module of the wafer bow measurement system recited in claim 1, or if the process module is intended to be a separate module. Therefore, claim 10 is indefinite and is rejected under 35 U.S.C. § 112(b). The examiner assumes “the process module” recited on lines 3-4 of claim 10 is supposed to refer the module of the wafer bow measurement system. If this is applicant’s intent, please amend accordingly.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-2, 6, 10, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng et al. (US 2014/0202383 A1, of record), hereinafter Cheng, in view of Uchibori et al. (US 2014/0145324 A1, of record), hereinafter Uchibori.
Regarding claim 1, Cheng teaches a wafer processing tool (Fig. 1 and 4 wafer processing system 100 and 400, respectively) comprising:
a deposition module (Fig. 1 and 4 process chambers 120 and 420, respectively; the process modules performing depositions and are thus deposition modules, see paragraphs 0015-0016 and 0040) for processing a wafer (Fig. 4 wafer 260) in a wafer process flow (Fig. 4, paragraphs 0015-0016 and 0031-0032), the wafer process flow including a wafer bow measurement and a treatment of a surface of the wafer (Fig. 4, paragraphs 0031-0032, 0046-0054);
a wafer bow measurement system (Fig. 1 element 150 and Fig. 4 element 450 are metrology chambers) integrated into the wafer process flow to measure a bow of the wafer (see Fig. 4, paragraphs 0046-0047), the wafer bow measurement system including one or more measurement units (Fig. 4 metrology chamber 450) to perform the wafer bow measurement on the wafer (paragraph 0047) and generate wafer bow values of the wafer (paragraphs 0047 and 0049-0050) based on a plurality of distances from the one or more measurement units to a plurality of locations on a surface of the wafer (paragraph 0047 “a laser is scanned on the front side 268 of the wafer 260 to measure the height of the front side 268 at a plurality of points or zones”, measuring heights in the manner disclosed by Cheng is analogous to determining the distances from the measurement unit housing the laser to the various locations on the wafer);
the wafer bow measurement system further including a module (Fig. 1 and 4 controller 140 and 440, respectively; paragraph 0063 “The controller is coupled to the metrology chamber”) to control or adjust a parameters of the treatment of the surface of the wafer based at least on the generated wafer bow values of the wafer (paragraph 0053); and
a robot (Fig. 1 robot 130) to transfer the wafer from the wafer bow measurement system to the deposition module (paragraph 0015);
wherein the wafer comprises a first film deposited on a first surface (Fig. 4 layers 465-467 deposited on first surface of wafer 260, paragraphs 0024 and 0048), and the deposition module deposits a second film on a second surface of the wafer (paragraphs 0040-0041, 0043, 0054; see also Fig. 4 layer 469 deposited on second surface of wafer 260), wherein the wafer bow measurement system measures the bow of the wafer prior to the wafer entering the deposition module (paragraph 0016 “metrology chambers 150 are configured to measure various properties of wafers before, during or after processing”, see also paragraphs 0047 describing measurement of warpage occurs in a pre-treatment chamber, i.e. before entering a process chamber), and feeds the generated wafer bow values forward to the module (paragraph 0053) to control the treatment of the wafer (paragraphs 0040 and 0054), the treatment including the second film being deposited by the deposition module (paragraphs 0040-0043 and 0054),
wherein the one or more measurement units are integrated into the wafer processing tool (see Fig. 1 wafer processing system 100 having metrology modules 150 integrated into it; further see paragraphs 0015-0016; Cheng does not recite the metrology modules 150 are separate or standalone modules that exist detached from the wafer processing system 100), and the robot transfers the wafer from the one or more measurement units directly to the deposition module within the wafer processing tool (see Fig. 4 in which wafer 260 is shown to be transferred from metrology chamber 450 directly to processing chamber 420 that performs the deposition of layer 469).
Cheng does not teach a thickness of the second film being based on the wafer bow values of the wafer, so as to compensate for warpage caused by the first film, and the wafer bow measurement system feeds the generated wafer bow values forward to control a thickness of the second film deposited by the deposition module.
Uchibori, which relates to measuring and controlling wafer warpage and is thus from the same field of endeavor as Cheng, teaches a wafer comprising a first film deposited on a first surface (Uchibori: Fig. 3 silicon layer 102, on-chip devices 104 which is described as being a silicon-dioxide layer, see paragraph 0021). Uchibori further teaches the deposition of a second film on a second surface of the wafer (Uchibori: Fig. 3 back layer 302), a thickness of the second film being based on the wafer bow values of the wafer (Uchibori: Fig. 3, paragraphs 0033-0035), so as to compensate for warpage caused by the first film (Uchibori: paragraphs 0004, 0019, 0033). Additionally, Uchibori teaches a wafer warpage measurement system (Uchibori: paragraphs 0040 which recites the measurement of the warpage being performed by laser reflection, implying the use of some sort of optical measurement system to measure warpage) that feeds the generated wafer bow values forward to control a thickness of the second film deposited by the deposition module (Uchibori: paragraphs 0040-0044 describing the measured warpage values being used to control the thickness of the back layer; see also paragraphs 0023-0033; the use of some sort of deposition module to deposit the back layer is implicit).
Therefore, since Cheng teaches the use of wafer bow values to adjust the treatment of a wafer including the deposition of a second film on a second surface of the layer, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the wafer processing tool of Cheng to have the thickness of the second film being based on the wafer bow values of the wafer, so as to compensate for warpage caused by the first film, and have the wafer bow measurement system feed the generated wafer bow values forward to control a thickness of the second film deposited by the deposition module, as taught by Uchibori, for the benefit of controlling and/or reducing the warpage of a semiconductor wafer in an efficient manner (see Uchibori paragraphs 0002, 0033, and 0037).
Regarding claim 2, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 1, as outlined above, but does not teach the one or more measurement units comprises: at least one optical sensor to perform a 1-dimensional (1-D) wafer scan or a 2-dimensional (2-D) wafer scan on the wafer.
However, Cheng teaches a metrology chamber that is configured to determine the warpage of a wafer through laser scanning the surface of the wafer to measure heights from different zones of the wafer (see Cheng paragraph 0047). In order to determine the heights of the different zones of the wafer, the reflection of the scanning laser must be collected by a reception unit. Optical sensors are well known in the art to be the most effective means to collect laser signals for analysis. Therefore, since the metrology chamber of Cheng performs scanning across the surface of the wafer, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to expect that the metrology chamber of Cheng (as modified by Uchibori) comprises at least one optical sensor to perform a 1-dimensional (1-D) wafer scan or a 2-dimensional (2-D) wafer scan on the wafer, for the benefit of generating highly accurate and precise measurements of the heights along the wafer surface.
Regarding claim 6, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 1, as outlined above, and further teaches the second film is deposited on a front side of the wafer (Cheng: paragraph 0041).
Cheng (as modified by Uchibori) does not teach the second film is deposited on a back side of the wafer. However, Uchibori teaches the deposition of a second film on the back side of a wafer (Uchibori: paragraphs 0033-0035 and 0044, Fig. 3). The back layer 302 of Uchibori deposited on the “back side” of a wafer correlates to the layer 469 of Cheng which is recited to be deposited on the “front side” of the wafer. Furthermore, the first layer(s) 465-467 of Cheng correlates to the first layer 104 of Uchibori as both layers are recited to be dielectric materials (see Cheng paragraph 0048 and Uchibori paragraph 0021 (silicon dioxide being the dielectric material)). Thus, whatever surface of the wafer being processed is considered as the “front side” of the wafer and whatever surface is considered as the “back side” of the wafer is irrelevant, so long as the second film is deposited on the opposite surface from the first film comprising a dielectric material that already resides on the wafer.
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to have the second film of Cheng (as modified by Uchibori) be deposited on a back side of the wafer, as taught by Uchibori, as depositing the second film on the opposite side of a deposited first film enables warpage correction of a wafer without compromising the dielectric materials of the first film.
Regarding claim 10, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 1, as outlined above, and further teaches the treatment of the surface of the wafer affects the bow of the wafer (Uchibori: paragraphs 0033 and 0037 reciting that the treatment of the wafer with the back-layer affects warpage (bow)).
Cheng (as modified by Uchibori) does not teach the wafer bow measurement system feeds second wafer bow values based on a second wafer bow measurement back to the module to control or adjust a parameter of a second treatment of the surface of the wafer.
However, Uchibori teaches a wafer bow measurement system feeds second wafer bow values based on a second wafer bow measurement back to the process module to control or adjust a parameter of a second treatment of the surface of the wafer (see Uchibori Fig. 4-6, paragraphs 0036 and 0044; after the deposition of a back layer of a given thickness(es) onto the wafer, Uchibori teaches remeasuring the warpage values of the semiconductor chip to determine the effectiveness of the treatment, and, if the first treatment was not sufficient, the process returns to forming another layer onto the back layer based on the new warpage values).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the wafer processing tool of Cheng (as modified by Uchibori) to have the wafer bow measurement system feed second wafer bow values based on a second wafer bow measurement back to the module to control or adjust a parameter of a second treatment of the surface of the wafer, as taught by Uchibori, for the benefit of ensuring the second film is formed with a desired thickness sufficient to minimize warpage of the wafer.
Regarding claim 14, Cheng teaches a wafer processing tool (Fig. 1 and 4 wafer processing system 100 and 400, respectively) comprising:
a deposition module (Fig. 1 and 4 process chambers 120 and 420, respectively; the process modules performing depositions and are thus deposition modules, see paragraphs 0015-0016 and 0040) for processing a wafer (Fig. 4 wafer 260) in a wafer process flow (Fig. 4, paragraphs 0015-0016 and 0031-0032), the wafer process flow including a wafer bow measurement and a treatment of a surface of the wafer (Fig. 4, paragraphs 0031-0032, 0046-0054);
a wafer bow measurement system (Fig. 1 element 150 and Fig. 4 element 450 are metrology chambers) integrated into the wafer process flow to measure a bow of the wafer (see Fig. 4, paragraphs 0046-0047), the wafer bow measurement system including one or more measurement units (Fig. 4 metrology chamber 450) to perform the wafer bow measurement on the wafer (paragraph 0047) and generate wafer bow values of the wafer (paragraphs 0047 and 0049-0050), the wafer bow measurement system feeding the generated wafer bow values forward to a process module (paragraph 0053, see also Fig. 6);
the process module (Fig. 1 and 4 controller 140 and 440, respectively) to control or adjust parameters of the treatment of the surface of the wafer based at least on the generated wafer bow values of the wafer (paragraph 0053); and
a robot (Fig. 1 robot 130) to transfer the wafer from the wafer bow measurement system to the deposition module (paragraph 0015);
wherein the wafer comprises a first film deposited on a first surface (Fig. 4 layers 465-467 deposited on first surface of wafer 260, paragraphs 0024 and 0048), and the deposition module deposits a second film on a second surface of the wafer (paragraphs 0040-0041, 0043, 0054; see also Fig. 4 layer 469 deposited on second surface of wafer 260);
wherein the one or more measurement units are integrated into the wafer processing tool (see Fig. 1 wafer processing system 100 having metrology modules 150 integrated into it; further see paragraphs 0015-0016; Cheng does not recite the metrology modules 150 are separate or standalone modules that exist detached from the wafer processing system 100), and the robot transfers the wafer from the one or more measurement units directly to the deposition module within the wafer processing tool (see Fig. 4 in which wafer 260 is shown to be transferred from metrology chamber 450 directly to processing chamber 420 that performs the deposition of layer 469).
Cheng does not teach a thickness of the second film being based on the wafer bow values of the wafer, so as to compensate for warpage caused by the first film.
Uchibori, which relates to measuring and controlling wafer warpage and is thus from the same field of endeavor as Cheng, teaches a wafer comprising a first film deposited on a first surface (Uchibori: Fig. 3 silicon layer 102, on-chip devices 104 which is described as being a silicon-dioxide layer, see paragraph 0021). Uchibori teaches the deposition of a second film on a second surface of the wafer (Uchibori: Fig. 3 back layer 302), a thickness of the second film being based on the wafer bow values of the wafer (Uchibori: Fig. 3, paragraphs 0033-0035), so as to compensate for warpage caused by the first film (Uchibori: paragraphs 0004, 0019, 0033).
Therefore, since Cheng teaches the use of wafer bow values to adjust the treatment of a wafer including the deposition of a second film on a second surface of the layer, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the wafer processing tool of Cheng to have the thickness of the second film being based on the wafer bow values of the wafer, so as to compensate for warpage caused by the first film, as taught by Uchibori, for the benefit of controlling and/or reducing the warpage of a semiconductor wafer in an efficient manner (see Uchibori paragraphs 0002, 0033, and 0037).
Yet remaining, Cheng, as modified by Uchibori, teaches the second film is deposited on a front side of the wafer (Cheng: paragraph 0041), but does not teach the second film is deposited on a back side of the wafer. However, Uchibori teaches the deposition of a second film on the back side of a wafer (Uchibori: paragraphs 0033-0035 and 0044, Fig. 3). The back layer 302 of Uchibori deposited on the “back side” of a wafer correlates to the layer 469 of Cheng which is recited to be deposited on the “front side” of the wafer. Furthermore, the first layer(s) 465-467 of Cheng correlates to the first layer 104 of Uchibori as both layers are recited to be dielectric materials (see Cheng paragraph 0048 and Uchibori paragraph 0021 (silicon dioxide being the dielectric material)). Thus, whatever surface of the wafer being processed is considered as the “front side” of the wafer and whatever surface is considered as the “back side” of the wafer is irrelevant, so long as the second film is deposited on the opposite surface from the first film having a dielectric material that already resides on the wafer.
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to have the second film of Cheng (as modified by Uchibori) be deposited on a back side of the wafer, as taught by Uchibori, as depositing the second film on the opposite side of a deposited first film enables warpage correction of a wafer without compromising the dielectric materials of the first film.
Yet remaining, Cheng, as modified by Uchibori, does not teach the wafer bow measurement system performs a second wafer bow measurement after the deposition module deposits the second film on the wafer, generates updated wafer bow values of the wafer, and feeds the updated wafer bow values of the wafer forward to the process module to adjust the parameters of the treatment of the surface of the wafer, the wafer being rerouted back to the deposition module by the robot for an additional film deposition with the adjusted parameters of the treatment.
However, Uchibori teaches performing a second wafer bow measurement after deposition the second film on the wafer (Uchibori: Fig. 6, paragraph 0044; after the deposition of the back layer in step 616, the warpage of the wafer is remeasured in steps 606-608), generating updated wafer bow values of the wafer (Uchibori: Fig. 6 steps 606-608, paragraphs 0040-0041; see also paragraphs 0022-0032), and feeding the updated wafer bow values of the wafer forward to adjust the parameters of the treatment of the surface of the wafer (Uchibori: Fig. 6 steps 610-614, paragraphs 0042-0043), and rerouting the wafer for an additional film deposition with the adjusted parameters of the wafer (Uchibori: Fig. 6 steps 614-616, paragraphs 0043-0044; see also paragraph 0036).
The wafer processing tool of Cheng uses a metrology tool to perform wafer bow measurements, deposition modules to deposit films and treat the wafer, and a robot to transfer the wafer throughout the wafer processing tool (see Cheng Fig. 1 and 4). Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the wafer processing tool of Cheng (as modified by Uchibori) to have the wafer bow measurement system perform a second wafer bow measurement after the deposition module deposits the second film on the wafer, generates updated wafer bow values of the wafer, and feeds the updated wafer bow values of the wafer forward to the process module to adjust the parameters of the treatment of the surface of the wafer, the wafer being rerouted back to the deposition module by the robot for an additional film deposition with the adjusted parameters of the treatment, as taught by Uchibori, for the benefit of ensuring the second film is formed with a desired thickness sufficient to minimize warpage of the wafer.
Claims 3 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng in view of Uchibori as applied to claims 1-2 above, and further in view of Bobrov (US Patent No. 9,689,804, of record).
Regarding claim 3, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 2, as outlined above, but does not teach the one or more measurement units further comprises: a linear stage actuator to impart linear direction of movement to the at least one optical sensor.
Bobrov, which relates to wafer warpage measurement units, teaches one or more measurement units (Bobrov: Fig. 1A-B inspection sub-systems 102a-e) that comprise a linear stage actuator (Bobrov: Fig. 1B actuation assembly 108, col. 3 line 64-col. 4 line 14, ) to impart linear direction of movement to at least one optical sensor (Bobrov: Fig. 1F, col. 4 lines 9-14, col. 6 lines 21-38, col. 7 lines 6-35; see also Fig. 1B which shows optical assembly 104 comprising optical sensor 118 and laser 116).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the one or more measurement units of Cheng (as modified by Uchibori) to comprise a linear stage actuator to impart linear direction of movement to the at least one optical sensor, as taught by Bobrov, for the benefit of adjusting the focus of the one or more measurement units to improve the precision of wafer bow measurements (Bobrov: col. 2 line 57-col. 3 line 14).
Regarding claim 19, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 1, as outlined above, but does not teach the one or more measurement units comprise a plurality of non-contact distance sensors configured to measure distances from the plurality of non-contact distance sensors to the plurality of locations on the surface of the wafer, and wherein the wafer bow values are generated based on deviations among the measured distances.
Bobrov teaches a plurality of non-contact distance sensors (Bobrov: Fig. 1A inspection sub-systems 102a-e, col. 3 lines 46-63) configured to measure distances from the plurality of non-contact distance sensors to the plurality of locations on the surface of the wafer (Bobrov: col. 3 lines 46-63), and wherein the wafer bow values are generated based on deviations among the measured distances (Bobrov: col. 3 lines 19-63).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the one or more measurement units of Cheng (as modified by Uchibori) to comprise a plurality of non-contact distance sensors configured to measure distances from the plurality of non-contact distance sensors to the plurality of locations on the surface of the wafer, and wherein the wafer bow values are generated based on deviations among the measured distances, as taught by Bobrov, for the benefit of enhancing wafer inspection throughput (Bobrov: col. 1 lines 40-42, col. 3 lines 12-14).
Claims 4-5 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng in view of Uchibori as applied to claims 1-2 above, and further in view of Bailey (US 2012/0283865 A1, of record).
Regarding claim 4, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 2, as outlined above, but does not teach the one or more measurement units further comprises: a wafer support assembly to impart rotational movement to the wafer supported in the one or more measurement units.
Bailey, which relates to measuring wafer bow, teaches one or more measurement units (Bailey: Fig. 5A-B metrology arrangements 500 and 550) that comprise a wafer support assembly to impart rotational movement to the wafer supported in the one or more measurement units (Bailey: paragraphs 0061-0062).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the one or more measurement units of Cheng (as modified by Uchibori) to comprise a wafer support assembly to impart rotational movement to the wafer supported in the one or more measurement units, as taught by Bailey, for the purposes of generating a plurality of measurements across the wafer which beneficially provide a better understanding of the warpage profile of the wafer (Bailey paragraph 0062).
Regarding claim 5, Cheng, as modified by Uchibori and Cheng, teaches the wafer processing tool of claim 4, as outlined above, and further teaches the wafer support assembly facilitates the at least one optical sensor to perform a 2-D concentric wafer scan (Bailey: paragraph 0061-0062).
Regarding claim 8, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 1, as outlined above, but does not teach one or more pod loaders to support the wafer, the wafer bow measurement being performed at the one or more pod loaders before the wafer is introduced into the deposition module.
Bailey, which relates to wafer processing tools, teaches one or more pod loaders to support the wafer (Bailey: Fig. 2 pods 202, 204; paragraphs 0037, 0045-0046; the examiner interprets the term “pod loader” as referring to the area in which a pod is housed and the components used to transfer and load pods into various modules; since Bailey teaches the use of pods (FOUPs) and paragraph 0046 recites the use of a robotic arm in the atmospheric transfer module 206 to collect and load wafers from the pods into various other modules, Bailey teaches “one or more pod loaders”), the wafer bow measurement being performed at the one or more pod loaders before the wafer is introduced into the deposition module (see Bailey Fig. 2, paragraphs 0037, 0045, 0049, 0054).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the wafer processing tool of Cheng (as modified by Uchibori) to comprise one or more pod loaders to support the wafer, the wafer bow measurement being performed at the one or more pod loaders before the wafer is introduced into the deposition module, as taught by Bailey, for the purpose of determining the quality of the wafer prior to processing, beneficially saving time and resources (Bailey paragraphs 0047-0050).
Regarding claim 9, Cheng, as modified by Uchibori and Bailey, teaches the wafer processing tool of claim 8, as outlined above, and further teaches the wafer bow measurement system is mounted at a location above the one or more pod loaders (see Bailey Fig. 5A showing wafer bow measurement systems 506 located above wafer 502, the wafer being supported by the “pod loader” of Bailey, as described in paragraphs 0037 and 0045-0046, at location 230).
Claims 16 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Cheng in view of Uchibori as applied to claims 1 above, and further in view of Cox et al. (US 2007/0196011 A1, of record), hereinafter Cox.
Regarding claim 16, Cheng, as modified by Uchibori, teaches the wafer processing tool of claim 1, as outlined above, but does not teach the wafer bow measurement system comprises one or more measurement units positioned above a load port configured to support the wafer, the wafer bow measurement being performed while the wafer is supported on the load port before the wafer is introduced into the deposition module.
Cox, which relates to metrology systems that measure wafer bow, teaches a wafer bow measurement system (Cox: Fig. 18 support chamber assembly 801) comprises one or more measurement units (Cox: Fig. 18 measurement assembly 811) positioned above a load port (Cox: Fig. 18 load lock chamber 106) configured to support the wafer (see Cox Fig. 18; see also paragraphs 0052, 0059, 0066, 0069, 0118), the wafer bow measurement being performed while the wafer is supported on the load port before the wafer is introduced into the deposition module (see Cox Fig. 2, 10, and 18; see also paragraphs 0052, 0059, 0066, 0069, 0118).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the wafer bow measurement system of Cheng (as modified by Uchibori) to have one or more measurement units positioned above a load port configured to support the wafer, the wafer bow measurement being performed while the wafer is supported on the load port before the wafer is introduced into the deposition module, as taught by Cox, for the purposes of combining the load lock chamber and the metrology chambers of Cheng (as modified by Uchibori) into a single chamber, beneficially making the wafer processing tool more compact.
Regarding claim 18, Cheng, as modified by Uchibori and Cox, teaches the wafer processing tool of claim 16, as outlined above, and further teaches the one or more measurement units are mounted on a lower surface of an upper structure of the wafer processing tool (see Cox Fig. 18 showing measurement assembly 811 mounted on the lower surface of the interior surface 1870 of top 1814), positioned above the wafer when the wafer is supported on the load port (see Cox Fig. 18 substrate W supported in load port 106).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Cheng in view of Uchibori and Cox as applied to claims 1 and 16 above, and further in view of Ozawa (JP 2012216752 A, of record).
Regarding claim 17, Cheng, as modified by Uchibori and Cox, teaches the wafer processing tool of claim 16, as outlined above, but does not teach the load port comprises a rotational support plate configured to rotate the wafer during the wafer bow measurement.
Ozawa, which relates to load lock modules that measure wafer bow, teaches a load port (Ozawa: Fig. 1 load lock module 1 and gate valves 17a-b, see also Fig. 10) comprising a rotational support plate (Ozawa: Fig. 10 turntable 30 with rotating shaft 31) configured to rotate the wafer during the wafer bow measurement (see Ozawa paragraphs 0098-0101, 0105, 0107, 0109).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the instant application to modify the load port of Cheng (as modified by Uchibori and Cox) to have a rotational support plate configured to rotate the wafer during the wafer bow measurement, as taught by Ozawa, for the benefit of generating a more complete scan of the surface warpage of the wafer in different locations.
Allowable Subject Matter
Claim 20 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 20, the prior art of record, taken alone or in combination, neither anticipates nor renders obvious the wafer processing tool of claim 17, wherein the one or more measurement units comprise a sensor body extending in a radial direction from approximately a center of the wafer to beyond a radius of the wafer, and wherein the rotational support plate rotates the wafer while the sensor body measures distances to the surface of the wafer to generate the wafer bow values (emphasis added via bolded words, extra emphasis added via underlined words).
Cheng, as modified by Uchibori, Cox, and Ozawa, teaches the wafer processing tool of claim 17, as outlined above, but does not teach wherein the one or more measurement units comprise a sensor body extending in a radial direction from approximately a center of the wafer to beyond a radius of the wafer, and wherein the rotational support plate rotates the wafer while the sensor body measures distances to the surface of the wafer to generate the wafer bow values.
Cheng and Uchibori are silent as to the positioning of the sensor body used to measure the bow of the wafer under test.
Cox teaches the sensor body used for wafer measurements being positioned above the wafer (see Cox Fig. 7).
Ozawa teaches multiple sensor bodies positioned under the wafer under test, none of which extend in a radial direction from approximately a center of the wafer to beyond a radius of the wafer (see Ozawa Fig. 2 light receiving portions 11b).
Bailey (US 2012/0283865 A1, of record) teaches measuring units disposed above and/or below the wafer under test (see Bailey Fig. 3-8, paragraph 0043).
Bobrov (US Patent No. 9,689,804, of record) teaches all the measuring units being disposed below the wafer (see Bobrov Fig. 1A).
Yamamoto (JP 2004119673 A) teaches a method and device for measuring the warpage of a wafer by determining the degree of warpage of a wafer mounted on a rotating support plate through emitting light from a light projector to an inline light receiver, and determining the warpage based on the amount of light collected by the receiver (see Yamamoto Fig. 1-3, paragraphs 0010-0018). The receiver and projector bodies of Yamamoto extend in a radial direction beyond the radius of the wafer (see Yamamoto Fig. 1-3). However, the measurement configuration of Yamamoto does not measure the distance from the sensor body to the surface of the wafer (see Yamamoto paragraph 0013). Therefore, Yamamoto does not teach the rotational support plate rotates the wafer while the sensor body measures distances to the surface of the wafer to generate the wafer bow values. Yamamoto relates to a completely different mode of measurement for wafer warpage, one of which that would be incompatible with the measurement modality of Cheng (as modified by Uchibori, Cox, and Ozawa). Thus, it would not have been obvious for a person having ordinary skill in the art to modify the wafer processing tool of Cheng (as modified by Uchibori, Cox, and Ozawa) to have the one or more measurement units comprise a sensor body extending in a radial direction from approximately a center of the wafer to beyond a radius of the wafer in the manner taught by Yamamoto.
Additionally, the remaining references cited on applicant’s information disclosure statement and previously made of record by the examiner, that are not specifically mentioned above, have been reconsidered by the examiner. None of these references teach the bolded and/or underlined limitations outlined above, in combination with the remaining limitations from the claim.
Therefore, for the reasons outlined above, claim 20 is indicated as having allowable subject matter.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/NOAH J. HANEY/Examiner, Art Unit 2877
/MICHELLE M IACOLETTI/Supervisory Patent Examiner, Art Unit 2877
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