DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 5-8 and 13, 19 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US 2021/0151505 A1) in view of Park et al. (KR 2019/0065980 A).
Regarding Claim 1, Han discloses (Fig. 12, 13) a memory device, comprising:
a substrate (110);
a plurality of first conductive lines (WLA) on the substrate (110) and extending in a first direction (X, Fig. 12);
a plurality of second conductive lines (BL) on the plurality of first conductive lines (BL) and extending in a second direction (Y) crossing the first direction (X); and
a plurality of first memory cells (140, 130) respectively arranged between the plurality of first conductive lines (WLA) and the plurality of second conductive lines (BL),
wherein:
each first memory cell of the plurality of first memory cells includes a switching device (134) and a variable resistance material pattern (144), and the switching device (134) includes a material having a composition (134) [0065-0066] of La.sub.xNi.sub.1-xO.sub.y, in which 0.13≤x≤0.30 and 0.9≤y≤1.5.
Han does not explicitly disclose that a composition of La.sub.xNi.sub.1-xO.sub.y, in which 0.13≤x≤0.30 and 0.9≤y≤1.5
Park discloses the switching device (resistive switching material layer) includes a material having a composition of La.sub.xNi.sub.1-xO.sub.y ( LaNiO.sub.3-x).
Park further discloses controlling and adjusting band gap of the material in order to be applicable to a memory (“the adjustment of the resistance value can be performed by adjusting the bandgap of the resistance change material layer RE”) and (“aTiO .sub.3, LaNiO .sub.3, LaCuO .sub.3 is used as a Mott insulator of the present invention, each ~ 0.2 eV or less, - And has a band gap of 0.02-0.29 eV or less, and a band gap of ~0.14-0.28 eV or less, preferably 0.01 eV to 0.5 eV, so that the band gap can be easily controlled and applicable to a memory.”) and further discloses that resistive properties of the material depend of oxygen concertation thein “ the transition metal oxide such as LaTiO .sub.3 , LaNiO .sub.3 , and LaCuO .sub.3 has a characteristic that the resistance value changes according to the oxygen concentration therein, and the voltage of the oxygen ion to the electrode according to the application of the electric field By adjusting the oxygen concentration according to the reversible movement according to the direction, it is possible to control the resistance change and apply it to the Mott transfer.”.
Han in view of Park does not explicitly disclose specific ration of the a material having a composition in which 0.13≤x≤0.30 and 0.9≤y≤1.5.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjusting bandgap, resistive properties and oxygen concentration of a memory device in Han in view of Park such that a composition is 0.13≤x≤0.30 and 0.9≤y≤1.5 in order to adjustment of the resistance value of the material and control the resistance change and apply it to the Mott applicable to a memory (Han).
Regarding Claim 5, Han in view of Park discloses the memory device as claimed in claim 1, wherein
the material of the switching device has a Mott transition characteristic. (“the metal insulator transition of the resistance change material layer RE includes a mott transition”) Park
Regarding Claim 6, Han in view of Park discloses the memory device as claimed in claim 1, wherein:
the variable resistance material pattern includes a two-component material, a three-component material, a four-component material, or a five-component material, and the variable resistance material pattern includes at least two of Ge, Se, Sb, Te, As, and Si. [0070 Han]
Regarding Claim 7, Han in view of Park discloses the memory device as claimed in claim 1, wherein
each first memory cell of the plurality of first memory cells includes:
a first electrode (132 Han) on the plurality of first conductive lines (WL Han);
the switching device (134) on the first electrode (132);
a second electrode (136) on the switching device (134);
the variable resistance material pattern (142) on the second electrode (136); and
a third electrode (144) on the variable resistance material pattern (142).
Regarding Claim 8, Han in view of Park discloses the memory device as claimed in claim 7, wherein
each of the first electrode, the second electrode, and the third electrode independently include W, Ti, Ta, Al, Cu, C, CN, TiN, TiAlN, TiSiN, TiCN, TiCSiN, WN, CoSiN, WSiN, TaN, TaCN, or TaSiN. [0068, 0080 Han]
Regarding Claim 13, Han in view of Park discloses the memory device as claimed in claim 1, further comprising:
a plurality of third conductive lines (220) on the plurality of second conductive lines (160) and extending in the first direction (X); and
a plurality of second memory cells (240, 230) respectively between the plurality of second conductive lines (160) and the plurality of third conductive lines (220), wherein
each second memory cell (230, 240) of the plurality of second memory cells includes a switching device (234) and a variable resistance material pattern (242). (See Fig. 12 13 in Han)
Regarding Claim 19, Han (Fig, 12, 13) discloses memory device, comprising:
a substrate (110);
a peripheral circuit (peripheral circuit region PR) on the substrate (110);
a plurality of first conductive lines on the substrate at a first vertical level higher than a vertical level of the peripheral circuit and extending in a first direction;
a plurality of first conductive lines (WLA) on the substrate (110) at a first vertical level higher than a vertical level of the peripheral circuit (PR) [0046] and extending in a first direction (X, Fig. 12);
a plurality of second conductive lines (BL) on the substrate at a second vertical level higher than the first vertical level (Fig, 12, 13), the plurality of second conductive lines extending inextending in a second direction (Y) crossing the first direction (X);
a plurality of first memory cells (140, 130) respectively arranged between the plurality of first conductive lines (WLA) and the plurality of second conductive lines (BL),
wherein:
each first memory cell of the plurality of first memory cells includes a switching device (134) and a variable resistance material pattern (144), and the switching device (134) includes a material having a composition (134) [0065-0066] Han does not explicitly disclose that a composition of La.sub.xNi.sub.1-xO.sub.y, in which 0.13≤x≤0.30 and 0.9≤y≤1.5
Park discloses the switching device (resistive switching material layer) includes a material having a composition of La.sub.xNi.sub.1-xO.sub.y ( LaNiO.sub.3-x).
Park further discloses controlling and adjusting band gap of the material in order to be applicable to a memory (“the adjustment of the resistance value can be performed by adjusting the bandgap of the resistance change material layer RE”) and (“aTiO .sub.3, LaNiO .sub.3, LaCuO .sub.3 is used as a Mott insulator of the present invention, each ~ 0.2 eV or less, - And has a band gap of 0.02-0.29 eV or less, and a band gap of ~0.14-0.28 eV or less, preferably 0.01 eV to 0.5 eV, so that the band gap can be easily controlled and applicable to a memory.”) and further discloses that resistive properties of the material depend of oxygen concertation thein “ the transition metal oxide such as LaTiO .sub.3 , LaNiO .sub.3 , and LaCuO .sub.3 has a characteristic that the resistance value changes according to the oxygen concentration therein, and the voltage of the oxygen ion to the electrode according to the application of the electric field By adjusting the oxygen concentration according to the reversible movement according to the direction, it is possible to control the resistance change and apply it to the Mott transfer.”.
Han in view of Park does not explicitly disclose specific ration of the a material having a composition in which 0.13≤x≤0.30 and 0.9≤y≤1.5.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjusting bandgap, resistive properties and oxygen concentration of a memory device in Han in view of Park such that a composition is 0.13≤x≤0.30 and 0.9≤y≤1.5 in order to adjustment of the resistance value of the material and control the resistance change and apply it to the Mott applicable to a memory (Han).
Regarding Claim 20, Han (Fig, 12, 13) discloses the memory device as claimed in claim 19, wherein
each first memory cell of the plurality of first memory cells includes:
a first electrode (132 Han) between the switching device (134) and the plurality of first conductive lines (WL Han), a second electrode (136) between the switching device (134) and the variable resistance material pattern (142), and a third electrode (144) between the variable resistance material (144) pattern and the plurality of second conductive lines (160).
Claim(s) 2, 14, 16 and 17 s/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US 2021/0151505 A1) in view of Park et al. (KR 2019/0065980 A) and further in view of Iwashita et al. (US 2006/0213043 A1)
Regarding Claim 2, Han in view of Park discloses the memory device as claimed in claim 1, wherein the material of the switching device (“RE”) (Park)
Han in view of Park does not explicitly disclose the material of the switching device has a cubic crystal structure.
Iwashita discloses a material a cubic crystal structure (“ a lanthanum nickelate layer oriented to a cubic (100)”) [0008]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the memory device in Han in view of Park and Iwashita such that the material of the switching device has a cubic crystal structure in order to form them material a sputter method and to have a greater strain to an impressed voltage [0008-0010].
Regarding Claim 14, Han discloses (Fig. 12, 13) a memory device comprising:
a substrate (110);
a plurality of first conductive lines (WLA) on the substrate (110) and extending in a first direction (X, Fig. 12);
a plurality of second conductive lines (BL) on the plurality of first conductive lines (BL) and extending in a second direction (Y) crossing the first direction (X); and
a plurality of first memory cells (140, 130) respectively arranged between the plurality of first conductive lines (WLA) and the plurality of second conductive lines (BL),
wherein:
each first memory cell of the plurality of first memory cells includes a switching device (134) and a variable resistance material pattern (144), and the switching device (134) includes a material having a composition (134) [0065-0066] of La.sub.xNi.sub.1-xO.sub.y, in which 0.13≤x≤0.30 and 0.9≤y≤1.5, and has a NiO cubic crystal structure.
Han does not explicitly disclose that a composition of La.sub.xNi.sub.1-xO.sub.y, in which 0.13≤x≤0.30 and 0.9≤y≤1.5 and has a NiO cubic crystal structure.
Park discloses the switching device (resistive switching material layer) includes a material having a composition of La.sub.xNi.sub.1-xO.sub.y ( LaNiO.sub.3-x).
Park further discloses controlling and adjusting band gap of the material in order to be applicable to a memory (“the adjustment of the resistance value can be performed by adjusting the bandgap of the resistance change material layer RE”) and (“aTiO .sub.3, LaNiO .sub.3, LaCuO .sub.3 is used as a Mott insulator of the present invention, each ~ 0.2 eV or less, - And has a band gap of 0.02-0.29 eV or less, and a band gap of ~0.14-0.28 eV or less, preferably 0.01 eV to 0.5 eV, so that the band gap can be easily controlled and applicable to a memory.”) and further discloses that resistive properties of the material depend of oxygen concertation thein “ the transition metal oxide such as LaTiO .sub.3 , LaNiO .sub.3 , and LaCuO .sub.3 has a characteristic that the resistance value changes according to the oxygen concentration therein, and the voltage of the oxygen ion to the electrode according to the application of the electric field By adjusting the oxygen concentration according to the reversible movement according to the direction, it is possible to control the resistance change and apply it to the Mott transfer.”. and has a NiO cubic crystal structure.
Han in view of Park does not explicitly disclose specific ration of the a material having a composition in which 0.13≤x≤0.30 and 0.9≤y≤1.5 and has a NiO cubic crystal structure.
However, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjusting bandgap, resistive properties and oxygen concentration of a memory device in Han in view of Park such that a composition is 0.13≤x≤0.30 and 0.9≤y≤1.5 in order to adjustment of the resistance value of the material and control the resistance change and apply it to the Mott applicable to a memory (Han).
Han in view of Park does not explicitly disclose specific ration of the a material having and has a NiO cubic crystal structure.
Iwashita discloses a material having and has a NiO cubic crystal structure. (“ a lanthanum nickelate layer oriented to a cubic (100)”) [0008]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the memory device in Han in view of Park and Iwashita such that the material of the switching device has a cubic crystal structure in order to form them material a sputter method and to have a greater strain to an impressed voltage [0008-0010]
Regarding Claim 16, Han in view of Park and Iwashita discloses the memory device as claimed in claim 14, wherein:
the variable resistance material pattern includes a two-component material, a three-component material, a four-component material, or a five-component material, and the variable resistance material pattern includes at least two of Ge, Se, Sb, Te, As, and Si. [0070 Han]
Regarding Claim 17, Han in view of Park and Iwashita discloses the memory device as claimed in claim 14, wherein
each first memory cell of the plurality of first memory cells includes:
a first electrode (132 Han) on the plurality of first conductive lines (WL Han);
the switching device (134) on the first electrode (132);
a second electrode (136) on the switching device (134);
the variable resistance material pattern (142) on the second electrode (136); and
a third electrode (144) on the variable resistance material pattern (142).
Claim(s) 9, 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US 2021/0151505 A1) in view of Park et al. (KR 2019/0065980 A) and further in view of Seong et al. (US 2020/0335692 A1)
Regarding Claim 9, Han in view of Park discloses the memory device as claimed in claim 1, wherein each first memory cell of the plurality of first memory cells.
Han in view of Park does not explicitly disclose a first electrode on the plurality of first conductive lines; the variable resistance material pattern on the first electrode; a second electrode on the variable resistance material pattern; the switching device on the second electrode; and a third electrode on the switching device.
Seong (Fig. 6A) discloses a first electrode (350) on a plurality of first conductive lines (200); a variable resistance material pattern (340) on the first electrode (350); a second electrode (330) on the variable resistance material pattern (340); a switching device (320) on the second electrode (330); and a third electrode (310) on the switching device (320).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the memory device in Han in view of Park and Seong such that a first electrode on the plurality of first conductive lines; the variable resistance material pattern on the first electrode; a second electrode on the variable resistance material pattern; the switching device on the second electrode; and a third electrode on the switching device in order to have the first conductive lines function as a bit line and second conductive line function as a word line [0071-0072].
Regarding Claim 11, Han in view of Park discloses the memory device as claimed in claim 1.
Han in view of Park does not explicitly disclose the variable resistance material pattern has an inclined sidewall, and a width on a top surface of the variable resistance material pattern is less than a width on a bottom surface of the variable resistance material pattern.
Seong (Fig. 4A) discloses a variable resistance material pattern (340) has an inclined sidewall, and a width on a top surface of the variable resistance material pattern (340)is less than a width on a bottom surface of the variable resistance material pattern (340).. (Fig. 4A)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the memory device in Han in view of Park and Seong such that the variable resistance material pattern has an inclined sidewall, and a width on a top surface of the variable resistance material pattern is less than a width on a bottom surface of the variable resistance material pattern in order to have plurality of first memory cells to be formed in the same etching process [0156].
Regarding Claim 12, Han in view of Park discloses the memory device as claimed in claim 1, further comprising:
a peripheral circuit under the plurality (peripheral circuit region PR) of first conductive lines on the substrate (110) [0046]; and
an insulating pattern (152) surrounding sidewalls of each first memory cell (130, 140) of the plurality of first memory cells.
Han in view of Park does not explicitly disclose that the peripheral circuit being configured to drive the plurality of first memory cells.
Seong (Fig. 7) discloses a peripheral circuit (Ps) being configured to drive a plurality of first memory cells (300). (“the peripheral structure PS may control various signals, e.g., a data signal, a power signal, and a ground signal, that may be applied to the cell structures 300.”) [0077]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the memory device in Han in view of Park and Seong such that the peripheral circuit being configured to drive the plurality of first memory cells in order to a data signal, a power signal, and a ground signal, that may be applied to the cell structures [0077]
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US 2021/0151505 A1) in view of Park et al. (KR 2019/0065980 A) and further in view of Jung et al. (US 2021/0050522A1)
Regarding Claim 10, Han in view of Park discloses the memory device as claimed in claim 1.
Han in view of Park does not explicitly disclose a spacer on a sidewall of the variable resistance material pattern included in each first memory cell of the plurality of first memory cells; and an insulating pattern on sidewalls of two adjacent first memory cells among the plurality of first memory cells and covering the spacer.
Jung (Fig. 2) discloses a spacer (X-directional spacers Sx1 and Y-directional spacers Sy1) on a sidewall of a variable resistance material pattern (42) included in each first memory cell of a plurality of first memory cells (CS1); and an insulating pattern on sidewalls (53y, 53x) of two adjacent first memory cells (CS1) among the plurality of first memory cells (CS1) and covering the spacer (Sx1 Sy1). [0027-0028, 0046]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the memory device in Han in view of Park and Jung such that a spacer on a sidewall of the variable resistance material pattern included in each first memory cell of the plurality of first memory cells; and an insulating pattern on sidewalls of two adjacent first memory cells among the plurality of first memory cells and covering the spacer in order to form cross-point type semiconductor memory device [0049]
Claim(s) 18 s/are rejected under 35 U.S.C. 103 as being unpatentable over Han et al. (US 2021/0151505 A1) in view of Park et al. (KR 2019/0065980 A) and further in view of Iwashita et al. (US 2006/0213043 A1) and Seong et al. (US 2020/0335692 A1)
Regarding Claim 18, Han in view of Park and Iwashita discloses memory device as claimed in claim 14, further comprising:
a peripheral circuit under the plurality (peripheral circuit region PR) of first conductive lines on the substrate (110) [0046]; and
an insulating pattern (152) surrounding sidewalls of each first memory cell (130, 140) of the plurality of first memory cells.
Han in view of Park and Iwashita does not explicitly disclose that the peripheral circuit being configured to drive the plurality of first memory cells.
Seong (Fig. 7) discloses a peripheral circuit (Ps) being configured to drive a plurality of first memory cells (300). (“the peripheral structure PS may control various signals, e.g., a data signal, a power signal, and a ground signal, that may be applied to the cell structures 300.”) [0077]
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the memory device in Han in view of Park , Iwashita and Seong such that the peripheral circuit being configured to drive the plurality of first memory cells in order to a data signal, a power signal, and a ground signal, that may be applied to the cell structures [0077]
Allowable Subject Matter
Claim 3, 4, 15 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Ohahshi et al. (US 2010/00201333 A1) discloses a mixed crystal of lanthanum nickelate.
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/DMITRIY YEMELYANOV/Examiner, Art Unit 2891