DETAILED ACTION
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 7-14 and 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. US 2015/0021684 A1.
Regarding claims 1, 2 and 7-13, Lee discloses
A semiconductor device (Figs. 1, 7 and 8) comprising:
a substrate (201) provided with a plurality of active regions (201), each of the active regions extending in a first direction that is a horizontal direction and protruding in a vertical direction;
a device isolation region (202) electrically isolating the plurality of active regions;
a gate trench (204) formed in and extending across both the plurality of active regions and the device isolation region;
a gate structure (210/212) formed in the gate trench, the gate structure extending through each of the plurality of active regions;
a gate dielectric film (208) formed between the gate trench and the gate structure; and
an insulating barrier film (206) provided in a first active region of the plurality of active regions under the gate trench, spaced apart from a lower surface of the gate trench and extending in an extension direction of the gate trench,
wherein, with respect to a cross section that is perpendicular to the extension direction of the gate trench and that is taken through the first active region, the insulating barrier film is positioned under the lowermost point of the gate trench such that a vertical line extending through the lowermost point of the gate trench extends through the insulating barrier film (Fig. 8).
(claims 2, 7 and 10-13) Fig. 8.
(claim 8) para 0081.
(claim 9) Fig. 10; 206c.
Regarding claims 14 and 16, Lee discloses:
A semiconductor device (Figs. 1, 7 and 8) comprising:
a substrate (201) provided with a plurality of active regions (201), each of the active regions extending in a first direction that is a horizontal direction and protruding in a vertical direction;
a device isolation region (202) electrically isolating the plurality of active regions;
a gate trench (204) formed in and extending across both the plurality of active regions and the device isolation region;
a gate structure (210/212) formed in the gate trench, the gate structure extending through each of the plurality of active regions;
a gate dielectric film (208) formed between the gate trench and the gate structure; and
an electric insulator (206; para 0102) provided under the gate trench, spaced apart from a lower surface of the gate trench,
wherein, with respect to a cross section that is perpendicular to the extension direction of the gate trench, the electric insulator is positioned under the lowermost point of the gate trench such that a vertical line extending through the lowermost point of the gate trench extends through the electric insulator (Fig. 8).
(claim 16) a least the bottom portion of Fig. 8, 206.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. US 2015/0021684 A1.
Regarding claims 3 and 15, although Lee does not specifically disclose “(claim 3) wherein a dimension of the insulating barrier film in the first direction is less than a dimension of the gate trench in the first direction; and (claim 15) wherein a width in the first direction of the electric insulator is less than a width of the first direction on the gate trench”, Lee does give insight into the functionality of the barrier layer 106 in alleviating movement of carriers to neighboring buried channel areas. Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to determine the claimed dimension/width of the insulating barrier film/electric insulator to improve the reduction of data loss criteria in neighboring channel regions.
Claims 4-6 and 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee, as applied to claims 1 and 14 above, in view of Min US 2014/0367775 A1.
Regarding claims 4-6 and 17-20; Lee does not disclose:
(claim 4) wherein the insulating barrier film comprises silicon oxide or silicon nitride; (claim 5) wherein the insulating barrier film comprises an air gap; (claim 6) wherein the insulating barrier film has an upper width that is greater than a lower width; (claim 17) wherein the electric insulator comprises silicon oxide or silicon nitride; (claim 18) wherein the electric insulator comprises an air gap; (claim 19) wherein the electric insulator comprises at least two air gaps separated from each other; and (claim 20) wherein the electric insulator comprises a first insulator and a second insulator that is surrounded by the first insulator and the dielectric constant of the second insulator is relatively lower than the dielectric constant of the first insulator.
Min discloses a publication from a similar field of endeavor in which:
(claim 4) wherein the insulating barrier film comprises silicon oxide or silicon nitride (201); (claim 5) wherein the insulating barrier film comprises an air gap (203); (claim 6) wherein the insulating barrier film has an upper width that is greater than a lower width (Figs. 2-4); (claim 17) wherein the electric insulator comprises silicon oxide or silicon nitride (201); (claim 18) wherein the electric insulator comprises an air gap (203); and (claim 20) wherein the electric insulator comprises a first insulator (205 SiGe) and a second insulator (207 oxide) that is surrounded by the first insulator and the dielectric constant of the second insulator is relatively lower than the dielectric constant of the first insulator.
It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to employ the material of the insulating barrier/electric insulator of Min within the structure of the Lee since both features are employed for the similar purpose of providing a mechanism for deterring carrier interference in neighboring channel regions. Furthermore, although Min does not specifically disclose “(claim 19) wherein the electric insulator comprises at least two air gaps separated from each other”, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to determine the claimed multiple air gaps since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. In re Jepikse, 86 USPQ 70.
Conclusion
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/ERROL V FERNANDES/Primary Examiner, AU 2893