Prosecution Insights
Last updated: April 19, 2026
Application No. 18/527,450

SEMICONDUCTOR MEMORY DEVICES

Non-Final OA §103§112
Filed
Dec 04, 2023
Examiner
CHOWDHARY, NIMARTA KAUR
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant

Examiner Intelligence

Grants only 0% of cases
0%
Career Allow Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
10 currently pending
Career history
10
Total Applications
across all art units

Statute-Specific Performance

§103
46.7%
+6.7% vs TC avg
§102
23.3%
-16.7% vs TC avg
§112
26.7%
-13.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§103 §112
DETAILED ACTION General Remarks The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. When responding to this office action, applicants are advised to provide the examiner with line numbers and page numbers in the application and/or references cited to assist the examiner in locating appropriate paragraphs. Per MPEP 2111 and 2111.01, the claims are given their broadest reasonable interpretation and the words of the claims are given their plain meaning consistent with the specification without importing claim limitations from the specification. For Examiner’s Interview fill out the online Automated Interview Request (AIR) form (http://www.uspto.gov/patent/uspto-automated-interview-request-air-form.html). Status of claim(s) to be treated in this office action: Independent: 1, 15, 19 Pending: 1-30 Priority Claim The Examiner notes that Priority Doc. could be retrieved. Applicant is requested to contact the EBC Customer Support Center at 1-866-217-9197 or 571-272-4100 to troubleshoot. Claim Objections Claim 3 objected to because of the following informalities: Claim 3 (line 3) recites “by a side surface of the second lower electrodes…” (where electrode is plural). Claim 2, the claim on which this claim depends, only recites “the second lower electrode” (singular). Claim 3 has been interpreted to mean the second lower electrode of Claim 2. Appropriate correction is required. Claim Rejections - 35 USC § 112 Claim 3 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Dependent Claim 3, recite(s) the limitation "a side surface of the second lower electrodes…" in line 3. There is insufficient antecedent basis for this limitation in the claim. Claim 2, the claim on which this claim depends, also recites “a side surface of the second lower electrode”. It is unclear whether the recitation of “a side surface of the second lower electrodes” is the same “side surface” recited in Claim 2, or a new instance. In the case of this application, it has been interpreted to mean a different side surface. Claim Rejections - 35 USC § 103 The following is a quotation of AIA 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-5 and 8-20 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Uchiyama (US 8969935 B2) in view of Watanabe (US 6762107 B2). Re: Independent Claim 1, Uchiyama discloses: A semiconductor memory device (Uchiyama, a semiconductor memory device; Fig. 1, element 1) comprising: a substrate (Uchiyama, semiconductor substrate; Fig. 2A, element 2) having a memory cell region (Uchiyama, memory cells; Fig. 1; not numbered, Col. 2, lines 66-67 and Col. 3, lines 1-14); and a plurality of capacitor structures (Uchiyama, cell capacitor; Fig. 3, element C1-n) in the memory cell region of the substrate (Uchiyama, memory cells are configured to include a cell transistor and a cell capacitor, Col. 2, lines 66-67 and Col. 3, lines 1-14), each of the plurality of capacitor structures including a lower electrode (Uchiyama, lower electrodes; Fig. 2A, element 11), a capacitor dielectric layer (Uchiyama, capacitor insulating film; Fig. 2A, element 13), and an upper electrode (Uchiyama, upper electrode; Fig. 2A, element 12), wherein the lower electrode includes a first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode), a second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) above the first lower electrode (Uchiyama, Fig. 4, 11(C2-2) is above 11(C2-1)), a connecting lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C1-1)) connecting a top end of the first lower electrode to a bottom end of the second lower electrode (Uchiyama, Fig. 4, lower electrode 11(C1-1) is in between the first lower electrode and the second lower electrode and can therefore be considered the connecting lower electrode), a first connection surface formed by a top surface of the first lower electrode and a bottom surface of the connecting lower electrode in contact with each other (Uchiyama, Fig. 4 shows the first lower electrode 11(C2-1) which has a top surface and a connecting lower electrode, 11(C1-1), which has a bottom surface, and they are in contact, and the interface formed by this contact can be considered a first connection surface), and a second connection surface formed by a bottom surface of the second lower electrode and a top surface of the connecting lower electrode in contact with each other (Uchiyama, Fig. 4 shows the second electrode 11(C2-2) which has a bottom surface and a connecting lower electrode, 11(C1-1), which has a top surface, and they are in contact, and the interface formed by this contact can be considered a second connection surface), wherein the upper electrode overlapping the connecting lower electrode in a horizontal direction, (Uchiyama, Fig. 4, discloses the upper electrode overlapping the connecting lower electrode) Uchiyama is silent regarding: and wherein the upper electrode includes a bent upper electrode, and the bent upper electrode includes a bent portion. Watanabe discloses: and wherein the upper electrode includes a bent upper electrode (Watanabe, upper electrode; Fig. 1, element 7), and the bent upper electrode includes a bent portion (Watanabe, inclined surface; Fig. 4, elements 7a, 7b, 7c make up a bent portion). Uchiyama discloses the upper electrode overlapping the connecting lower electrode. Uchiyama does not disclose the upper electrode includes a bent upper electrode and the bent upper electrode includes a bent portion. Watanabe discloses a bent upper electrode for stress management. It would have been obvious to a person of ordinary skill in the art (POSITA) before the effective filing data to modify the upper electrode of Uchiyama with a bent upper electrode disclosed by Watanabe to reduce stress and prevent the upper electrode from cracking (Watanabe, Col. 15, lines 41 -43). Re: Dependent Claim 2, Uchiyama and Watanabe disclose all the limitations of claim 1 on which this claim depends. Watanabe further discloses: wherein the bent upper electrode (Watanabe, upper electrode; Fig. 2, element 7) includes a first bent upper electrode (Watanabe, an inclined surface of the upper electrode, Fig. 3, element 7a) and a second bent upper electrode (Watanabe, an upper end corner of an inclined surface of the upper electrode; Fig. 3, element 7b), the first bent upper electrode has a side surface separated from and facing the side surface of the connecting lower electrode (Watanabe, external leader electrode portion; Fig. 4, element 4a), and the second bent upper electrode is connected to a top end of the first bent upper electrode (Watanabe, Fig. 4 shows 7b is connected to a top side of 7a) and has a side surface separated by a constant distance from and parallel with a side surface of the second lower electrode (Watanabe, lower electrode; Fig. 6, element 4 is parallel and separated from the second bent upper electrode). Re: Dependent Claim 3, Uchiyama and Watanabe disclose all the limitations of claim 2 on which this claim depends. Uchiyama further discloses: wherein a plane formed by a side surface of the first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode) facing the upper electrode (Uchiyama, upper electrode; Fig. 2A, element 12) does not coincide with a plane formed by a side surface of the second lower electrodes (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) facing the upper electrode (Uchiyama, Col.6, lines 1-3). Re: Dependent Claim 4, Uchiyama and Watanabe disclose all the limitations of claim 2 on which this claim depends. Uchiyama further discloses: wherein the first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode) is offset from the second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) (Uchiyama, Col. 6, lines 39-46). Re: Dependent Claim 5, Uchiyama and Watanabe disclose all the limitations of claim 4 on which this claim depends. Uchiyama further discloses: wherein a value of the offset between the first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode) and the second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) is less than a vertical length of one of the first lower electrode and the second lower electrode. Re: Dependent Claim 8, Uchiyama and Watanabe disclose all the limitations of claim 4 on which this claim depends. Uchiyama, as modified by Watanabe, further discloses: wherein the bent upper electrode (Uchiyama, upper electrode; Fig. 2A, element 12), is separated from the connecting lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C1-1) Fig. 2 shows elements 11 and 12 are separated from each other, further highlighted by Fig. 4), and the capacitor dielectric layer (Uchiyama, capacitor insulating film; Fig. 2A, element 13) is interposed between the bent upper electrode and the connecting lower electrode (Uchiyama, Fig. 2 shows the capacitor layers generally between elements 11 and 12). Re: Dependent Claim 9, Uchiyama and Watanabe disclose all the limitations of claim 4 on which this claim depends. Watanabe further discloses: wherein a vertical level of the second connection surface is substantially the same as a vertical level of a surface having the first bent upper electrode (Watanabe, an inclined surface of the upper electrode, Fig. 3, element 7a) and the second bent upper electrode (Watanabe, an upper end corner of an inclined surface of the upper electrode; Fig. 3, element 7b) meeting each other therein (Watanabe, Fig. 3 shows elements 7a and 7b meeting at a similar height, which can be taken as the second connection surface). Re: Dependent Claim 10, Uchiyama and Watanabe disclose all the limitations of claim 4 on which this claim depends. Uchiyama further discloses: wherein a horizontal cross- sectional area of the first connection surface is equal to a horizontal cross-sectional area of the first lower electrode (Uchiyama, Fig. 4 shows the first lower electrode 11(C2-1) which has a top surface and a connecting lower electrode,11(C1-1), which has a bottom surface, and they are in contact, and the interface formed by this contact can be considered a first connection surface and a cross-sectional area of this surface can be taken such that it is equal to the cross sectional area of the first lower electrode), and a horizontal cross-sectional area of the second connection surface is equal to a horizontal cross-sectional area of the second lower electrode (Uchiyama, Fig. 4 shows the second electrode 11(C2-2) which has a bottom surface and a connecting lower electrode, 11(C1-1), which has a top surface, and they are in contact, and the interface formed by this contact can be considered a second connection surface, and a cross-sectional area of this surface can be taken such that it is equal to the cross sectional area of the second lower electrode). Re: Dependent Claim 11, Uchiyama and Watanabe disclose all the limitations of claim 1 on which this claim depends. Uchiyama further discloses: wherein a horizontal width of the first connection surface Uchiyama, Fig. 4 shows the first lower electrode 11(C2-1) which has a top surface and a connecting lower electrode,11(C1-1), which has a bottom surface, and they are in contact, and the interface formed by this contact can be considered a first connection surface) is substantially the same as a horizontal width of the second connection surface (Uchiyama, Fig. 4 shows the second electrode 11(C2-2) which has a bottom surface and a connecting lower electrode, 11(C1-1), which has a top surface, and they are in contact, and the interface formed by this contact can be considered a second connection surface, and a horizontal width of these surfaces can be selected such that they are equal). Re: Dependent Claim 13, Uchiyama and Watanabe disclose all the limitations of claim 12 on which this claim depends. Watanabe further discloses: a vertical height of the connecting lower electrode (Watanabe, the external leader electrode portion; Fig. 2, element 4a) to the vertical height of the first lower electrode (Watanabe, lower electrode; Fig. 1, element 5) Watanabe does not explicitly disclose: wherein a ratio is less than or equal to 0.2 Watanabe discloses a connecting lower electrode and a first lower electrode, where the vertical height of the first lower electrode is visibly greater than the vertical height of the connecting lower electrode. Watanabe does not explicitly disclose the ratio of the height of the connecting lower electrode to the height of the first electrode to be less than or equal to 0.2. The claimed ratio is a result-effective variable to reduce the thickness of the electrode section (Watanabe, background art; Col.1, lines 13-20), In the absence of any indication that the claimed value is critical or produces unexpected results, it would have been obvious to a person of ordinary skill in the art (POSITA) before the effective filing date to adjust the relative vertical heights of the connecting lower electrode and first lower electrode to achieve a desired ratio of less than or equal to 0.2 as a matter of routine optimization. Re: Dependent Claim 14, Uchiyama and Watanabe disclose all the limitations of claim 1 on which this claim depends. Watanabe further discloses: wherein a vertical height of the second lower electrode (Watanabe, lower electrode; Fig. 1, element 4) is greater than a vertical height of the connecting lower electrode (Watanabe, the external leader electrode portion; Fig. 2, element 4a), and a vertical height of the first lower electrode (Watanabe, lower electrode; Fig. 1, element 5) is greater than the vertical height of the second lower electrode (Watanabe, lower electrode; Fig. 3, element 4, this embodiment shows a smaller vertical height of the second lower electrode). Re: Independent Claim 15, Uchiyama discloses: A semiconductor memory device (Uchiyama, a semiconductor memory device; Fig. 1, element 1) comprising: a substrate (Uchiyama, semiconductor substrate; Fig. 2A, element 2) having a memory cell region (Uchiyama, memory cells; Fig. 1; not numbered, Col. 2, lines 66-67 and Col. 3, lines 1-14); and a plurality of capacitor structures (Uchiyama, cell capacitor; Fig. 3, element C1-n) in the memory cell region of the substrate (Uchiyama, memory cells are configured to include a cell transistor and a cell capacitor, Col. 2, lines 66-67 and Col. 3, lines 1-14), each of the plurality of capacitor structures including a lower electrode (Uchiyama, lower electrodes; Fig. 2A, element 11), a capacitor dielectric layer (Uchiyama, capacitor insulating film; Fig. 2A, element 13), and an upper electrode (Uchiyama, upper electrode; Fig. 2A, element 12), wherein the lower electrode includes a first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode), a second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) above the first lower electrode (Uchiyama, Fig. 4, 11(C2-2) is above 11(C2-1)), a connecting lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C1-1)) connecting a top end of the first lower electrode to a bottom end of the second lower electrode (Uchiyama, Fig. 4, lower electrode 11(C1-1) is in between the first lower electrode and the second lower electrode and can therefore be considered the connecting lower electrode), a first connection surface formed by a top surface of the first lower electrode and a bottom surface of the connecting lower electrode in contact with each other (Uchiyama, Fig. 4 shows the first lower electrode 11(C2-1) which has a top surface and a connecting lower electrode, 11(C1-1), which has a bottom surface, and they are in contact, and the interface formed by this contact can be considered a first connection surface), and a second connection surface formed by a bottom surface of the second lower electrode and a top surface of the connecting lower electrode in contact with each other (Uchiyama, Fig. 4 shows the second electrode 11(C2-2) which has a bottom surface and a connecting lower electrode, 11(C1-1), which has a top surface, and they are in contact, and the interface formed by this contact can be considered a second connection surface), and upper electrode overlapping the connecting lower electrode in a horizontal direction, (Uchiyama, Fig. 4, discloses the upper electrode overlapping the connecting lower electrode), wherein the first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode) is offset from the second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) (Uchiyama, Col. 6, lines 39-46). Uchiyama is silent regarding: and wherein the upper electrode includes a bent upper electrode, and the bent upper electrode includes a bent portion, wherein the bent upper electrode includes a first bent upper electrode and a second bent upper electrode, the first bent upper electrode has a side surface separated by a constant distance from and facing the side surface of the connecting lower electrode, and the second bent upper electrode is connected to a top end of the first bent upper electrode and has a side surface separated by a constant distance from and parallel with a side surface of the second lower electrode, Watanabe discloses: and wherein the upper electrode includes a bent upper electrode (Watanabe, upper electrode; Fig. 1, element 7), and the bent upper electrode includes a bent portion (Watanabe, inclined surface; Fig. 4, elements 7a, 7b, 7c make up a bent portion), wherein the bent upper electrode (Watanabe, upper electrode; Fig. 1, element 7) includes a first bent upper electrode (Watanabe, an inclined surface of the upper electrode, Fig. 3, element 7a) and a second bent upper electrode (Watanabe, an upper end corner of an inclined surface of the upper electrode; Fig. 3, element 7b), the first bent upper electrode has a side surface separated from and facing the side surface of the connecting lower electrode (Watanabe, external leader electrode portion; Fig. 4, element 4a), and the second bent upper electrode is connected to a top end of the first bent upper electrode (Watanabe, Fig. 4 shows 7b is connected to a top side of 7a) and has a side surface separated by a constant distance from and parallel with a side surface of the second lower electrode (Watanabe, lower electrode; Fig. 6, element 4 is parallel and separated from the second bent upper electrode) Uchiyama discloses the upper electrode overlapping the connecting lower electrode. Uchiyama does not disclose the upper electrode includes a bent upper electrode and the bent upper electrode includes a bent portion. Watanabe discloses a bent upper electrode for stress management. It would have been obvious to a POSITA before the effective filing data to modify the upper electrode of Uchiyama with a bent upper electrode disclosed by Watanabe to reduce stress and prevent the upper electrode from cracking (Watanabe, Col. 15, lines 41 -43) Re: Dependent Claim 16, Uchiyama and Watanabe disclose all the limitations of claim 15 on which this claim depends. Uchiyama further discloses: wherein at least a part of the first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode) overlaps with at least a part of the second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) in a vertical direction. Re: Dependent Claim 17, Uchiyama and Watanabe disclose all the limitations of claim 15 on which this claim depends. Watanabe further discloses: further comprising an intermediate support pattern (Watanabe, an adhesion layer; Fig. 1, element 9) below the bent upper electrode (Watanabe, upper electrode; Fig. 1, element 7) and vertically overlapping a bottom surface of the bent upper electrode (Watanabe, Fig. 1 shows a portion of the adhesion layer on the bottom surface of the inclined portion and vertically overlapping it), the intermediate support pattern supporting the first lower electrode (Watanabe, lower electrode; Fig. 1, element 5) by contacting a portion of a side wall (Watanabe, A wall surface portion; Fig.1, element 12) of the first lower electrode (Watanabe, Col. 14, lines 55-60). Re: Dependent Claim 18, Uchiyama and Watanabe disclose all the limitations of claim 15 on which this claim depends. Watanabe further discloses: wherein an area of a bottom surface of the first lower electrode (Watanabe, bottom surface of lower electrode; Fig. 1, element 5, area considered alongside element 12 and 2 is considered for bottom surface) is less than an area of the top surface of the first lower electrode (Watanabe, Fig. 1 area contained between elements 2 and 9 is considered for the top surface), and an area of the bottom surface of the second lower electrode (Watanabe, external leader electrode; Fig. 1, element 4, area between element 12 and 2 is considered for the bottom surface) is less than an area of a top surface of the second lower electrode (Watanabe, Fig. 1, area between elements 2 and 9 is considered of the top surface). Re: Independent Claim 19, Uchiyama discloses: A semiconductor memory device (Uchiyama, a semiconductor memory device; Fig. 1, element 1) comprising: a substrate (Uchiyama, semiconductor substrate; Fig. 2A, element 2) having a memory cell region (Uchiyama, memory cells; Fig. 1; not numbered, Col. 2, lines 66-67 and Col. 3, lines 1-14); and a plurality of capacitor structures (Uchiyama, cell capacitor; Fig. 3, element C1-n) in the memory cell region of the substrate (Uchiyama, memory cells are configured to include a cell transistor and a cell capacitor, Col. 2, lines 66-67 and Col. 3, lines 1-14), each of the plurality of capacitor structures including a lower electrode (Uchiyama, lower electrodes; Fig. 2A, element 11), a capacitor dielectric layer (Uchiyama, capacitor insulating film; Fig. 2A, element 13), and an upper electrode (Uchiyama, upper electrode; Fig. 2A, element 12), wherein the lower electrode includes a first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode), a second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) above the first lower electrode (Uchiyama, Fig. 4, 11(C2-2) is above 11(C2-1)), a connecting lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C1-1)) connecting a top end of the first lower electrode to a bottom end of the second lower electrode (Uchiyama, Fig. 4, lower electrode 11(C1-1) is in between the first lower electrode and the second lower electrode and can therefore be considered the connecting lower electrode), a first connection surface formed by a top surface of the first lower electrode and a bottom surface of the connecting lower electrode in contact with each other (Uchiyama, Fig. 4 shows the first lower electrode 11(C2-1) which has a top surface and a connecting lower electrode, 11(C1-1), which has a bottom surface, and they are in contact, and the interface formed by this contact can be considered a first connection surface), and a second connection surface formed by a bottom surface of the second lower electrode and a top surface of the connecting lower electrode in contact with each other (Uchiyama, Fig. 4 shows the second electrode 11(C2-2) which has a bottom surface and a connecting lower electrode, 11(C1-1), which has a top surface, and they are in contact, and the interface formed by this contact can be considered a second connection surface), wherein the first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode) is offset from the second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) (Uchiyama, Col. 6, lines 39-46), wherein the upper electrode overlapping the connecting lower electrode in a horizontal direction, (Uchiyama, Fig. 4, discloses the upper electrode overlapping the connecting lower electrode) wherein a value of the offset between the first lower electrode (Uchiyama, lower electrode; Fig. 4, element 11 (C2-1) can be considered a first lower electrode) and the second lower electrode (Uchiyama, lower electrode; Fig. 4, element 11(C2-2) can be considered a second lower electrode) is less than a vertical length of one of the first lower electrode and the second lower electrode. Uchiyama is silent regarding: wherein the upper electrode includes a bent upper electrode, and the bent upper electrode includes a bent portion, the first bent upper electrode having a side surface separated by a constant distance from and facing the side surface of the connecting lower electrode, and the second bent upper electrode connected to a top end of the first bent upper electrode and having a side surface separated by a constant distance from and parallel with a side surface of the second lower electrode. Watanabe discloses: and wherein the upper electrode includes a bent upper electrode (Watanabe, upper electrode; Fig. 2, element 7), and the bent upper electrode includes a bent portion (Watanabe, inclined surface; Fig. 4, elements 7a, 7b, 7c make up a bent portion), and the second bent upper electrode is connected to a top end of the first bent upper electrode (Watanabe, Fig. 4 shows 7b is connected to a top side of 7a) and has a side surface separated by a constant distance from and parallel with a side surface of the second lower electrode (Watanabe, lower electrode; Fig. 6, element 5 is parallel and separated from the second bent upper electrode). Uchiyama discloses the upper electrode overlapping the connecting lower electrode. Uchiyama does not disclose the upper electrode includes a bent upper electrode and the bent upper electrode includes a bent portion. Watanabe discloses a bent upper electrode for stress management. It would have been obvious to a POSITA before the effective filing data to modify the upper electrode of Uchiyama with a bent upper electrode disclosed by Watanabe to reduce stress and prevent the upper electrode from cracking (Watanabe, Col. 15, lines 41 -43). Re: Dependent Claim 20, Uchiyama and Watanabe disclose all the limitations of claim 19 on which this claim depends. Watanabe further discloses: further comprising: a lower support pattern (Watanabe, gap filled with insulator; Fig. 1, element 3(11), Col. 28, line 10) supporting the first lower electrode (Watanabe, lower electrode; Fig. 1, element 5) by being in contact with a side wall of the first lower electrode (Watanabe, Fig.1, element 3(11) touches the side of element 5) of one of the plurality of capacitor structures (Watanabe, four or more capacitors; Fig. 5 and 6, element 1); an upper support pattern (Watanabe, dielectric; Fig. 2, element 6) at a higher vertical level than the lower support pattern; and an intermediate support pattern (Watanabe, an adhesion layer; Fig. 1, element 9) below the bent upper electrode (Watanabe, upper electrode; Fig. 1, element 7) and facing a bottom surface of the bent upper electrode (Watanabe, Fig. 1) an intermediate support pattern (Watanabe, an adhesion layer; Fig. 1, element 9) below the bent upper electrode (Watanabe, upper electrode; Fig. 1, element 7) and facing a bottom surface of the bent upper electrode (Watanabe, Fig. 1) a vertical level of the second connection surface is substantially the same as a vertical level of a boundary between the first bent upper electrode (Watanabe, an inclined surface of the upper electrode, Fig. 3, element 7a) and the second bent upper electrode (Watanabe, an upper end corner of an inclined surface of the upper electrode; Fig. 3, element 7b) (Watanabe, Fig. 3 shows elements 7a and 7b meeting at a similar height, which can be taken as the second connection surface). Watanabe does not disclose: wherein the capacitor dielectric layer is interposed between the bent upper electrode and the connecting lower electrode separated from each other, an area of the first connection surface is greater than or equal to a half of a horizontal cross-sectional area of the first lower electrode, and an area of the second connection surface is greater than or equal to a half of a horizontal cross-sectional area of the second lower electrode. Uchiyama, as modified by Watanabe, further discloses: wherein the capacitor dielectric layer (Uchiyama, capacitor insulating film; Fig. 2A, element 13) is interposed between the bent upper electrode and the connecting lower electrode (Uchiyama, Fig. 2 shows the capacitor layers generally between elements 11 and 12), an area of the first connection surface, is greater than or equal to a half of a horizontal cross-sectional area of the first lower electrode, (Uchiyama, Fig. 4 shows the first lower electrode 11(C2-1) which has a top surface and a connecting lower electrode, 11(C1-1), which has a bottom surface, and they are in contact, and the interface formed by this contact can be considered a first connection surface, and a boundary containing this surface can be drawn such that the area of this surface is greater than or equal to half the horizontal cross-sectional area of the first lower electrode), and an area of the second connection surface is greater than or equal to a half of a horizontal cross-sectional area of the second lower electrode (Uchiyama, Fig. 4 shows the second electrode 11(C2-2) which has a bottom surface and a connecting lower electrode, 11(C1-1), which has a top surface, and they are in contact, and the interface formed by this contact can be considered a second connection surface, and a boundary containing this surface can be drawn such that the area of this surface is greater than or equal to half the horizontal cross-sectional area of the second lower electrode). Claim(s) 6 and 7 are rejected under AIA 35 U.S.C. 103 as being unpatentable over Uchiyama (US 8969935 B2) in view of Watanabe (US 6762107 B2), further in view of Kim (US 10032778 B2). Re: Dependent Claim 6, Uchiyama and Watanabe disclose all the limitations of claim 4 on which this claim depends. Watanabe further discloses: further comprising an intermediate support pattern (Watanabe, an adhesion layer; Fig. 1, element 9) below the bent upper electrode (Watanabe, upper electrode; Fig. 1, element 7) and facing a bottom surface of the bent upper electrode (Watanabe, Fig. 1), the intermediate support pattern supporting the first lower electrode (Watanabe, lower electrode; Fig. 1, element 5) by contacting a portion of a side wall (Watanabe, A wall surface portion; Fig.1, element 12) of the first lower electrode (Watanabe, Col. 14, lines 55-60), Watanabe is silent regarding: the portion of the side wall of the first lower electrode being at a lower level than the connecting lower electrode Kim discloses: the intermediate support pattern (Kim, interlayer insulating film; Fig. 2, element 103) supporting the first lower electrode (Kim, the bottom portion of the first lower electrode; Fig. 2, element 110b) by contacting a portion of a side wall (Kim, Fig. 2 discloses this support contacting the lower side wall of element 110b) of the first lower electrode, the portion of the side wall of the first lower electrode being at a lower level than the connecting lower electrode (Kim, sidewall portion of the first lower electrode; Fig. 2, element 110a - the portion of the side wall in contact with the first lower electrode is at a lower level than the connecting lower electrode, Col. 5, lines 17-21). Uchiyama, Watanabe, and Kim disclose electrodes, support portions, and capacitors for semiconductor devices and are therefore analogous art. Uchiyama and Watanabe are silent regarding the intermediate support portion contacting a portion of the side wall of the first lower electrode being at a lower level than the connecting electrode. Kim discloses the portion of the side wall of the first lower electrode being at a lower level than the connecting lower electrode for increased reliability and increased operating performance (Kim, Col. 9, lines 34-38). A POSITA before the effective filing date would have therefore been motivated to increase the adhesion layer support taught by Watanabe around the first lower electrode, arriving at the claimed invention, to reduce stress concentration (Kim, Col. 9, lines 34-38). Re: Dependent Claim 7, Uchiyama, Watanabe, and Kim disclose all the limitations of claim 6 on which this claim depends. Watanabe further discloses: further comprising: a lower support pattern (Watanabe, gap filled with insulator; Fig. 1, element 3(11), Col. 28, line 10) supporting the first lower electrode (Watanabe, lower electrode; Fig. 1, element 5) by contacting the side wall of the first lower electrode (Watanabe, Fig.1, element 3(11) touches the side of element 5); and an upper support pattern (Watanabe, dielectric; Fig. 2, element 6) at a higher vertical level than the lower support pattern, the upper support pattern supporting the second lower electrode (Watanabe, external leader electrode; Fig. 3, element 4) by contacting a side wall (Watanabe, top surface; Fig. 3, element 4b) of the second lower electrode. Prior art made of record and not relied upon are considered pertinent to current application disclosure. Kim (US 20230200053 A1) disclose semiconductor memory device including a capacitor structure. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NIMARTA KAUR CHOWDHARY whose telephone number is (571)272-7679. The examiner can normally be reached usually Monday - Thursday, 7:00 AM - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at (571) 270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NIMARTA KAUR CHOWDHARY/ Examiner, Art Unit 2898 /Leonard Chang/ Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

Dec 04, 2023
Application Filed
Jan 15, 2026
Non-Final Rejection — §103, §112
Feb 12, 2026
Interview Requested
Feb 18, 2026
Examiner Interview Summary
Feb 18, 2026
Applicant Interview (Telephonic)

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1-2
Expected OA Rounds
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2y 6m
Median Time to Grant
Low
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