DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 6 is/are rejected under 35 U.S.C. 102(a1) as being anticipated by Cheng et al., (Cheng) US 2018/0247890.
Regarding claim 1, Cheng shows 1-14, a wiring structure (see FIG. 14), comprising: a lower insulating layer (114)[0019]; a lower wiring structure (154)[0029] extending in a vertical direction and passing through the lower insulating layer (114); a spacer (142) surrounding a side wall of the lower wiring structure (154)(see FIG. 6); a capping insulating layer (144)[0032] on the lower insulating layer (114); and a via structure (128)[0045] extending in the vertical direction and passing through the capping insulating layer (144), wherein: the via structure (128) overlaps the lower wiring structure (154) and the spacer (142) in the vertical direction, and the via structure (128) includes a protruding portion extending in the vertical direction and passing through at least a portion of the spacer (142) (see fig. 14, in combination with fig. 10 and para. [0039]-[0041]: via 128 extends through a portion of sidewall spacer 142).
Regarding claim 2, Cheng shows 1-14, a wiring structure, wherein the spacer (142) and the capping insulating layer include a same material (spacers 142 and etch
stop 144 are made of the same material, e.g. SiCN, see para. [0032])
Regarding claim 3, Cheng shows 1-14, a wiring structure, wherein the spacer and the capping insulating layer each include silicon carbonitride (SiCN), silicon nitride (SiN), silicon oxide (SiO.sub.2), silicon oxynitride (SiON), silicon oxycarbonitride (SiOCN), or a combination thereof (spacers 142 and etch stop 144 are made of the same material, e.g. SiCN, see para. [0032]) (spacers 142 have upper and lower portions and the protruding portion of the via 128 extends through both of them).
Regarding claim 6, Cheng shows 1-14, a wiring structure, wherein a horizontal width of the spacer is about 10 nm to about 30 nm (a thickness of the spacer layer of up to 7nm (see para. [0025], last sentence).
As for the particular range of the spacer, Applicant did not show criticality of the particular range of the spacer. To establish unexpected results over a claimed range or optimum value, applicants should compare a sufficient number of tests both inside and outside the claimed range to show the criticality of the claimed range. In re Hill, 284 F.2d 955, 128 USPQ 197 (CCPA 1960).
Claim(s) 1, 4, 5,7,8 is/are rejected under 35 U.S.C. 102(a1) as being anticipated by Chi et al., (Chi) US 2017/0162502.
Regarding claim 1, Chi shows and FIG. 1-8, and discloses a wiring structure (see fig. 6), comprising: a lower insulating layer (insulating layer 106) [0015]; a lower wiring structure (conductive features 110) [0016] extending in a vertical direction and passing through the lower insulating layer; a spacer (108) surrounding a side wall of the lower wiring structure (barrier layer 108 [0016]; barrier 108 may be a dielectric material, see para. [0017]); a capping insulating layer on the lower insulating layer (etch stop layer 114)[0022]; and a via structure (via 126) extending in the vertical direction and passing through the capping insulating layer, wherein: the via structure overlaps the lower wiring structure and the spacer in the vertical direction (see fig. 6), and the via structure includes a protruding portion extending in the vertical direction and passing through at least a portion of the spacer (see fig. 6, in combination with fig. 4 and para. [0023]-[0024]: lower via portion 120B[0024] extends through a portion of barrier 108).
Regarding claims 4, 5 Chi shows and FIG. 1-8, a wiring structure, wherein a horizontal width of the protruding portion (120b) is less than a horizontal width of the spacer (barrier 108 has upper and lower portions and the protruding portion of the via 126 extends through the upper portion); wherein a lower surface of the protruding portion (120b) is between an upper surface of the spacer and a lower surface of the spacer in the vertical direction.
Regarding claims 7,8 Chi shows and FIG. 1-8, a wiring structure wherein: the spacer (108) includes an upper spacer adjacent to the capping insulating layer and a lower spacer below the upper spacer, and the protruding portion (120B) extends in the vertical direction and passes through at least a portion of the upper spacer (barrier 108 has upper and lower portions and the protruding portion of the via 126 extends through the upper portion); wherein the lower spacer and the upper spacer include a same material (upper section of 108 and lower section are formed of the same material).
Allowable Subject Matter
Claims 9,10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claims 11-20 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARC-ANTHONY ARMAND whose telephone number is (571)272-5178. The examiner can normally be reached 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven B Gauthier can be reached at 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
MARC - ANTHONY ARMAND
Primary Examiner
Art Unit 2813
/MARC-ANTHONY ARMAND/Primary Examiner, Art Unit 2813