DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 5-7 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species (B and C2-C5), there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 23 June 2026.
Applicant’s election without traverse of Species A and Species C1 in the reply filed on 23 June 2026 is acknowledged.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 4 December 2023 has been considered by the examiner and made of record in the application file.
Claim Objections
Claim 4 is objected to because of the following informalities:
Claim 4 appears to contain a grammar error wherein claim 4 recites “… and a side perpendicular to the second direction,” wherein the Examiner believes claim 4 is intended to end with a period. Appropriate correction is required.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 4 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Norihiro Iwai et al. (US 2001/0036681 A1; hereinafter “Iwai”) in view of Toshiyuki Nitta (US 2021/0036181 A1; hereinafter “Nitta”).
Regarding Claim 1, Iwai teaches a method of manufacturing a semiconductor optical device having a first substrate (23, Fig. 9B, para [0051] describes an InP substrate 23) and a chip including a III-V compound semiconductor (13, Fig. 9A, para [0050] and para [0051] describes a chip structure including an AlGaAs core layer 13), the method comprising:
forming a first semiconductor layer (22, Fig. 9A, para [0050] describes forming an AlAs etch stop layer 22) on a second substrate (11, Fig. 9A, para [0050] describes forming the first semiconductor layer 22 on a second substrate 11);
forming a second semiconductor layer on the first semiconductor layer (21, 12, 13, 14 and 15, Fig. 9A, para [0050] describes forming a compound semiconductor layer 21, 12, 13, 14 and 15 on the first semiconductor layer 22);
forming, on the second substrate, a mesa including a portion of the second semiconductor layer (M, 21, 12, 13, 14 and 15, annotated Fig. 9A, para [0050] describes forming a stripe ridge through selectively etching portions of the second semiconductor layer 21, 12, 13, 14 and 15 resulting in a mesa structure M);
bonding the mesa of the chip to the first substrate (23 and M, annotated Fig. 9A and Fig. 9B, para [0051] describes bonding the mesa M of the chip to the first substrate 23);
after the bonding, removing the second substrate by etching (11, Fig. 9C, para [0051] describes removing the second substrate 11 by a wet etching technique); and
after the removing the second substrate, removing the first semiconductor layer (22, Fig. 9C, para [0051] describes removing the first semiconductor layer 22 by a wet etching technique),
after the cutting, a length of the mesa in the first direction is equal to or less than a length of the second substrate in the first direction (M, FD and 11, annotated Fig. 9A depicts wherein a length of the mesa M in a first direction FD is equal to or less than a length of the second substrate 11 in the first direction FD).
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Iwai fails to explicitly disclose cutting the second substrate to form a chip including the mesa and the second substrate;
However, Nitta teaches a similar method of manufacturing a semiconductor optical device comprising cutting the second substrate to form a chip including the mesa and the second substrate (16, Fig. 1B, para [0027] describes cutting a second substrate 10 into a plurality of chips 16 through dicing wherein upon combining Iwai with Nitta, the mesa structure M and second substrate 11 of Iwai would be included on the chip 16);
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Iwai with Nitta to further disclose a method of manufacturing a semiconductor optical device comprising cutting the second substrate to form a chip including the mesa and the second substrate in order to provide the well-known advantage of being able to manufacture multiple semiconductor optical devices from a wafer therefore greatly reducing manufacturing costs.
Iwai and Nitta fail to explicitly disclose wherein the etching in the removing the second substrate proceeds more easily in a second direction crossing a first direction than in the first direction.
However, Nitta discloses in para [0030] of their disclosure wherein an anisotropic wet etching process is used to remove a second substrate (10). Nitta further discloses in para [0039] of their disclosure wherein an etching rate varies depending on a crystal orientation of InP in the second substrate (10).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to combine the teachings of Iwai and Nitta to try different crystal orientations of InP from a finite number of possible crystal orientations resulting in an anisotropic wet etching process that proceeds more easily in a second direction crossing a first direction than in the first direction in order to provide the advantage of reducing a size or eliminating potential InP protrusions remaining after a wet etching process therefore potentially reducing the number of manufacturing steps needed in a method of manufacturing a semiconductor optical device reducing device costs and providing a crystal orientation which allows remaining InP substrate protrusions to be etched easily without damaging underlying device components (Nitta, para [0038] – para [0040], see MPEP 2143 (I)(E) and MPEP 2144.05 (II)(A)(B)).
Regarding Claim 2, the combination of Iwai and Nitta teaches the method of manufacturing a semiconductor optical device according to claim 1, wherein, in the forming the mesa (Iwai, M, annotated Fig. 9A), the mesa including the portion of the second semiconductor layer is formed by etching another portion of the second semiconductor layer other than the portion of the second semiconductor layer (Iwai, AP, annotated Fig. 9A II, para [0050] describes forming a stripe ridge through selective etching of the second semiconductor layers 21, 12, 13/16, 14 and 15 wherein the portions etched are another portions AP as shown in annotated Fig. 9A II and the remaining portions of the second semiconductor layers form the mesa M as shown in annotated Fig. 9A), and
after the cutting, the length of the mesa in the first direction is smaller than the length of each of the second substrate and the first semiconductor layer in the first direction (Iwai, M, FD, 22 and 11, annotated Fig. 9A depicts wherein the length of the mesa M in the first direction FD is smaller than the length of each of the second substrate 11 and the first semiconductor layer 22).
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Regarding Claim 4, the combination of Iwai and Nitta teaches the method of manufacturing a semiconductor optical device according to claim 2, wherein the second substrate (Iwai, 11, Fig. 8 and Fig. 9A) and the mesa (Iwai, M, annotated Fig. 9A and Fig. 8) after the cutting have a side perpendicular to the first direction and a side perpendicular to the second direction (Iwai, 11 and M, annotated Fig. 9A, annotated Fig. 9A III and Fig. 9B wherein Fig. 9B depicts the second substrate 11 and mesa M after the cutting as disclosed by Nitta wherein the second substrate 11 and mesa M as depicted in annotated Fig. 9A and annotated Fig. 9A III comprises a side S perpendicular to the first direction FD and second direction going into and out of the page in Fig. 9).
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Regarding Claim 8, the combination of Iwai and Nitta discloses all the limitations of claim 1.
Iwai fails to explicitly disclose the method of manufacturing a semiconductor optical device according to claim 1, wherein the second substrate includes indium phosphide, and the first semiconductor layer includes indium gallium arsenide.
However, Nitta discloses a similar method of manufacturing a semiconductor optical device according to claim 1, wherein the second substrate includes indium phosphide (10, Fig. 1A, para [0026] describes wherein the second substrate 10 includes indium phosphide (InP)), and the first semiconductor layer includes indium gallium arsenide (12, Fig. 1A, para [0026] describes wherein a first semiconductor layer includes indium gallium arsenide (InGaAs)).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Iwai with Nitta to further disclose a method of manufacturing a semiconductor optical device wherein a second substrate includes indium phosphide, and a first semiconductor layer includes indium gallium arsenide in order to provide the advantage of providing a substrate with a high etching selectivity and a first semiconductor layer comprising a material different from the substrate therefore protecting the layers underlying the first semiconductor layer when etching the substrate (Nitta, para [0030]).
Regarding Claim 9, the combination of Iwai and Nitta teaches the method of manufacturing a semiconductor optical device according to claim 8, wherein, in the removing the second substrate (Nitta, 10, Fig. 2A and Fig. 2B), the second substrate is removed by wet etching using hydrochloric acid as an etchant (Nitta, 10, Fig. 2A and Fig. 2B, para [0030] describes wherein the second substrate 10 is removed by wet etching using hydrochloric acid (HCl) as an etchant).
Regarding Claim 10, the combination of Iwai and Nitta discloses all the limitations of claim 1.
Iwai fails to explicitly disclose the method of manufacturing a semiconductor optical device according to claim 1, the method comprising, after the removing the first semiconductor layer, etching the portion of the second semiconductor layer.
However, Nitta teaches a similar method of manufacturing a semiconductor optical device according to claim 1, the method comprising, after the removing the first semiconductor layer (12, Fig. 3C, para [0025] describes a first semiconductor layer 12 wherein upon combining Iwai with Nitta, the first semiconductor layer 22 of Iwai is removed along with the second substrate 11), etching the portion of the second semiconductor layer (14, Fig. 3C, para [0034] describes an etching process performed to remove a portion of a second semiconductor layer 14 underlying protrusions 11 remaining from removing the second substrate 11).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Iwai with Nitta to further disclose a method of manufacturing a semiconductor optical device the method comprising, after the removing the first semiconductor layer, etching the portion of the second semiconductor layer in order to provide the advantage of removing any possible remaining portions of a substrate after a first etching process so as to prevent possible damage to a chip structure and an underlying substrate during the manufacturing process (Nitta, para [0032] and para [0037]).
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Norihiro Iwai et al. (US 2001/0036681 A1; hereinafter “Iwai”) in view of Toshiyuki Nitta (US 2021/0036181 A1; hereinafter “Nitta”) in view of Yonehara Takao et al. (US 2011/0311276 A1; hereinafter “Takao”).
Regarding Claim 3, the combination of Iwai and Nitta discloses all the limitations of claim 2.
Iwai and Nitta fails to explicitly disclose the method of manufacturing a semiconductor optical device according to claim 2, wherein a length between an end of the second substrate and an end of the mesa in the first direction is 1.5 times to 2 times a thickness of the second substrate.
However, Takao teaches a similar method of manufacturing a semiconductor optical device wherein a length between an end of the second substrate and an end of the mesa in the first direction (110, 101 and 100, Fig. 2C and Fig. 3C, para [0065] describes a first group 101 of island-like regions that form a mesa have a length between mesa sections comprising interval sections 110 of about 50 μm to about 200 μm wherein upon dicing a second substrate 100 for transfer of the mesas an end of the mesa in the a first horizontal direction would be approximately 25 μm to about 100 μm as the interval regions 110 are cut in half as shown in Fig. 3C) is 1.5 times to 2 times a thickness of the second substrate (100, 101 and 110, Fig. 2C and Fig. 3C depict wherein upon dicing a second substrate 100 for transfer of the mesas an end of the mesa in the a first horizontal direction would be approximately 25 μm to about 100 μm as the interval regions 110 are cut in half as shown in Fig. 3C and further wherein Nitta discloses in para [0029] a thickness T2 of a second substrate 10 may be approximately 30 μm to about 50 μm wherein a length between an end of the second substrate 100 and an end of the mesa 101 of Takao being 80 μm is 1.5 times to 2 times a thickness of a second substrate of 45 μm as disclosed by Nitta).
Therefore, it would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to combine the teachings of Iwai and Nitta with Takao to further disclose a method of manufacturing a semiconductor optical device the method wherein a length between an end of the second substrate and an end of the mesa in the first direction is 1.5 times to 2 times a thickness of the second substrate in order to provide the well-known advantage of providing an adequate distance between adjacent chips in order to prevent damage to underlying mesa components when dicing a wafer during manufacturing.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDER M MILLER whose telephone number is (571)272-6051. The examiner can normally be reached Monday - Friday 8:00 am - 4:00 pm.
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/ALEXANDER MICHAEL MILLER/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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