DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the following subject matter must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Claim 2, lines 4-8, recites “the first redistribution pattern includes a first portion extending from the first surface to the second surface through the through hole and a second portion connected to the first portion and extending on the first surface, and a first thickness of the first portion located on the first surface is greater than a second thickness of the first portion located on the second surface,” which is not illustrated by the drawings. Specifically (e.g., with respect to Fig. 2): (1) the drawings do not illustrate (and the specification does not identify) the recited first and second portions with reference characters, (2) the drawings do not illustrate the first portion of the first redistribution pattern (e.g., 131) located on both the first surface and the second surface (i.e., opposite surfaces) of an encapsulation layer (e.g., 120), and (3) the drawings do not illustrate the thickness of the first portion located on the first surface is greater than the thickness of the first portion located on the opposite second surface. For example with respect to items (2) and (3) in the preceding sentence, the drawings do not illustrate any portion of the first redistribution pattern (e.g., 131) located on the second (e.g., top) surface of the encapsulation layer (e.g., 120).
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4, line 2, recites “a second redistribution pattern,” which is indefinite because it is unclear whether this is the same “second redistribution pattern” recited in base claim 1. For the purpose of compact prosecution and to better comport with the application and other claim features, this feature will be interpreted as “the second redistribution pattern.”
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-8 is/are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Lee (US20190229101A1).
Regarding claim 1, Lee teaches in Fig. 1/7 a semiconductor package comprising:
a first package (100/310) including a first semiconductor chip (110/311), a first encapsulation layer (120/312) covering a side surface of the first semiconductor chip (110/311), and a first redistribution pattern (130/313) connected to a pad (110p/pad of 311) of the first semiconductor chip (110/311) {[0052, 0056]/[0105, 0108]}; and
a second package (200/320) provided on the first package (100/310) and including a second semiconductor chip (210/321), a second encapsulation layer (220/322) covering the second semiconductor chip (210/321), and a second redistribution pattern (230/323) connected to a pad (210p/pad of 321) of the second semiconductor chip (210/321) {[0062, 0064]/[0105, 0108]},
wherein the first redistribution pattern (130/313) is connected to the second redistribution pattern (230/323) through the first encapsulation layer (120/312) {[0056]/[0108]; ¶0105 and 0110 teach that Fig. 7 may have features similar to those of Fig. 1}.
Regarding claim 2, Lee teaches in Fig. 1 the semiconductor package of claim 1, and Lee further teaches wherein
the first encapsulation layer (120) includes a first surface (bottom surface of 120) and a second surface (top surface of 120) opposite to each other, and a through hole (120H) passing through the first surface (bottom surface of 120) and the second surface (top surface of 120) {[0054]},
the first redistribution pattern (130) includes a first portion (vertical portion of 130 within and above 120H) extending from the first surface (bottom surface of 120) to the second surface (top surface of 120) through the through hole (120H) and a second portion (portion of 130 extending horizontally above 120 and penetrating 240) connected to the first portion (vertical portion of 130 within and above 120H) and extending on (e.g., above) the first surface (bottom surface of 120) {Fig. 1; the second portion may be a part of the first portion}, and
a first thickness (vertical thickness) of the first portion (vertical portion of 130 within and above 120H) located on (e.g., above) the first surface (bottom surface of 120) is greater than a second thickness (vertical thickness) of the first portion (vertical portion of 130 within and above 120H) located on (e.g., above) the second surface (top surface of 120) {i.e., the vertical portion of 130 above 120H and above the top surface of 120 has a smaller vertical thickness than does the vertical portion of 130 within and above 120H} {Fig. 1}.
Regarding claim 3, Lee teaches in Fig. 1 the semiconductor package of claim 1, and Lee further teaches wherein
the first encapsulation layer (120) includes a first surface (bottom surface of 120) and a second surface (top surface of 120) opposite to each other, and a through hole (120H) passing through the first surface (bottom surface of 120) and the second surface (top surface of 120) {[0054]}, and
the first redistribution pattern (130) includes a first conductive layer (portion of 130 extending horizontally above 120 and penetrating 240) disposed on (e.g., above) an inner surface of the through hole (120H) and connected to the second package (200), and a second conductive layer (portion of 130 extending horizontally below 120 and penetrating 140) disposed on the first surface (bottom surface of 120) and connected to the first conductive layer (portion of 130 extending horizontally above 120 and penetrating 240) and the pad (110p) of the first semiconductor chip (110) {Fig. 1}.
Regarding claim 4, as interpreted in view of the indefiniteness rejection, Lee teaches in Fig. 1 the semiconductor package of claim 1, and Lee further teaches wherein
the second package (200) further includes the second redistribution pattern (230) connected to the pad (210p) of the second semiconductor chip (210) {[0056]},
the first encapsulation layer (120) includes a first surface (bottom surface of 120) and a second surface (top surface of 120) opposite to each other, and a through hole (120H) passing through the first surface (bottom surface of 120) and the second surface (top surface of 120) {[0054]}, and
the first redistribution pattern (130) is connected to the pad (210p) of the second semiconductor chip (210) by being directly connected to the second redistribution pattern (230) through the through hole (120H) {[0056]}.
Regarding claim 5, Lee teaches in Fig. 7 the semiconductor package of claim 1, and Lee further teaches further comprising an electromagnetic wave shielding layer (350) covering at least a portion of the first package (310) and at least a portion of the second package (320) {[0111]}.
Regarding claim 6, Lee teaches in Fig. 7 the semiconductor package of claim 5, and Lee further teaches further comprising an outer encapsulation layer (360) covering the first package (310), the second package (320), and the electromagnetic wave shielding layer (350) {[0113]}.
Regarding claim 7, Lee teaches in Fig. 7 the semiconductor package of claim 6, and Lee further teaches further comprising a lower conductive layer (370) extending on the first package (310) and the outer encapsulation layer (360) {[0115]},
wherein the lower conductive layer (370) is electrically connected to the first redistribution pattern (313) of the first package (310) and the electromagnetic wave shielding layer (350) {[0116, 0117]}.
Regarding claim 8, Lee teaches in Fig. 7 the semiconductor package of claim 7, and Lee further teaches further comprising a thermal conductive film (380) provided on the first package (310) and the outer encapsulation layer (360) and covering at least a portion of the lower conductive layer (370) {[0114, 0119]}.
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Jo et al. (US20190267351A1) teaches a semiconductor package includes a first package including a first semiconductor chip, a first encapsulation layer that covers the first semiconductor chip, and a first redistribution pattern connected to pads of the first semiconductor chip and a second package on the first package, the second package including a second semiconductor chip, a second encapsulation layer that covers the second semiconductor chip, and a second redistribution pattern connected to pads of the second semiconductor chip. The first redistribution pattern is connected to the second redistribution pattern through the first encapsulation layer.
Conclusion
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/D.W.W./Examiner, Art Unit 2891
/MATTHEW C LANDAU/Supervisory Patent Examiner, Art Unit 2891