DETAILED ACTION
Specification
1. The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Objections
2. Claims 3, 4, 11 are objected to because of the following informalities:
In claim 3, line 1, “each of the plurality of capacitor” should be changed “each of the plurality of capacitors”
In claim 4, line 1, “each of the plurality of capacitor” should be changed “said each of the plurality of capacitors”
In claim 11, lines 1, 2, “the display device is any one of a mini LED display device, a micro LED display device, and an organic light emitting device” should be changed “the light emitting element is any one of a mini LED device, a micro LED device, and an organic light emitting device” for clarity because “the display device” lacks of antecedent basis.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
3. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
4. Claim(s) 1 – 4, 8, 10, 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Woo et al. (10657892).
With regard to claim 1, Woo et al. disclose a display apparatus (for example, see figs. 2, 7, 9) comprising:
a substrate (10) including a plurality of sub-pixels (PX, figs. 2, 7, 9);
a thin film transistor (for example, see transistor T1, figs. 2, 9) and a light emitting element (OLED, fig. 2) disposed in each of the sub-pixels (PX) over the substrate (10); and
a plurality of capacitors (Cst, Cse) disposed in parallel on a same plane (a top surface plane of the layer 11, fig. 9 functions as a same plane) in the sub-pixel (PX as shown in fig. 9 below).
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With regard to claim 2, Woo et al. disclose the thin film transistor includes; a semiconductor layer (a semiconductor layer C11 including a channel region C11) on the substrate (10); a gate insulating layer (12) on the semiconductor layer (the semiconductor layer C11 including the channel region C11); a gate electrode (G11) on the gate insulating layer (12); an interlayer insulating layer (13) on the gate electrode (G11); and a source electrode (a source region S11 functioning as a source electrode) and a drain electrode (a drain region D11 functioning as a drain electrode) on (on a bottom surface of the interlayer insulating layer (13) or a source electrode (S1, fig. 7) and a drain electrode (D1) on (on a top or a bottom surface of the interlayer insulating layer (13).
With regard to claim 3, Woo et al. disclose each of the plurality of capacitors (Cst, Cse) includes: a first capacitor electrode (Cst11, Cst21) and a second capacitor electrode (Cst12, Cse22); and an insulating layer (13) between the first capacitor electrode (Cst11, Cst21) and the second capacitor electrode (Cst12, Cst22).
With regard to claim 4, Woo et al. disclose each of the plurality of capacitors (Cst, Cse) includes: a first capacitor electrode (Cst11, Cst21) on the gate insulating layer (12); and on (on the bottom or sidewall surface) the interlayer insulting layer (13); and a second capacitor electrode (Cst12, Cse22) on the interlayer insulating layer (13), the first capacitor electrode (Cst11, Cst21) being overlapped with the second capacitor electrode (Cst12, Cse22) with the interlayer insulating layer (13) therebetween.
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With regard to claim 8, Woo et al. disclose the plurality of capacitors (Cst, Cse) are disposed in one side (an upper side) of a region in which the thin film transistor (T1) is formed in the sub-pixel (PX).
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With regard to claim 10, Woo et al. disclose the plurality of capacitors (Cst, Cse) are disposed in both sides (upper and lateral sides) of the portion in which the thin film transistor (T1) is formed in the sub-pixel (PX).
With regard to claim 11, Woo et al. disclose light emitting element (OLED, fig. 2) is an organic light emitting device.
5. Claim(s) 12, 14, 15, 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sun (2005/0275352).
With regard to claim 12, Sun discloses a display apparatus (a display apparatus including array of pixels wherein the pixels having each sub-pixel 130, fig. 7B; paragraph [0007]) including a plurality of sub-pixels (the array of pixels having each sub-pixel 130, fig. 7B; paragraph [0007]), at least one (130) of the sub-pixels comprising:
a thin film transistor (a transistor 20 is connected to a light emitting device 22 wherein the device generally includes thin film transistors "TFT" and light-emitting diodes; for example, see paragraph [0004]. Therefore, the transistor 20 inherently functioning as a thin film transistor) and a light emitting element (22) connected in series to the thin film transistor (20); and
a plurality of capacitors (16, 18) electrically connected to one another in parallel, wherein at least one (16) of the capacitors (16, 18) is electrically disconnected from a first signal line (referred to as “SL1” by examiner’s annotation shown in fig. 7B below; for example, see paragraphs [0035], [0036]) connected to a gate electrode (referred to as “20A1” by examiner’s annotation shown in fig. 7B below) of the thin film transistor (20), and
wherein remaining one (18) of the capacitors (16, 18) are electrically connected to both the first signal line (SL1) connected to the gate electrode (20A1) of the thin film transistor (20) and to a second signal line (referred to as “SL2” by examiner’s annotation shown in fig. 7B below) connected to the source electrode (referred to as “S1” by examiner’s annotation shown in fig. 7B below; wherein a current flow from a high voltage Vdd to a low voltage Vss. Therefore, the wire portion S1 inherently functioning as a source electrode; for example, see paragraph [0008]) of the thin film transistor (20).
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With regard to claim 14, Sun discloses the at least one (16) of the capacitors (16, 18) is defective. (for example, see paragraphs [0035], [0036])
With regard to claim 15, Sun discloses the plurality of capacitors (16, 18) are disposed in one side (for example, a left side of fig. 7B) of a region in which the thin film transistor (20) is formed in the at least one (130) of the sub-pixels.
With regard to claim 17, Sun discloses the plurality of capacitors (16, 18) are disposed in both sides (for example, a lateral side and a top side of fig. 7B functions as both sides) of a region in which the thin film transistor (20) is formed in the at least one (130) of the sub-pixels.
Claim Rejections - 35 USC § 103
6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
7. Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. (10657892) in view of Lee (11335755).
With regard to claim 5, Woo et al. disclose the first capacitor electrode (Cst11, Cst21) is formed of a same material as the gate electrode (G11, G12), but Woo et al. do not clearly disclose the second capacitor electrode is formed of a same material as the drain electrode.
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However, Lee discloses the second capacitor electrode (referred to as “CAP2” by examiner’s annotation shown in fig. 3 below) of the capacitor (CAP) is formed of a same material as the drain electrode (160d). (for example, see column 11, lines 27 – 30, fig. 3).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the Woo et al.’s device to have the second capacitor electrode is formed of a same material as the drain electrode as taught by Lee in order to have the same process reducing a cost of manufacturing and enhance a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
8. Claims 6, 7 are rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. (10657892) in view of Lee (11335755) and further in view of Sun (2005/0275352).
With regard to claims 6, 7, Woo et al. and Lee do not clearly disclose the first capacitor electrode of the plurality of capacitors is connected to a first signal line connected to the gate electrode and the second capacitor electrode of the plurality of capacitors is connected to a second signal line connected to the source electrode wherein at least one of a connection of the first capacitor electrode and the first signal line and a connection of the second capacitor electrode and the second signal line is disconnected in a defective capacitor of the plurality of capacitors.
However, Sun discloses the first capacitor electrode (referred to as “18A1” by examiner’s annotation shown in fig. 7B below) of the plurality of capacitors (18, 16) is connected to a first signal line (referred to as “SL1” by examiner’s annotation shown in fig. 7B below) connected to the gate electrode (referred to as “S20A1” by examiner’s annotation shown in fig. 7B below) and the second capacitor electrode (referred to as “18A2” by examiner’s annotation shown in fig. 7B below) of the plurality of capacitors (18, 16) is connected to a second signal line (referred to as “SL2” by examiner’s annotation shown in fig. 7B below) connected to the source electrode (referred to as “S1” by examiner’s annotation shown in fig. 7B below; wherein a current flow from a high voltage Vdd to a low voltage Vss. Therefore, the wire portion S1 inherently functioning as a source electrode; for example, see paragraph [0008]) wherein a connection (referred to as “16A1” by examiner’s annotation shown in fig. 7B below) of the first capacitor electrode (18A1) and the first signal line (SL1) is disconnected in a defective capacitor (for example, see paragraphs [0035], [0036]) of the plurality of capacitors (18, 16).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the Woo et al. and Lee’s device to have the first capacitor electrode of the plurality of capacitors is connected to a first signal line connected to the gate electrode and the second capacitor electrode of the plurality of capacitors is connected to a second signal line connected to the source electrode wherein at least one of a connection of the first capacitor electrode and the first signal line and a connection of the second capacitor electrode and the second signal line is disconnected in a defective capacitor of the plurality of capacitors as taught by Sun in order to enhance a stability operation of the semiconductor device when a capacitor for a pixel current is open-circuited or short-circuited, as is known to one of ordinary skill in the art.
9. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Woo et al. (10657892) in view of Huang (11018169).
With regard to claim 9, Woo et al. disclose two capacitors (Cst, Cse) are formed by overlapping one first capacitor electrode (Cst11) and two second capacitor electrodes (Cse11, Cse12).
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Woo et al. do not clearly disclose a finger portion is formed in each of the two second capacitor electrodes to interlock with each other.
However, Huang discloses a finger portion (referred to as “E1” by examiner’s annotation shown in fig. 1 below) is formed in each of the two second capacitor electrodes (130, 134) to interlock with each other. (for example, see fig. 1).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the Woo et al.’s device to have the second capacitor electrode is formed of a same material as the drain electrode as taught by Huang in order to enhance a high capacitance of the capacitor of the semiconductor device, as is known to one of ordinary skill in the art.
10. Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Sun (2005/0275352) in view of Woo et al. (10657892).
With regard to claim 13, Sun does not clearly disclose the capacitors are disposed on a same plane in the at least one of the sub-pixels.
However, Woo et al. disclose the plurality of capacitors (Cst, Cse) disposed in parallel on a same plane (a top surface plane of the layer 11, fig. 9 functions as a same plane) in the sub-pixel (PX as shown in fig. 9 below).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the Woo et al.’s device to have the capacitors are disposed on a same plane in the at least one of the sub-pixels as taught by Sun in order enhance a high capacitance of the capacitor of the semiconductor device and reducing a cost of manufacturing, as is known to one of ordinary skill in the art.
11. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Sun (2005/0275352) in view of Huang (11018169).
With regard to claim 16, Sun does not clearly disclose two capacitors of the plurality of capacitors are formed by overlapping one first capacitor electrode and two second capacitor electrodes, and a finger portion is formed in each of the two second capacitor electrodes to interlock with each other.
However, Huang discloses two capacitors (capacitor 130a, 132a, 134a and capacitor 130b, 132b, 134b) of the plurality of capacitors are formed by overlapping one first capacitor electrode (134a) and two second capacitor electrodes (130a, 130b), and a finger portion (referred to as “E1” by examiner’s annotation shown in fig. 1 below) is formed in each of the two second capacitor electrodes to interlock with each other. (for example, see fig. 1).
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Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the Woo et al.’s device to have the second capacitor electrode is formed of a same material as the drain electrode as taught by Huang in order to enhance a high capacitance of the capacitor of the semiconductor device for enhancing a stability operation of the semiconductor device, as is known to one of ordinary skill in the art.
Conclusion
12. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TAN N TRAN whose telephone number is (571) 272 - 1923. The examiner can normally be reached on 8:30-5:00PM.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached on (571) 272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TAN N TRAN/
Primary Examiner, Art Unit 2812