Prosecution Insights
Last updated: August 16, 2026
Application No. 18/528,903

EXPOSURE APPARATUS

Final Rejection §103
Filed
Dec 05, 2023
Priority
Jul 12, 2021 — JP 2021-115325 +1 more
Examiner
WHITESELL, STEVEN H
Art Unit
1759
Tech Center
1700 — Chemical & Materials Engineering
Assignee
NIKON Corporation
OA Round
2 (Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
791 granted / 966 resolved
+16.9% vs TC avg
Moderate +13% lift
Without
With
+12.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
44 currently pending
Career history
1011
Total Applications
across all art units

Statute-Specific Performance

§101
3.2%
-36.8% vs TC avg
§103
50.0%
+10.0% vs TC avg
§102
27.8%
-12.2% vs TC avg
§112
13.5%
-26.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 966 resolved cases

Office Action

§103
DETAILED ACTION Election/Restrictions Claims 18 and 19 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species C, specifically the subject matter of newly presented claim 18 including “the substrate exchanger arranges substrates other than the first substrate having the defect among the plurality of substrates scheduled to be arranged side-by-side on the substrate holder while causing a location where the first substrate was scheduled to be placed to be vacant” is shown Fig. 13 and described in [0096]. Claim 19 depends therefrom. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election filed on October 24, 2025 has been treated as an election without traverse (MPEP § 818.01(a)). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 3-5, 7, and 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Lai et al. [US 2019/0369499, cited by the applicant] in view of Yamagishi et al. [US 2019/0385873, newly cited] and Rossing et al. [US 2003/0211297, previously cited]. For claim 1, Lai teaches an exposure apparatus (see Fig. 1A) comprising: a substrate holder (202) configured to simultaneously hold a plurality of substrates (210) side-by-side (see Figs. 1A and 2A); an exposure module (107) that projects pattern light a substrate held by the substrate holder; a substrate exchanger that is configured to place, onto the substrate holder, the plurality of substrates scheduled to be arranged side-by-side on the substrate holder (robot handler, see [0034]-[0035]); and a processor (190) configured to determine a plurality of substrates to be arranged on the substrate holder from among the plurality of substrates scheduled to be arranged side-by-side on the substrate holder, based on a predetermined handling method (placing substrates side-by-side on the carrier 202 with the robot handler, see [0034]-[0035]), wherein the exposure module performs projection exposure on the plurality of substrates that the processor determined to be arranged side-by-side on the substrate holder in a state where the plurality of substrates are arranged side-by-side on the substrate holder (patterning the plurality of substrates, see Fig. 2C). Lai fails to teach an exposure module that includes a spatial light modulator and projects pattern light generated by the spatial light modulator onto a substrate held by the substrate holder; a substrate exchanger that is configured to simultaneously place, onto the substrate holder; a processor configured to, in response to a determination that the plurality of substrates scheduled to be arranged on the substrate holder include a first substrate having a defect, determine a plurality of substrates to be arranged on the substrate holder from among the plurality of substrates scheduled to be arranged side-by-side on the substrate holder, based on a predetermined handling method for the first substrate, wherein the substrate exchanger simultaneously places, onto the substrate holder, the plurality of substrates that the processor determined to be arranged side-by-side on the substrate holder, the substrate exchanger simultaneously unloads, from the substrate holder, the plurality of substrates that have been exposed by the exposure module. Yamagishi teaches a substrate exchanger (transfer mechanism 15, see Fig. 1) that is configured to simultaneously place, onto the substrate holder (four wafers W are delivered simultaneously in a collective manner between the substrate transfer mechanism 15 and the mounting table 22, see [0030] and [0053]); wherein the substrate exchanger simultaneously places, onto the substrate holder, the plurality of substrates that the processor determined to be arranged side-by-side on the substrate holder (see [0030] and [0053]), and the substrate exchanger simultaneously unloads, from the substrate holder, the plurality of substrates that have been processed by a exposure module (the first and second substrate holding parts 161 and 162 enter the processing container 20 to receive the four wafers W in a simultaneous manner, see [0059]). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to provide the multi-wafer transfer system as taught by Yamagishi in the multi-wafer exposure apparatus have a multi-wafer stage as taught by Lai in order to reduce transfer time and increase throughput. Rossing teaches an exposure apparatus (see Fig. 2) comprising: an exposure module that includes a spatial light modulator (programmable mirror array, see [0027]) and projects pattern light generated by the spatial light modulator onto a substrate held by a substrate holder (Wx); and a processor (computer controller system, see [0043]) configured to, in response to a determination that the plurality of substrates scheduled to be arranged on the substrate holder include a first substrate having a defect (defective substrate, see [0045]), determine a plurality of substrates to be arranged on the substrate holder from among the plurality of substrates scheduled to be arranged on the substrate holder, based on a predetermined handling method for the first substrate (problems may be solved by different methods using administration system, see [0045]). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to provide both A) the spatial light modulator type exposure module and B) processor control of wafer arrangement and process control as taught by Rossing in the multi-wafer exposure as taught by Lai, because A) the spatial light modulator-type exposure module is a well-known maskless lithography system that would allow for larger exposure areas for increasing throughput and B) Rossing identifies that defects present during many stages of semiconductor processing and cannot always be accommodated through simple removal of wafer because wafer stages have different characteristics for each of substrate, accordingly different processing may be performed in order to retain the relationship between the stage and wafer in order to maintain performance quality. For claim 3, in the combination, Lai teaches a substrate holder (202) configured to simultaneously hold a plurality of substrates (210) side-by-side (see Figs. 1A and 2A) and Rossing teaches the processor is configured to determine a substrate other than the first substrate among the plurality of substrates scheduled to be arranged on the substrate holder as the plurality of substrates to be arranged on the substrate holder (the defective substrate may be taken out and replaced by a dummy substrate, see [0045]). For claim 4, in the combination, Lai teaches a substrate holder (202) configured to simultaneously hold a plurality of substrates (210) side-by-side (see Figs. 1A and 2A) and Rossing teaches a processor is configured to determine a substrate other than the first substrate among the plurality of substrates scheduled to be arranged on the substrate holder and a second substrate other than the plurality of substrates scheduled to be arranged on the substrate holder as the plurality of substrates to be arranged on the substrate holder (the defective substrate may be taken out and replaced by a dummy substrate, see [0045]). For claim 5, in the combination, Rossing teaches the second substrate is arranged at a position where the first substrate was scheduled to be arranged on the substrate holder (the defective substrate may be taken out and replaced by a dummy substrate, see [0045]). For claim 7, in the combination, Lai teaches an input device that allows a user to input selection (input, see [0030]) and Rossing teaches an input device that allows a user to input selection of the predetermined handling method for the first substrate (user identifies in advance via the computer system, see [0043]). For claim 15, in the combination, Lai teaches the substrate exchanger is configured to arrange the substrate (robot handler, see [0034]-[0035]), and Rossing teaches arranging the substrate other than the first substrate having the defect on the substrate holder (the defective substrate may be taken out and replaced by a dummy substrate, see [0045]). For claim 16, in the combination, Lai teaches a substrate holder (202) configured to simultaneously hold a plurality of substrates (210) side-by-side (see Figs. 1A and 2A) and Rossing teaches input device allows the user to select whether or not to continue exposure processing in response to the determination that the plurality of substrates scheduled to be arranged on the substrate holder include the first substrate having the defect (user identifies in advance via the computer system, see [0043], the user interaction with the system allows for this functional action). For claim 17, in the combination, Yamagishi teaches the substrate exchanger is configured to arrange the plurality of substrates on the plurality of substrates scheduled to be arranged side-by-side on the substrate holder (see [0030] and [0053]) and Rossing teaches the substrate exchanger is configured to, in response to the determination that the plurality of substrates scheduled to be arranged on the substrate holder include the first substrate having the defect, arrange the plurality of substrates on the substrate holder based on the predetermined handling method (a handling arm or arms of the lithographic apparatus 1' can be programmed to select the appropriate substrate from a storage location in any order necessary to maintain a relationship between the holders and the substrates, see [0043]). Claims 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Ozaki et al. [US 2009/0201482, newly cited] in view of Ikuto et al. [JP 2008-116646, translation and foreign reference have been provided by the Applicant] and Lin et al. [US 2015/0077731, previously cited]. For claims 11 and 12, Ozaki teaches a exposure apparatus (see Figs. 1 and 2) comprising: a first exposure module (one of the exposure heard 166, see Figs. 2 and 3B) that includes a first spatial light modulator (50, see [0172]) and projects pattern light generated by the first spatial light modulator onto a substrate (150); and a controller (see Fig. 15) configured to generate drawing data for causing the first spatial light modulator to generate respective patterns to be exposed on a substrate actually arranged on a substrate holder (see [0204]), wherein the first spatial modulator includes a plurality of first elements (62, see Fig. 6-7B) that generate the pattern light in accordance with the drawing data, and a second exposure module (another of the exposure heard 166, see Figs. 2 and 3B) that is different from the first exposure module and includes a second spatial light modulator including a plurality of second elements, wherein the second exposure module is arranged so that light from the first spatial light modulator and light from the second spatial light modulator are projected onto different regions (see Figs. 3A-3B), and the controller is configured to, in response to a determination that the first spatial light modulator includes a defective element, which cannot be driven in accordance with the drawing data, among a first plurality of first elements, change the drawing data so that the first plurality of first elements of the first spatial light modulator do not generate the pattern light, and change the drawing data into a changed drawing data so that a second plurality of first elements generate the pattern light that is scheduled to be generated by the first plurality of first elements (micromirror rows which do not have defects may be used instead of micromirror rows which have defects, see Figs. 16A and 16B and [0213]-[0214]) and control a position of the substrate holder so that the pattern light generated by the second plurality of first elements is projected onto a first substrate onto which the pattern light was scheduled to be projected by the first plurality of first elements (stage controlled based on the DMD pattern, see [0211] and [0212]). Ozaki fails to teach that the controller is configured to control of the first exposure module so that the pattern light generated by the first spatial light modulator is not projected, and the change of the pattern generated is from the first exposure module to a second exposure module instead of between portions of the first spatial light modulator in the first exposure module. Ikuto teaches the controller is configured to control of the first exposure module so that the pattern light generated by the first exposure module is not projected (shielding due to the abnormality in optical head 32b, see [0055]), and a change of the pattern generated is from the first exposure module to a second exposure module (optical head 32a completes the exposure, see [0056]). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to provide the defect control as taught by Ikuto in the defect control as taught by Ozaki in order to accommodate a defects of the entire spatial light modulator that cannot be corrected by simply changing the location on the spatial light modulator that is illuminated. Lous fails to teach respective patterns to be exposed on a plurality of substrates actually arranged on a substrate holder. Lin teaches the first spatial light modulator to generate respective patterns to be exposed on a plurality of substrates actually arranged on a substrate holder (pattern generation on PG 106 for each of the column assemblies for the plurality of wafer 402 on stage 504, see [0017]-[0021], [0051], and Figs. 1A, 5A, and 5B). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to provide the plurality of substrates actually arranged on a substrate holder as taught by Lin in the exposure apparatus as taught by Ozaki in order to increase the throughput of the apparatus by exposing a plurality of substrates simultaneously. Claims 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Lai in view of Yamagishi and Rossing as applied to claim 1 above, and further in view of Ozaki and Ikuto. For claims 8 and 9, Lai teaches the exposure module is provided in a plurality, and the plurality of exposure modules include a first exposure module and a second exposure module different from the first exposure module (plurality of optical modules 107, see Fig. 1), but fails to teach the processor is further configured to, in response to a determination that the spatial light modulator includes a defective element that cannot be driven in accordance with drawing data, change the drawing data so that the spatial light modulator including the defective element does not generate pattern light, or control the exposure module so that the pattern light generated by the spatial light modulator including the defective element is not projected and change the drawing data so that the second exposure module generates pattern light that is scheduled to be generated by the first exposure module; and control a position of the substrate holder so that the pattern light generated by the second exposure module is projected onto a substrate onto which the pattern light is scheduled to be projected by the first exposure module. Ozaki teaches the processor is configured to, in response to a determination that the first spatial light modulator includes a defective element, which cannot be driven in accordance with the drawing data, among a first plurality of first elements, change the drawing data so that the first plurality of first elements of the first spatial light modulator do not generate the pattern light, and change the drawing data into a changed drawing data so that a second plurality of first elements generate the pattern light that is scheduled to be generated by the first plurality of first elements (micromirror rows which do not have defects may be used instead of micromirror rows which have defects, see Figs. 16A and 16B and [0213]-[0214]) and control a position of the substrate holder so that the pattern light generated by the second plurality of first elements is projected onto a first substrate onto which the pattern light was scheduled to be projected by the first plurality of first elements (stage controlled based on the DMD pattern, see [0211] and [0212]). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to provide the control of a light pattern of maskless exposure as taught by Ozaki in the maskless exposure system as taught by Lai in order to reduce error in the exposure of the pattern on the substrate. Ikuto teaches the controller is configured to control of the first exposure module so that the pattern light generated by the first exposure module is not projected (shielding due to the abnormality in optical head 32b, see [0055]), and a change of the pattern generated is from the first exposure module to a second exposure module (optical head 32a completes the exposure, see [0056]). It would have been obvious to one of ordinary skill in the art prior to the effective filing date of the claimed invention to provide the defect control as taught by Ikuto in the defect control as taught by Ozaki and Lai in order to accommodate a defects of the entire spatial light modulator that cannot be corrected by simply changing the location of the spatial light modulator that is illuminated. Response to Arguments Applicant’s arguments with respect to claims 1 and 11 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Steven H Whitesell whose telephone number is (571)270-3942. The examiner can normally be reached Mon - Fri 9:00 AM - 5:30 PM (MST). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Curt Mayes can be reached at 571-272-1234. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Steven H Whitesell/Primary Examiner, Art Unit 1759
Read full office action

Prosecution Timeline

Dec 05, 2023
Application Filed
Nov 19, 2025
Non-Final Rejection mailed — §103
May 12, 2026
Response Filed
Jul 22, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
95%
With Interview (+12.9%)
2y 7m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 966 resolved cases by this examiner. Grant probability derived from career allowance rate.

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