Prosecution Insights
Last updated: October 23, 2026
Application No. 18/529,154

LIGHT EMITTING DISPLAY APPARATUS

Final Rejection §103
Filed
Dec 05, 2023
Priority
Dec 15, 2022 — RE 10-2022-0176192
Examiner
GONZALES, VICENTE ROLANDO
Art Unit
2899
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
2 (Final)
100%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
3 granted / 3 resolved
+32.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
24 currently pending
Career history
38
Total Applications
across all art units

Statute-Specific Performance

§103
57.0%
+17.0% vs TC avg
§102
27.0%
-13.0% vs TC avg
§112
14.0%
-26.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 3 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (JP 2021110932 A, see attached machine translation for paragraph citations) in view of Park et al. (US Patent Pub 20220208925 A1). Regarding Claim 1, Lee teaches a light emitting display apparatus, comprising: a subpixel including a light emission area and a circuit area, which are disposed to be adjacent to each other in a first direction (Fig. 3, Subpixels SP1, SP2, SP3, and SP4 have an emission area EA and a circuit area CA adjacent to each other in a first direction); a driving transistor provided in the circuit area of the subpixel, wherein the driving transistor includes an active layer and a gate electrode (Fig. 3 shows driving transistor DT located in circuit area CA. Fig. 10 teaches driving transistor DT includes an active area ACT0 and gate electrode G0); a light emitting element provided in the light emission area of the subpixel, wherein the light emitting element includes an anode electrode, a light emitting layer and a cathode electrode (paragraph 0053 (see attached machine translation) teaches light emitting element OLED includes an anode electrode AND, a light emitting layer, and a cathode electrode CAT. Paragraph 0078 teaches that OLED is located in the emission area EA); a pixel power line for supplying a pixel power source to the driving transistor of the subpixel (Fig. 8, pixel power line VDDV); a pixel power connection pattern connecting the pixel power line to the driving transistor of the subpixel (Fig. 10, pixel power connection pattern (metalized layer of VDDH)); a reference line to which a reference voltage is for being applied (Fig 3, reference line RL); a switching transistor located between the driving transistor and the reference line (Fig. 2, switching transistor ST2 located between the driving transistor DT and the reference line RL); and a welding contact portion provided in the circuit area, wherein the welding contact portion is configured to electrically connect an anode electrode AND of another light emitting element to the driving transistor by irradiating a laser (Fig. 3 and 9, welding contact portion (portion of RBL demonstrated in Fig. 14 as being irradiated with a laser beam) located in CA. Paragraph 0145 (see attached machine translation) teaches RBL electrically connects the reference voltage line RL to adjacent subpixels. Paragraph 0056 teaches RL is connected to ST2, therefore RBL is electrically connected to VDDV. It follows then that RBL electrically connects the anode electrode of another light emitting element to the driving transistor DT), and wherein the pixel power connection pattern includes a first laser cutting area and is made of a same material on a same layer as the active layer of the driving transistor (Fig. 14 and 20 demonstrates the pixel power connection pattern (metalized portion of VDDH) includes the first laser cutting area. Fig. 20 teaches the second pixel power connection pattern is formed of the same material on the same layer as the active layer of the driving transistor). Lee fails to specifically teach the device wherein the welding contact portion is configured to electrically connect an anode electrode of another light emitting element to the driving transistor without using the switching transistor as an electrical connection path between the anode electrode of the another light emitting element and the driving transistor. However, Park teaches a light emitting display device wherein the welding contact portion is configured to electrically connect an anode electrode of another light emitting element to the driving transistor without using the switching transistor as an electrical connection path between the anode electrode of the another light emitting element and the driving transistor (Park, figs. 4 and 5B, and paragraph 0139 teaches the welding contact portion (labeled welding in Fig. 4 and 176 in fig. 5B) that connects an anode electrode 171b of another electrode to the driving transistor Tdr without using the switching transistor Tsw1/Tsw2 as an electrical connection path between the anode electrode 171b of the another light emitting element and the driving transistor Tdr). It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Park into the method of Lee by forming the light emitting display device wherein the welding contact portion is configured to electrically connect an anode electrode of another light emitting element to the driving transistor without using the switching transistor as an electrical connection path between the anode electrode of the another light emitting element and the driving transistor. The ordinary artisan would have been motivated to modify Lee in the manner set forth above for at least the purpose of allowing for two pixels to be driven independently when the pixel is not prepared, and improving the aspect ratio of the pixel (Park, paragraphs 0215-0216). With respect to the welding contact portion being irradiated by a laser, this is a product by process limitation. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985) (citations omitted) (Claim was directed to a novolac color developer. The process of making the developer was allowed. The difference between the inventive process and the prior art was the addition of metal oxide and carboxylic acid as separate ingredients instead of adding the more expensive pre-reacted metal carboxylate. The product-by-process claim was rejected because the end product, in both the prior art and the allowed process, ends up containing metal carboxylate. The fact that the metal carboxylate is not directly added, but is instead produced in-situ does not change the end product. Regarding Claim 2, Lee in view of Park teaches the light emitting display apparatus of claim 1, wherein the pixel power connection pattern includes: a first pixel power connection pattern electrically connected to the pixel power line and extended in a second direction between the light emission area and the driving transistor (Lee, Fig. 8, First pixel power connection pattern VDDH is electrically connected to VDDV and extends in a second direction (VDDV extends in a first direction vertically, VDDH extends in a second direction horizontally). Fig. 1 shows an array of pixels, each containing subpixels. VDDH extends between the light emission area and the driving transistor of a lower subpixel in the array); and a second pixel power connection pattern connecting the first pixel power connection pattern to the driving transistor (Lee, Figs. 19 and 20, metalized layer of VDDH. Fig. 11 and paragraph 0179 (see attached machine translation) teaches that a metalized layer is deposited on the semiconductor layers of VDDH). The metalized layer of VDDH is the second pixel power connection pattern). Regarding Claim 3, Lee in view of Park teaches the light emitting display apparatus of claim 2, wherein the second pixel power connection pattern includes the first laser cutting area, and is made of the same material on the same layer as the active layer of the driving transistor (Lee, Fig. 10, second pixel power connection pattern (Figs. 19 and 20, metalized layer of VDDH). Fig. 14 and 20 demonstrate the second pixel power connection pattern includes the first laser cutting area. Fig. 20 teaches the second pixel power connection pattern is formed of the same material on the same layer as the active layer of the driving transistor). Regarding Claim 4, Lee in view of Park teaches the light emitting display apparatus of claim 2, wherein the second pixel power connection pattern is extended from the active layer of the driving transistor and is electrically connected to the first pixel power connection pattern through a first contact hole (Lee, Figs. 3 and 10, second pixel power connection pattern (see Figs. 19 and 20, metalized layer of VDDH) extended from active layer of the driving transistor DT (see fig. 10) and electrically connected to the first pixel power connection pattern VDDH through a first contact hole EH1). Regarding Claim 5, Lee in view of Park teaches the light emitting display apparatus of claim 2, wherein the second pixel power connection pattern does not overlap the anode electrode of the light emitting element (Fig. 3 and 10, second pixel power connection pattern (Lee, Figs. 19 and 20, metalized layer of VDDH) does not overlap the anode electrode AND of the light emitting element). Regarding Claim 6, Lee in view of Park teaches the light emitting display apparatus of claim 2, wherein the first pixel power connection pattern is formed of a same material on a same layer as the gate electrode of the driving transistor (Lee, Fig. 20 teaches the first pixel power connection pattern VDDH and the gate electrode G0 of the DT (see Fig. 10) are formed of the same material and on the same layer SEM 6). Regarding Claim 7, Lee in view of Park teaches the light emitting display apparatus of claim 1, wherein the active layer includes a first active layer and a second active layer provided on the first active layer, and the first active layer includes a semiconductor material and the second active layer includes a conductive material (Lee, Paragraph 0178 (see attached machine translation) teaches active layer includes a semiconductor layer ACT0 that can be formed of a semiconductor material, and the second active layer is the metal layer deposited on top, which is conductive). Regarding Claim 8, Lee in view of Park teaches the light emitting display apparatus of claim 7, wherein the first active layer includes indium gallium zinc oxide (IGZO), and the second active layer includes molybdenum titanium (MoTi) (Lee, Paragraph 0178 (see attached machine translation) teaches the first active layer can be formed of IGZO, and the second active layer can be a metal layer deposited onto the first active layer and formed of MoTi). Regarding Claim 9, Lee in view of Park teaches the light emitting display apparatus of claim 1, further comprising: a driving contact portion provided in the circuit area, wherein the driving contact portion is configured to electrically connect the anode electrode of the light emitting element to the driving transistor (Lee, Paragraph 102 (see attached machine translation) teaches the anode electrode AND is connected to the driving transistor DT through driving contact portion CH1), wherein the anode electrode of the another light emitting element is provided in an adjacent subpixel disposed to be adjacent to the subpixel (Lee, Fig. 9 and paragraph 0161 (see attached machine translation) teaches the anode electrode AND of another light emitting element provided in an adjacent subpixel disposed to be adjacent to the subpixel), and wherein the driving transistor is provided between the first laser cutting area and at least one of the driving contact portion or the welding contact portion (Lee, Figs. 3 and 10, driving transistor is provided between the first laser cutting area (provided to the left of the DT) and driving contact portion CH1). Regarding Claim 10, Lee in view of Park teaches the light emitting display apparatus of claim 9, wherein the driving contact portion and the welding contact portion are disposed to be adjacent to each other in a second direction (Lee, Fig. 3, driving contact portion CH1 and welding contact portion (portion of RBL demonstrated in Fig. 14 as being irradiated with a laser beam) are adjacent to each other in a second direction (the y direction)). Regarding Claim 11, Lee in view of Park teaches the light emitting display apparatus of claim 9, further comprising: a reference connection pattern connected to the reference line to transfer the reference voltage to the driving transistor of the subpixel (Lee, Fig. 3, reference connection pattern RBL), wherein the reference connection pattern includes a second laser cutting area and is made of the same material on the same layer as the active layer of the driving transistor (Lee, Fig. 20 teaches RBL is a metalized portion of the semiconductor layer. ACT0 is a semiconductor layer, therefore they are formed of the same material and same layer. Fig 14 demonstrates the second laser cutting area located on RBL). Regarding Claim 12, Lee in view of Park teaches the light emitting display apparatus of claim 11, wherein at least one of the driving contact portion or the welding contact portion is disposed between the second laser cutting area and the driving transistor (Lee, Fig. 13, welding contact portion (portion of RBL demonstrated in Fig. 14 as being irradiated with a laser beam) disposed between the second laser cutting area (disposed on BLa) and the driving transistor DT (displayed in Fig. 3, present but not labeled in Fig. 13)). Regarding claim 13, Lee in view of Park teaches the light emitting display apparatus of claim 11, wherein the driving contact portion includes a first connection electrode electrically connected to the driving transistor (Lee, Fig. 10, first connection electrode D0), the welding contact portion includes a second connection electrode provided on a layer different from the first connection electrode and electrically connected to the driving transistor (Lee, Fig. 9, second connection electrode DL1), and the reference connection pattern is electrically connected to the active layer of the driving transistor through at least one of the first connection electrode or the second connection electrode (Lee, Paragraph 0070 (see attached machine translation) teaches reference line RL is electrically connected to the reference connection pattern RBL. Paragraph 0188 teaches RBL is electrically connected to DT, and is therefore electrically connected through DL1). Regarding Claim 14, Lee in view of Park teaches the light emitting display apparatus of claim 9, further comprising: a data line to which a data voltage is for being applied (Lee, Fig. 3, data line DL1. Paragraph 0029 (see attached machine translation) teaches DL1 supplies a data voltage); and a data connection pattern connected to the data line to transfer the data voltage to the driving transistor of the subpixel (Lee, Figs. 3 and 4, teaches DL1 is electrically connected to the driving transistor DT through data a connection pattern ACT2), wherein the data connection pattern includes a third laser cutting area and is made of the same material on the same layer as the active layer of the driving transistor (Lee, Fig. 4, region of data connection pattern ACT2 located between STH2 and G2 is the third laser cutting area and is made of the same material on the same layer as the active layer of the driving transistor). Regarding Claim 15, Lee in view of Park teaches the light emitting display apparatus of claim 14, wherein at least one of the driving contact portion or the welding contact portion is disposed between the third laser cutting area and the driving transistor (Lee, Fig. 3, driving contact portion CH1 disposed between third laser cutting area (located in ST1) and driving transistor DT). Regarding Claim 16, Lee in view of Park teaches the light emitting display apparatus of claim 14, wherein the data connection pattern is electrically connected to the gate electrode of the driving transistor at one end through a second contact hole, and is electrically connected to the data line at the other end through a third contact hole (Lee, Figs. 3 and 4, Data connection pattern ACT2 electrically connected to gate electrode through STH2 and connected to the data line through RH2). Regarding Claim 17, Lee in view of Park teaches the light emitting display apparatus of claim 13, further comprising a light shielding layer provided below the first connection electrode, wherein the second connection electrode is provided on a same layer as the light shielding layer (Lee, figs. 4 and 5, light shielding layer LS provided below first connection electrode D0 and on a same layer as the second connection electrode DL1). Regarding Claim 18, Lee in view of Park teaches the light emitting display apparatus of claim 17, wherein the second connection electrode is extended from the light shielding layer and formed as one layer (Park, figs. 6 and 7 and paragraph 0059 teaches that second connection electrode 174 is extended from light shielding layer 120 and formed as one layer). Regarding Claim 19, Lee in view of Park teaches the light emitting display apparatus of claim 13, wherein the welding contact portion includes a welding contact hole passing a passivation layer, and the second connection electrode is provided to overlap the welding contact hole (Park, figs. 6 and 7 and paragraph 134 teach welding contact portion 176 includes a welding contact hole RCH/DCH (paragraph 0134 teaches RCH and DCH may be electrically connected to each other and connect the repair line to the second connection electrode 174, therefore both RCH and DCH can be interpreted together as a welding contact hole) passing a passivation layer 149, and the second connection electrode 174 is provided to overlap the welding contact hole RCH/DCH). Claim(s) 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of Park as applied to claims 1-19 above, and further in view of Lee et al. (US Patent Pub 20220199681 A1, hereafter referred to as Lee 681). Regarding Claim 20, Park in view of Lee teaches the light emitting display apparatus of claim 1. Park in view of Lee fail to specifically teach the light emitting display apparatus wherein the subpixel further includes a light extraction unit overlapping the light emission area, and the light extraction unit has a curved or uneven shape. However, Lee 681 teaches a light emitting display device wherein the subpixel further includes a light extraction unit overlapping the light emission area, and the light extraction unit has a curved or uneven shape (Lee 681, fig. 3, light extraction unit 180 overlapping the light emission area OA. The light extraction unit 180 has a curved shape with concave portions (see paragraph 0085)). It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Lee 681 into the method of Park in view of Lee by forming the light emitting display device wherein the subpixel further includes a light extraction unit overlapping the light emission area, and the light extraction unit has a curved or uneven shape. The ordinary artisan would have been motivated to modify Park in view of Lee in the manner set forth above for at least the purpose of improving the light extraction efficiency, leading to enhanced luminance and reduced power consumption (Lee 681, paragraph 0083). Response to Arguments Applicant’s arguments with respect to claim(s) 1-16 have been considered but are moot in view of the new grounds of rejection as applied above. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICENTE R GONZALES whose telephone number is (571)272-3365. The examiner can normally be reached Monday - Friday 7:30 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached at (571) 272-2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /V.R.G./Examiner, Art Unit 2899 /JOHN M PARKER/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Dec 05, 2023
Application Filed
May 04, 2026
Non-Final Rejection mailed — §103
Jul 24, 2026
Response Filed
Oct 09, 2026
Final Rejection mailed — §103 (current)

Precedent Cases

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Patent 12740486
ELECTRONIC DEVICE INCLUDING STACKED SEMICONDUCTOR CHIPS AND METHOD OF MANUFACTURING THE SAME
2y 11m to grant Granted Sep 15, 2026
Study what changed to get past this examiner. Based on 1 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 9m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 3 resolved cases by this examiner. Grant probability derived from career allowance rate.

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