The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA
DETAILED ACTION
Election/Restrictions
Applicant’s election of method claims in the reply filed on 06/03/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
The claimed limitation of “a second process of forming a first metal layer on the semiconductor layer”, as recited in claim 1, is unclear as to the structural relationship between the reconductor layer and the optical detection element”.
The claimed limitation of “a third process of carrying out a heat treatment so that the semiconductor layer is polycrystallized and the semiconductor layer and the first metal layer are interchanged with each other, thereby forming the first metal layer on the support and forming a polycrystalline photoelectric conversion layer on the first metal layer”, as recited in claim 1, is unclear because the heat treatment changed the molecular structure of the first metal layer such that the metal layer which is now present and wherein polycrystalline photoelectric conversion layer which is now formed on the metal layer, is not the “first metal layer”.
Furthermore, applicants are respectfully requested to provide the scientific documentation to support the allegations that “a third process of carrying out a heat treatment so that the semiconductor layer is polycrystallized and the semiconductor layer and the first metal layer are interchanged with each other, thereby forming the first metal layer on the support and forming a polycrystalline photoelectric conversion layer on the first metal layer”, as recited in claim 1.
The claimed limitation of “a plurality of the second metal layers which are two-dimensionally arranged are formed as the second metal layer”, as recited in claim 7, is unclear because the plurality of the second metal layers are three-dimensionally arranged.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-8 are rejected under 35 U.S.C. 103 as being unpatentable over Hirose et al. (2010/0154874) in view of Van Gestel et al. (Aluminum-induced crystallization for thin-film polycrystalline silicon solar cells: Achievements and perspective “Solar Energy Materials & Solar Cells 119 (2013) 261–270”) and Niigaki et al. (2008/0042563).Regarding claim 1, Hirose et al. teach in figures 1-3 and related text a method of manufacturing an optical detection element, comprising:
a second process of forming a first metal layer 107 on the semiconductor layer 105;
a third process of carrying out a heat treatment so that the semiconductor layer is polycrystallized and the semiconductor layer and the first metal layer are interchanged with each other, thereby forming the first metal layer on the support and forming a polycrystalline photoelectric conversion layer 112/114/115 on the first metal layer 107 (see figurer 3A); and
a fourth process of forming a second metal layer 119 on the photoelectric conversion layer 112/114/115.
Hirose et al. do not teach a first process of forming an amorphous semiconductor layer on a support, and do not explicitly state that in the fourth process, the second metal layer is formed so that a width of the second metal layer in a first direction orthogonal to a thickness direction of the second metal layer becomes a width with which surface plasmon resonance occurs due to incidence of light in a predetermined wavelength region.
Van Gestel et al. teach in figures A-F and related text a first process of forming an amorphous semiconductor layer “a-Si” on a support “Substrate” and a method of metal induced crystallization (MIC) wherein a heat treatment is carried out so that the semiconductor layer is polycrystallized and the semiconductor layer and the first metal layer are interchanged with each other, thereby forming the first metal layer on the support and forming a polycrystalline photoelectric conversion layer on the first metal layer.
Niigaki et al., teach in figure 3 a second metal layer AA2 is formed so that a width of the second metal layer in a first direction orthogonal to a thickness direction of the second metal layer becomes a width with which surface plasmon resonance occurs due to incidence of light in a predetermined wavelength region.
Niigaki et al., Hirose et al. and Van Gestel et al. are analogous art because they are directed to polycrystalline photoelectric conversion layers and one of ordinary skill in the art would have had a reasonable expectation of success to modify Hirose et al. because they are from the same field of endeavor.It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the polycrystalline photoelectric conversion layer, as taught by Van Gestel et al., and to form the second metal layer so that a width of the second metal layer in a first direction orthogonal to a thickness direction of the second metal layer becomes a width with which surface plasmon resonance occurs due to incidence of light in a predetermined wavelength region, as taught by Niigaki et al., in Hirose et al.’s device, in order to simplify the processing steps of making the device (by using a conventional MIC process), and in order to operate the device in its intended use, respectively.
Regarding claim 2, Hirose et al. teach in figures 1-3 and related text that in the first process, the semiconductor layer is formed by a material containing any one among Ge, Si, Si-Ge, and Ge-Sn.
Regarding claim 3, Hirose et al. teach in figures 1-3 and related text that in the fourth process, the second metal layer is formed so that the width of the second metal layer in the first direction becomes a width with which surface plasmon resonance occurs due to incidence of light with a wavelength of 0.9 m to 1.8 m.
Regarding claim 4, Hirose et al. teach in figures 1-3 and related text that in the fourth process, the second metal layer is formed to extend in a long shape with a second direction orthogonal to both the thickness direction and the first direction set as a longitudinal direction.
Regarding claim 5, Hirose et al. teach in figures 1-3 and related text that in the fourth process, as the second metal layer, a plurality of second metal layers arranged in the first direction are formed.
Regarding claim 6, Hirose et al. do not explicitly state that in the fourth process, the second metal layer is formed so that a width of the second metal layer in a second direction orthogonal to both the thickness direction and the first direction becomes equal to a width of the second metal layer in the first direction.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to form the second metal layer so that a width of the second metal layer in a second direction orthogonal to both the thickness direction and the first direction becomes equal to a width of the second metal layer in the first direction in prior art’s device, in order to simplify the processing steps of making the device.
Regarding claim 7, Hirose et al. teach in figures 1-3 and related text that in the fourth process, a plurality of the second metal layers which are two-dimensionally arranged are formed as the second metal layer.
Regarding claim 8, Hirose et al. do not explicitly state that in the third process, the heat treatment is carried out at a temperature of 250°C to 500°C.
It would have been obvious to a person of ordinary skill in the art, before the effective filling date of the claimed invention, to carry out the heat treatment at a temperature of 250°C to 500°C in prior art’s device, in order to plasmon resonance in the device.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ORI NADAV whose telephone number is 571-272-1660. The examiner can normally be reached between the hours of 7 AM to 4 PM (Eastern Standard Time) Monday through Friday.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached on 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
O.N. /ORI NADAV/
6/23/2026 PRIMARY EXAMINER
TECHNOLOGY CENTER 2800