Prosecution Insights
Last updated: May 29, 2026
Application No. 18/530,211

STRUCTURE HAVING MULTI-DIELECTRIC LAYERS

Final Rejection §102§103
Filed
Dec 06, 2023
Examiner
WHALEN, DANIEL B
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mikro Mesa Technology Co. Ltd.
OA Round
2 (Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
805 granted / 1005 resolved
+12.1% vs TC avg
Strong +16% interview lift
Without
With
+15.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
39 currently pending
Career history
1048
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
72.8%
+32.8% vs TC avg
§102
16.4%
-23.6% vs TC avg
§112
7.8%
-32.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1005 resolved cases

Office Action

§102 §103
DETAILED ACTION Terminal Disclaimer The terminal disclaimer filed on 03/24/2026 disclaiming the terminal portion of any patent granted on this application which would extend beyond the expiration date of any patent granted on Application No. 18/530,238 and Application No. 18/530,212 has been reviewed and is accepted. The terminal disclaimer has been recorded. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2, 4, 6-7, 16-17, and 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 2017/0054390 A1; hereinafter “Chen”). Regarding claim 1, Chen teaches a structure having multi-dielectric layers, comprising: a conduction channel containing aluminum (132 formed of aluminum) (Fig. 1B and paragraph 28); a sidewall oxide dielectric structure (a side portion of 138) in contact with a side surface of the conduction channel (a side surface of 132) (See an annotated Fig. 1B below and paragraph 31); and a top oxide dielectric structure (a top portion of 138) in contact with a top surface of the conduction channel (a top surface of 132) and a top surface of the sidewall oxide dielectric structure (a top surface of the side portion of 138), a material of the top oxide dielectric structure comprises silicon (the top portion of 138 formed of silicon dioxide) (See the annotated Fig. 1B below and paragraph 31). PNG media_image1.png 801 1810 media_image1.png Greyscale Chen teaches each and every limitation of claim 1 directed to the structure having multi-dielectric layers structurally and compositionally identical to claim 1 as discussed above. Furthermore, claim 1 does not recite any additional feature to distinguish over Chen teaching the identical structure structurally and compositionally. As such, since Chen teaches the structure having multi-dielectric layers structurally and compositionally identical to claim 1 and since claim 1 does not further recite any distinct feature to distinguish over Chen teaching the identical structure, claimed property or characteristics (i.e., “a sidewall oxide dielectric structure…having a first effective permittivity…a top oxide dielectric structure…having a second effective permittivity…wherein the first effective permittivity is greater than the second effective permittivity”) is presumed to be inherent: Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 195 USPQ 430, 433 (CCPA 1977) and MPEP 2112.01. Regarding claim 2, Chen teaches wherein an atomic ratio of aluminum in the conduction channel is greater than 50% (paragraph 28, 132 formed of aluminum is substantially 100% aluminum). Regarding claim 4, Chen teaches wherein the sidewall oxide dielectric structure comprises at least one metal oxide segment (for example, the side portion of 138 is further horizontally divided into two portions), the top oxide dielectric structure comprises at least one metal oxide layer, and a sum of a segment number of the at least one metal oxide segment of the sidewall oxide dielectric structure and a layer number of the at least one metal oxide layer of the top oxide dielectric structure is equal to or greater than three (a sum of the two portions of the side portion of 138 and the top portion of 138 is equal to three) (Fig. 1B and paragraph 31). Regarding claim 6, Chen teaches wherein the material of the top oxide dielectric structure further comprises at least one of hafnium, tantalum, zirconium, titanium, and tungsten (138 formed of a combination of hafnium dioxide and silicon dioxide) (paragraph 31). Regarding claim 7, Chen teaches wherein the material of the top oxide dielectric structure further comprises aluminum, magnesium, strontium, magnesium, calcium strontium, or scandium (138 formed of a combination of aluminum oxide and silicon dioxide) (paragraph 31). Regarding claim 16, Chen teaches wherein the conduction channel is a multilayer structure (132 including plural conductive layers) (paragraph 28). Regarding claim 17, Chen teaches wherein the top oxide dielectric structure comprises a plurality of metal oxide layers, and a layer number of the metal oxide layers is equal to or greater than two (the top portion of 138 is further horizontally divided into two portions) (Fig. 1B). Regarding claim 19, Chen teaches wherein the top oxide dielectric structure comprises an amorphous phase layer (for example, the top portion of 138 formed of silicon oxide is substantially amorphous) (paragraph 31). Regarding claim 20, Chen teaches wherein the top oxide dielectric structure is a multilayer structure (the top portion of 138 is further horizontally divided into two portions), and the amorphous phase layer is a topmost layer of the top oxide dielectric structure (for example, the top portion of 138 formed of silicon oxide is substantially amorphous) (paragraph 31). Claims 1, 3, 5, and 8-15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yamazaki et al. (US 2010/0025676 A1; hereinafter “Yamazaki”). Regarding claim 1, Yamazaki teaches a structure having multi-dielectric layers, comprising: a conduction channel containing aluminum (101 formed of aluminum) (Fig. 1B and paragraph 91); a sidewall oxide dielectric structure (a side portion of 102 laterally/horizontally adjacent to 101) in contact with a side surface of the conduction channel (a side surface of 101) (Fig. 1B and paragraph 96); and a top oxide dielectric structure (a top portion of 102) in contact with a top surface of the conduction channel (a top surface of 101) and a top surface of the sidewall oxide dielectric structure (a top surface of the side portion of 102), a material of the top oxide dielectric structure comprises silicon (the top portion of 102 formed of silicon oxynitride) (Fig. 1B and paragraph 96). Yamazaki teaches each and every limitation of claim 1 directed to the structure having multi-dielectric layers structurally and compositionally identical to claim 1 as discussed above. Furthermore, claim 1 does not recite any additional feature to distinguish over Yamazaki teaching the identical structure structurally and compositionally. As such, since Yamazaki teaches the structure having multi-dielectric layers structurally and compositionally identical to claim 1 and since claim 1 does not further recite any distinct feature to distinguish over Yamazaki teaching the identical structure, claimed property or characteristics (i.e., “a sidewall oxide dielectric structure…having a first effective permittivity…a top oxide dielectric structure…having a second effective permittivity…wherein the first effective permittivity is greater than the second effective permittivity”) is presumed to be inherent: Where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 195 USPQ 430, 433 (CCPA 1977) and MPEP 2112.01. Regarding claim 3, Yamazaki teaches wherein a metal composition of the sidewall oxide dielectric structure and a metal composition of the top oxide dielectric structure are different (considering the side portion of 102 only including 102a and the top portion of 102 including a combination of 102a and 102b, metal compositions are different) (Fig. 1B and paragraphs 96-99). Regarding claim 5, Yamazaki teaches wherein the material of the top oxide dielectric structure further comprises rare earth metal (102b of 102 including yttrium oxide) (paragraph 99). Regarding claim 8, Yamazaki teaches wherein a thickness of a combination of the conduction channel and the top oxide dielectric structure is smaller than 10 μm (a combined thickness of 101 having 150 nm and each of 102a and 102b having 150 nm is less than 10 μm) (paragraphs 92 and 96). Regarding claim 9, Yamazaki teaches wherein a thickness of the conduction channel is equal to or greater than 1/10 of a thickness of a combination of the conduction channel and the top oxide dielectric structure (a thickness of 101 having 150 nm is greater than 1/10 of a combined thickness of 101 having 150 nm and each of 102a and 102b having 150 nm) (paragraphs 92 and 96). Regarding claim 10, Yamazaki teaches further comprising a conductive pattern (105a and 105b) crossing the conduction channel through the top oxide dielectric structure (Fig. 1A and paragraph 84). Regarding claim 11, Yamazaki teaches wherein the top surface of the conduction channel has a covered section covered by the top oxide dielectric structure and two uncovered sections exposed by the top oxide dielectric structure (top and bottom exposed portions of 101) (Fig. 1A). Regarding claim 12, Yamazaki teaches wherein the top surface of the conduction channel has a covered section covered by the top oxide dielectric structure and at least one uncovered section exposed by the top oxide dielectric structure (top exposed portion of 101 connected to a gate line) (Fig. 1A). Regarding claim 13, Yamazaki teaches further comprising: a semiconductor layer (103) covering the sidewall oxide dielectric structure and the top oxide dielectric structure; a source electrode (105a) covering the semiconductor layer; and a drain electrode (105b) covering the semiconductor layer and spaced apart from the source electrode by a gap (a gap between 10a and 105b), wherein the gap is right above the conduction channel (Fig. 1B and paragraph 84). Regarding claim 14, Yamazaki teaches further comprising: a semiconductor layer (103) covering the sidewall oxide dielectric structure and the top oxide dielectric structure; and a metal pattern (104a and 104b) covering the semiconductor layer and comprising an anodic oxide segment (106) and two conductive segments (105a and 105b) electrically isolated from each other by the anodic oxide segment, wherein the anodic oxide segment is right above the conduction channel (Fig. 1B and paragraphs 84-86). Regarding claim 15, Yamazaki teaches further comprising: a semiconductor layer (103) covering the sidewall oxide dielectric structure and the top oxide dielectric structure; an etching stopper (106) disposed on the semiconductor layer and right above the conduction channel (paragraph 142); a source electrode (105a) covering the semiconductor layer and the etching stopper; and a drain electrode (105b) covering the semiconductor layer and the etching stopper and spaced apart from the source electrode by a gap (a gap between 105a and 105b) on the etching stopper (Fig. 1B and paragraph 84). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Chen as applied to claim 1 above, and further in view of Matsushita et al. (US 2002/0105048 A1; hereinafter “Matsushita”). Regarding claim 18, Chen does not explicitly teach further comprising: a conductor layer covering on the top oxide dielectric structure and forming a capacitor with the conduction channel. Matsushita teaches a structure having multi-dielectric layers, further comprising: a conductor layer (23 as an upper electrode) covering on a top oxide dielectric structure (a top portion of 22) and forming a capacitor with a conduction channel (a combination of 20 and 21 as a bottom electrode) in order to provide a capacitor element by utilizing additional conductor layer over the conduction channel (Fig. 1 and paragraph 36). Therefore, it would have been obvious to one of ordinary skill in the art to combine the teaching of Chen with that of Matsushita in order to provide the capacitor element by utilizing additional conductor layer over the conduction channel. Response to Arguments Applicant's arguments filed 03/24/2026 have been fully considered but they are not persuasive. In response to the rejection of claim 1 under 35 U.S.C. 102(a)(1) by Chen, Applicant argues that the rejection is an error since Chen’s dielectric layer 138 is a single layer and the top portion and the side portion of the dielectric layer 138 have necessarily identical permittivity. However, this argument is not persuasive with reasons as follow: First, Applicant incorrectly argues that the structure of Chen and the structure of claim 1 are not identical without pointing out what limitation in claim 1 is not identical. Applicant should note that Chen teaches each and every limitation of claim 1 directed to the structure having multi-dielectric layers structurally and compositionally identical to claim 1 (See the rejection of claim 1 above). Products of identical chemical composition can not have mutually exclusive properties. In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990). Second, features upon which applicant relies (i.e., the sidewall oxide dielectric structure and the top oxide dielectric structure are formed of compositionally different materials) are not recited in the rejected claim 1. Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). In response to the rejection of claim 1 under 35 U.S.C. 102(a)(1) by Yamazaki, Applicant argues that the Examiner considered 102a of 102 from Yamazaki as the claimed sidewall oxide dielectric structure while the combination of 102a and 102b of 102 as the top oxide dielectric structure for rejecting under inherency. However, this argument is not persuasive since, on the contrary to Applicant’s argument, it should be noted that the top portion of the gate insulating film 102 is considered as the claimed top oxide dielectric structure and the side portion of 102 is considered as the claimed sidewall oxide dielectric structure for rejecting claim 1 (See the rejection of claim 1). Furthermore, it appears that Applicant’s such argument is mainly for the rejection of claim 3, not claim 1. However, reasonings for maintaining the rejection of claim 1 under 35 U.S.C. 102(a)(1) by Chen as discussed above would be similarly applied for maintaining the rejection of claim 3 by Yamazaki. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL B WHALEN whose telephone number is (571)270-3418. The examiner can normally be reached on M-F: 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Sue Purvis can be reached on (571)272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL WHALEN/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Dec 06, 2023
Application Filed
Feb 04, 2026
Non-Final Rejection mailed — §102, §103
Mar 24, 2026
Response Filed
Apr 27, 2026
Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
96%
With Interview (+15.8%)
2y 4m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1005 resolved cases by this examiner. Grant probability derived from career allowance rate.

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