DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election, without traverse, of Group I: claims 1-16, in the “Response to Election / Restrict. ion Filed - 05/08/2026”, is acknowledged.
This office action considers claims 1-24 are thus pending for prosecution, of which, non-elected claims 17-24 are withdrawn, and elected claims 1-16 are examined on their merits
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (256-6; Fig 6; [0062]) = (element 256-6; Figure No. 6; Paragraph No. [0062]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The primary reference, in this case Tseng, citation may not be preceded by the inventor tag, wherein the other reference citation, for example Yang, will carry inventor tag. These conventions are used throughout this document.
Claims 1-16 are rejected under 35 U.S.C. 103 as being unpatentable over TSENG; Huang-Wen et al., (US 20210313510 A1) hereinafter Tseng; in view of YANG; Chih-Hsin US 20220328759 A1) Hereinafter Yang.
Regarding claim 1, Tseng teaches a memory structure, comprising (see the entire document, figs 6, 5A-5B along with figs 1-5. 8A-9I, specifically as cited below)
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Tseng Figure 5B Figure 6
a first tier (comprising 255-6; Fig 6; [0062]) comprising a plurality of first magnetoresistive random access memory (MRAM) cells (255-6; Fig 6 depicts at least two such MRAM cells),
wherein each first MRAM cell (255-6) of the plurality of first MRAM cells has a bottom surface (bottom of 250; Fig 5B; [0050]) in electrical contact with a first electrically conductive via structure (215; Fig 5B) and a top surface (top of 245) (see below for “in electrical contact with a second electrically conductive super via structure); and
a second tier (comprising 255-4; Figs 6; [0062) comprising a plurality of second MRAM cells (255-4; Fig 6 depicts at least two such MRAM cells),
wherein each second MRAM cell (255-4) of the plurality of second MRAM cells is located above and horizontally offset (depicted in Fig 6) from each of the first MRAM cells (255-6; Fig 6) of the plurality of first MRAM cells,
wherein each second MRAM cell (255-4) of the plurality of second MRAM cells has a bottom surface (bottom of 250; Fig 5B in 255-4) in electrical contact with a first electrically conductive (super) via structure (215; Fig 5B) and a top surface (top of 245 in 255-4) (in electrical contact with a second electrically conductive via structure).
As indicated above, the difference between Tseng and the claim 1 are :
a second electrically conductive super via structure; a first electrically conductive super via structure; and a second electrically conductive via structure in (“a top surface (top of 245 of first cell 254-6) in electrical contact with a second electrically conductive super via structure); and a bottom surface (of 250; Fig 5B in 255-6) in electrical contact with a first electrically conductive super via structure and a top surface (top of 245) in electrical contact with a second electrically conductive via structure”).
However, in the analogous art, even with the same Assignee, Yang teaches a magnetic random access memory (MRAM) is a device ([0002,abstract]), wherein (Fig 17; [0077]) a super via and/or via structure (256) is in electrical contact with top surface of the MRAM), and wherein (Fig 6A; [0062]) another super via structure 207 is formed with bottom via 213.
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Yang Figure 6A Figure 17
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include top “super via” or “via” (256) and bottom super via 207 of Yang into Tseng memory structure, thereafter, the combination of (Tseng and Yang)’s CELLS comprises:
“a top surface (top of 245 of first cell) in electrical contact with a second electrically conductive super via structure (in view of Yang 256); and a bottom surface (250; Fig 5B of second MRAM cell) in electrical contact with a first electrically conductive super via structure in view of Yang 207 and a top surface (top of 245) in electrical contact with a second electrically conductive via structure Yang 256) with appropriate height adjustment as claimed”, since this inclusion, at least, will provide external connectivity of the MRAM cells with other wiring of the memory device (Yang [0080-0089])
Regarding claim 2, the combination of (Tseng and Yang) as applied to the memory structure of claim 1, further teaches, wherein the first electrically conductive via structure (215; Fig 6 in cell 255-6) and the first electrically conductive super via structure (Yang 207; Fig 6a of cell 255-6, as vertically offset in Tseng Fig 6) have bottommost surfaces that are substantially coplanar with each other, and the second electrically conductive super via structure (in view of Yang 256, in 256-6) and the second electrically conductive via structure (in view of Yang 256 in 255-4) have topmost surfaces that are substantially coplanar with each other.
Regarding claim 3, the combination of (Tseng and Yang) as applied to the memory structure of claim 2, further teaches,, wherein a wiring distance provided by a combination of the first electrically conductive via structure (215) and the second electrically conductive super via structure (256) is substantially equal to a wiring distance provided by a combination of the first electrically conductive super via structure (256) and the second electrically conductive via structure (adjusted 256 in view of claim one rejection).
Regarding claim 4. the combination of (Tseng and Yang) as applied to the memory structure of claim 1, Tseng further teaches, wherein each first MRAM cell (256-6) of the plurality of first MRAM cells comprises a first electrode (instances of 250; Fig 5B; [0051]), a first MTJ structure (instances of 255), and a second electrode (instances of 245; [0054]).
Regarding claim 5. the combination of (Tseng and Yang) as applied to the memory structure of claim 4, further teaches, wherein the first electrode (instances of 250; Fig 5B; [0051]) is in electrical contact with the first electrically conductive via structure (instances of 215), and the second electrode (instances of 245; [0054]) is in electrical contact with the second electrically conductive super via structure (in view of instances of Yang 256).
Regarding claim 6. the combination of (Tseng and Yang) as applied to the memory structure of claim 5, Tseng further teaches, wherein each second MRAM cell (256-4) of the plurality of second MRAM cells comprises a third electrode (instances of 250; Fig 5B; [0051]), a second MTJ structure (instances of 255), and a fourth electrode (instances of 245; [0054]).
Regarding claim 7. the combination of (Tseng and Yang) as applied to the memory structure of claim 6, further teaches, wherein the third electrode (instances of 250; Fig 5B; [0051]) is in electrical contact with the first electrically conductive super via structure (in view of instances of Yang 256), and the fourth electrode (instances of 245; [0054]) is in electrical contact with the second electrically conductive via structure (in view of instances of Yang 256).
Regarding claim 8. the combination of (Tseng and Yang) as applied to the memory structure of claim 7, further teaches, wherein the first electrically conductive via structure (215; Fig 5B) is in electrical contact with an electrically conductive wiring structure, and the first electrically conductive super via structure (in view of instances of Yang 256) is in electrical contact with another electrically conductive wiring structure ([0068]).
Regarding claim 9. the combination of (Tseng and Yang) as applied to the memory structure of claim 6, Tseng further teaches, wherein the first electrode (instances of 250; Fig 5B; [0051]) and the third electrode (another instances of 250; Fig 5B; [0051]) both have a topmost surface that is connected to a sidewall by a beveled surface (Fig 5B).
Regarding claim 10. the combination of (Tseng and Yang) as applied to the memory structure of claim 1, Tseng further teaches, wherein the first MTJ structure and the second MTJ structure both comprise a tunnel barrier layer (135; Fig 1B; [0018]) sandwiched between a magnetic reference layer (130) and a magnetic free layer (140).
Regarding claim 11. the combination of (Tseng and Yang) as applied to the memory structure of claim 10, Tseng further teaches, wherein the magnetic free layer (140; Fig 1B; [0018]) is located above the magnetic reference layer (130).
Regarding claim 12. the combination of (Tseng and Yang) as applied to the memory structure of claim 10, Tseng further teaches, wherein the magnetic free layer (140; Fig 1B; [0018]) is located beneath (based on flipped view of fig 11B) the magnetic reference layer (130).
Regarding claim 13. the combination of (Tseng and Yang) as applied to the memory structure of claim 1, further teaches, (the structure) further comprising a diffusion barrier liner (in view of Yang 215; Figs 5A,17; [0044], 256A, Figs 5A,17; [0056]) present along sidewalls of each of the first electrically conductive via structure (215), the first electrically conductive super via structure (Yang 256 in Tseng 255-4), the second electrically conductive via structure (instances of Yang 256 in Tseng 255-4) and the second electrically conductive super via structure (Yang 256 in Tseng 255-6).
Regarding claim 14. the combination of (Tseng and Yang) as applied to the memory structure of claim 1, Tseng further teaches, (the structure) further comprising a first encapsulation liner (590; Fig 9I; [0090]) located adjacent to each first MRAM cell (256-6) of the plurality of first MRAM cells.
Regarding claim 15. the combination of (Tseng and Yang) as applied to the memory structure of claim 14, Tseng further teaches, (the structure) further comprising a second encapsulation liner (590; Fig 9I; [0090]) located adjacent to each second MRAM cell (256-4) of the plurality of second MRAM cells.
Regarding claim 16. the combination of (Tseng and Yang) as applied to the memory structure of claim 1, Tseng further teaches, wherein the plurality of first MRAM cells (256-6) is present in an interconnect layer (DL1; Fig 6; [0058]) that differs from the plurality of second MRAM cells (256-4).
Conclusion
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/MOAZZAM HOSSAIN/Primary Examiner, Art Unit 2898
May 20, 2026