DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This OA is in response to the amendment filled on 6/23/2026 that has been entered, wherein claims 1-9 and 11-24 are pending and claims 10 are canceled.
Specification
The objection to the specification is withdrawn in light of Applicant’s amendment of 6/23/2026.
Claim Rejections - 35 USC § 112
The rejection of claim 1 under 35 USC 112(b) is withdrawn in light of Applicant’s amendment of 6/23/2026.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2016/035803 A1) herein Kim ‘803 in view of Kim et al. (US 2011/0241563 A1) herein Kim ‘563 and Kim et al. (US 2022/0208902 A1) herein Kim ‘902, all of record.
Regarding claim 1, Kim ‘803 teaches a display device(Fig. 9) comprising:
a plurality of sub-pixels(1PA, 2PA, ¶0048);
a power line(not illustrated, ¶0061) configured to supply a voltage;
a plurality of structures(154, ¶0055), each structure(154, ¶0055) respectively disposed in a corresponding one of the plurality of sub-pixels(1PA, 2PA, ¶0048); and
a power connection line(960, ¶0115) overlapping the plurality of structures(154, ¶0055), the power connection line(960, ¶0115) electrically connected to the plurality of sub-pixels(1PA, 2PA, ¶0048),
wherein each of the plurality of sub-pixels(1PA, 2PA, ¶0048) includes an organic light-emissive layer(156, ¶0046), a cathode electrode layer(158, ¶0046) on the organic light-emissive layer(156, ¶0046), and a passivation layer(972, ¶0113) on the cathode electrode layer(158, ¶0046), the passivation layer(972, ¶0113) including an opening that exposes a portion of the cathode electrode layer(158, ¶0046) that is on a corresponding structure(154, ¶0055) from the plurality of structures(154, ¶0055) such that the portion of the cathode electrode layer(158, ¶0046) is in contact with the power connection line(960, ¶0115).
Kim ‘803 is not relied on to teach the power connection line(960, ¶0115) electrically connected to the power line(not illustrated, ¶0061), and supplies the voltage from the power line to the plurality of sub-pixels(1PA, 2PA, ¶0048) and wherein organic light-emissive layers(156, ¶0046) of adjacent sub-pixels(1PA, 2PA, ¶0048) from the plurality of sub-pixels(1PA, 2PA, ¶0048) are disconnected from each other, cathode electrode layers(158, ¶0046) of the adjacent sub-pixels(1PA, 2PA, ¶0048) are disconnected from each other, and passivation layers(972, ¶0113) of the adjacent sub-pixels(1PA, 2PA, ¶0048) are disconnected from each other. Kim ‘803 does teach the power connection line(960, ¶0115) is an auxiliary electrode(¶0115).
Kim ‘563 teaches a display device(Fig. 4) wherein the power connection line(220, ¶0057) electrically connected to the power line(150, ¶0057), and supplies the voltage from the power line(150, ¶0057) to the plurality of sub-pixels(PE, Fig. 3). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device Kim ‘803, so that the power connection line electrically connected to the power line, and supplies the voltage from the power line to the plurality of sub-pixels, as taught by Kim ‘563, in order to minimize a voltage drop that in the second power voltage VSS due to electrical resistance of the cathode(¶0057).
Kim ‘803 and Kim ‘563 are not relied on to teach organic light-emissive layers(156, ¶0046) of adjacent sub-pixels(1PA, 2PA, ¶0048) from the plurality of sub-pixels(1PA, 2PA, ¶0048) are disconnected from each other, cathode electrode layers(158, ¶0046) of the adjacent sub-pixels(1PA, 2PA, ¶0048) are disconnected from each other, and passivation layers(972, ¶0113) of the adjacent sub-pixels(1PA, 2PA, ¶0048) are disconnected from each other.
Kim ‘902 teaches a display device(Fig. 5) wherein the organic light-emissive layers(OL, ¶0076) of adjacent sub-pixels(EA) from the plurality of sub-pixels(EA) are disconnected from each other(¶0078), cathode electrode layers(CAT, ¶0076) of the adjacent sub-pixels(EA) are disconnected from each other(¶0103, please see examiner annotated Fig. 5A), and passivation layers(PT, ¶0076) of the adjacent sub-pixels(EA) are disconnected from each other(¶0078, please see examiner annotated Fig. 5A). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that organic light-emissive layers of adjacent sub-pixels from the plurality of sub-pixels are disconnected from each other, cathode electrode layers of the adjacent sub-pixels are disconnected from each other, and passivation layers of the adjacent sub-pixels are disconnected from each other, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line and between the cathode electrode and the driving current line VDD(¶0099) while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
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Regarding claim 2, Kim ‘803 teaches the display device of claim 1, wherein the display device further comprises:
a plurality of data lines(134, ¶0050).
Kim ‘803 and Kim ‘563 are not relied on to teach each data line(134, ¶0050) from the plurality of data lines(134, ¶0050) disposed between a pair of adjacent sub-pixels(1PA, 2PA, ¶0048) adjacent from the plurality of sub-pixels(1PA, 2PA, ¶0048) and is non-overlapping with the cathode electrode layer(158, ¶0046) of each of the pair of adjacent sub-pixels(1PA, 2PA, ¶0048).
Kim ‘902 teaches a display device(Fig. 5) wherein each data line(DL, ¶0099) from the plurality of data lines(DL, ¶0099) disposed between a pair of adjacent sub-pixels(EA) adjacent from the plurality of sub-pixels(EA) and is non-overlapping with the cathode electrode layer(CAT, ¶0076) of each of the pair of adjacent sub-pixels(EA). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that each data line from the plurality of data lines disposed between a pair of adjacent sub-pixels adjacent from the plurality of sub-pixels and is non-overlapping with the cathode electrode layer of each of the pair of adjacent sub-pixels, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line(¶0099) and between the cathode electrode and the driving current line VDD while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Regarding claim 3, Kim ‘803 teaches the display device of claim 1, wherein the plurality of sub-pixels(1PA, 2PA, ¶0048) are arranged in a matrix form along a first direction and a second direction that intersects the first direction, and the power connection line(960, ¶0115) is formed in a grid pattern(wherein 960 overlaps black matrix 182) extending across the exposed portion of the cathode electrode layer(158, ¶0046) in each of the plurality of sub-pixels(1PA, 2PA, ¶0048).
Regarding claim 4, Kim ‘803 teaches the display device of claim 1, but is not relied on to teach the power connection line(960, ¶0115) covers an entire area of all of the plurality of sub-pixels(1PA, 2PA, ¶0048), the power connection line(960, ¶0115) comprising a transparent material.
Kim ‘563 teaches a display device(Fig. 4) wherein the power connection line(220, ¶0057) covers an entire area of all of the plurality of sub-pixels(PE, Fig. 3), the power connection line(220, ¶0057) comprising a transparent material(ITO, IZO, ¶0050). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device Kim ‘803, so that the power connection line covers an entire area of all of the plurality of sub-pixels, the power connection line comprising a transparent material, as taught by Kim ‘563, in order to minimize a voltage drop that in the second power voltage VSS due to electrical resistance of the cathode(¶0057).
Regarding claim 7, Kim ‘803 teaches the display device of claim 1, wherein each of the plurality of sub-pixels(1PA, 2PA, ¶0048) includes a light-emitting area(¶0048), and the structure(154, ¶0055) included in the sub-pixel(1PA, 2PA, ¶0048) is on at least one side of the light-emitting area without overlapping the at least one side of the light-emitting area(¶0048).
Regarding claim 8, Kim ‘803 teaches the display device of claim 1, wherein the power line(not illustrated, ¶0061) is a voltage line and the voltage is applied to the cathode electrode layer(158, ¶0046) included in each of the plurality of sub-pixels(1PA, 2PA, ¶0048).
The limitation of the power line(not illustrated, ¶0061) is a low-potential voltage line and the voltage is a low-potential voltage that is applied to the cathode electrode layer(158, ¶0046) is a recitation how the product/device is being used. The structure as defined in Kim ‘803 could be used in the manner claimed (i.e. the power line of Kim ‘803 could be configured to supply a low-potential voltage to the cathode electrode layer) and thus Kim ‘803 anticipates the limitations of this claim. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim, MPEP 2114 (II).
Kim ‘803 is not relied on to teach the voltage that is applied to the cathode electrode layer(158, ¶0046) via the power connection line(960, ¶0115).
Kim ‘563 teaches a display device(Fig. 4) wherein voltage is applied to the to the cathode electrode(730, ¶0057, ¶0044) via the power connection line(220, ¶0057). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device Kim ‘803, so that voltage is applied to the to the cathode electrode via the power connection line, as taught by Kim ‘563, in order to minimize a voltage drop that in the second power voltage VSS due to electrical resistance of the cathode(¶0057).
Claims 9, 11-16 and 18-23 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2016/035803 A1) herein Kim ‘803 in view of Kim et al. (US 2022/0208902 A1) herein Kim ‘902, all of record.
Regarding claim 9, Kim ‘803 teaches a display device(Fig. 9) comprising:
a substrate(110);
a plurality of sub-pixels(1PA, 2PA, ¶0048) on the substrate(110);
a bank layer(152, ¶0054) on the substrate(110);
a structure(154, ¶0055) on the bank layer(152, ¶0054);
an organic light-emissive layer(156, ¶0046), a cathode electrode layer(158, ¶0046) on the organic light-emissive layer(156, ¶0046), and a passivation layer(972, ¶0113) on the cathode electrode layer(158, ¶0046) in a sub-pixel from the plurality of sub-pixels(1PA, 2PA, ¶0048) such that a portion of the organic light-emissive layer(156, ¶0046), a portion of the cathode electrode layer(158, ¶0046), and a portion of the passivation layer(972, ¶0113) overlap the bank layer(152, ¶0054) and the structure(154, ¶0055), the passivation layer(972, ¶0113) including an opening that exposes a portion of the cathode electrode layer(158, ¶0046) that is on the structure(154, ¶0055); and
a power connection line(960, ¶0115) overlapping the structure(154, ¶0055) such that the structure(154, ¶0055) is between the power connection line(960, ¶0115) and the substrate(110),
wherein the portion of the cathode electrode layer(158, ¶0046) is in contact with the power connection line(960, ¶0115).
Kim ‘803 is not relied on to teach the organic light-emissive layer(156, ¶0046), the cathode electrode layers(158, ¶0046) and of the passivation layer(972, ¶0113) of the sub-pixel (1PA, 2PA, ¶0048) are disconnected, respectively a organic light-emissive layer(156, ¶0046), a cathode electrode layers(158, ¶0046) and a passivation layer(972, ¶0113) of a sub-pixel (1PA, 2PA, ¶0048) adjacent to the sub-pixel(1PA, 2PA, ¶0048).
Kim ‘902 teaches a display device(Fig. 5) wherein the organic light-emissive layer(OL, ¶0076), the cathode electrode layer(CAT, ¶0076), and the passivation layer(PT, ¶0076) of the sub-pixel(EA) are disconnected(¶0078, ¶0103, please see examiner annotated Fig. 5A), respectively, from an organic light-emissive layer(OL, ¶0076), a cathode electrode layer(CAT, ¶0076), and a passivation layer(PT, ¶0076) of a sub-pixel(EA) adjacent to the sub-pixel(EA). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that the organic light-emissive layer, the cathode electrode layer, and the passivation layer of the sub-pixel are disconnected, respectively, from an organic light-emissive layer, a cathode electrode layer, and a passivation layer of a sub- pixel adjacent to the sub-pixel, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line and between the cathode electrode and the driving current line VDD(¶0099) while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Regarding claim 11, Kim ‘803 teaches the display device of claim 9, wherein the display device further comprises: a data line(134, ¶0050) on the substrate(110).
Kim ‘803 is not relied on to teach the data line(134, ¶0050) non-overlapping with the cathode electrode layer(158, ¶0046).
Kim ‘902 teaches a display device(Fig. 5) wherein the data line(DL, ¶0099) non-overlapping with the cathode electrode layer(CAT, ¶0076). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that the data line non-overlapping with the cathode electrode layer, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line(¶0099) and between the cathode electrode and the driving current line VDD while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Regarding claim 12, Kim ‘803 teaches the display device of claim 9, wherein the display device further comprises:
a data line(134, ¶0050) on substrate(110); and
a first capping layer(170, ¶0046) between the bank layer(152, ¶0054) and the power connection line(960, ¶0115), wherein the bank layer(152, ¶0054) and the first capping layer(170, ¶0046) are between the data line(134, ¶0050) and the power connection line(960, ¶0115).
Regarding claim 13, Kim ‘803 teaches the display device of claim 12, wherein at least a portion of the data line(134, ¶0050) is non-overlapping with the power connection line(960, ¶0115).
Regarding claim 14, Kim ‘803 teaches the display device of claim 12, wherein the first capping layer(170, ¶0046) and the structure(154, ¶0055) are in a same layer on the bank layer(152, ¶0054).
Regarding claim 15, Kim ‘803 teaches the display device of claim 12, wherein the display device further comprises:
a second capping layer(182, ¶0046) on the first capping layer(170, ¶0046), the second capping layer(182, ¶0046) covering the power connection line(960, ¶0115).
Regarding claim 16, Kim ‘803 teaches the display device of claim 9, wherein the structure(154, ¶0055) comprises a tapered shape(¶0055).
Regarding claim 18, Kim ‘803 teaches a display device(Fig. 9) comprising:
a substrate(110);
a bank on the substrate(110), the bank including an opening;
a structure(154, ¶0055) on the bank that is non-overlapping with the opening;
a power connection line(960, ¶0115) including a portion that overlaps the structure(154, ¶0055),
an anode electrode layer(150a, 150b, ¶0046) in the opening;
an organic light-emissive layer(156, ¶0046) including a first portion(portion of 156 in 1PA and 2PA) and a second portion(portion of 156 in BA), the first portion(portion of 156 in 1PA and 2PA) of the organic light-emissive layer(156, ¶0046) on the anode electrode layer(150a, 150b, ¶0046) in the opening and the second portion(portion of 156 in BA) of the organic light-emissive layer(156, ¶0046) on the structure(154, ¶0055);
a cathode electrode layer(158, ¶0046) including a first portion(portion of 158 in 1PA and 2PA) and a second portion, the first portion(portion of 158 in 1PA and 2PA) of the cathode electrode layer(158, ¶0046) on the first portion(portion of 156 in 1PA and 2PA) of the organic light-emissive layer(156, ¶0046) in the opening and the second portion(portion of 158 in BA) of the cathode electrode layer(158, ¶0046) on the second portion(portion of 156 in BA) of the organic light-emissive layer(156, ¶0046) and the structure(154, ¶0055), the second portion(portion of 158 in BA) of the cathode electrode layer(158, ¶0046) in contact with the portion of the power connection line(960, ¶0115) that overlaps the structure(154, ¶0055); and
a passivation layer(972, ¶0113) including a first portion(portion of 972 in 1PA and 2PA) and a second portion, the first portion(portion of 972 in 1PA and 2PA) of the passivation layer(972, ¶0113) on the first portion(portion of 158 in 1PA and 2PA) of the cathode electrode layer(158, ¶0046) in the opening and the second portion(portion of 972 in BA) of the passivation layer(972, ¶0113) on the second portion(portion of 156 in BA) of the organic light-emissive layer(156, ¶0046) and the structure(154, ¶0055) without being between the second portion(portion of158 in BA) of the cathode electrode layer(158, ¶0046) and the portion of the power connection line(960, ¶0115) that is in contact with the second portion(portion of158 in BA) of the cathode electrode layer(158, ¶0046), wherein the organic light-emissive layer(156, ¶0046), the cathode electrode layer(158, ¶0046), and the passivation layer(972, ¶0113) are in a sub-pixel(1PA, ¶0048) of a plurality of sub-pixels(1PA, 2PA, ¶0048) on the substrate(110).
The claim limitation of the power connection line(960, ¶0115) configured to supply a voltage; the second portion(portion of 158 in BA) of the cathode electrode layer(158, ¶0046) receives the voltage from the power connection line(960, ¶0115) is a recitation how the product/device is being used. The structure as defined in Kim ‘803 could be used in the manner claimed (i.e. the power connection line of Kim ‘803 could be used to configured to supply a voltage and the second portion of the cathode electrode layer of Kim ‘803 could be configured to receives the voltage from the power connection line) and thus Kim ‘803 anticipates the limitations of this claim. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim, MPEP 2114 (II).
Kim ‘803 is not relied on to teach the organic light-emissive layer(156, ¶0046), the cathode electrode layer(158, ¶0046), and the passivation layer(972, ¶0113) of the sub-pixel(1PA, ¶0048) are disconnected, respectively, from an organic light-emissive layer(156, ¶0046), a cathode electrode layer(158, ¶0046), and a passivation layer of a sub-pixel(2PA, ¶0048) adjacent to the sub-pixel(1PA, ¶0048).
Kim ‘902 teaches a display device(Fig. 5) wherein the organic light-emissive layer(OL, ¶0076), the cathode electrode layer(CAT, ¶0076), and the passivation layer(PT, ¶0076) of the sub-pixel(EA) are disconnected(¶0078, ¶0103, please see examiner annotated Fig. 5A), respectively, from an organic light-emissive layer(OL, ¶0076), a cathode electrode layer(CAT, ¶0076), and a passivation layer(PT, ¶0076) of a sub-pixel(EA) adjacent to the sub-pixel(EA). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that the organic light-emissive layer, the cathode electrode layer, and the passivation layer of the sub-pixel are disconnected, respectively, from an organic light-emissive layer, a cathode electrode layer, and a passivation layer of a sub- pixel adjacent to the sub-pixel, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line and between the cathode electrode and the driving current line VDD(¶0099) while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Regarding claim 19, Kim ‘803 teaches the display device of claim 18, wherein an upper surface of the second portion(portion of 158 in BA) of the cathode electrode layer(158, ¶0046) that is in contact with the power connection line(960, ¶0115).
Kim ‘803 is not relied on to teach the second portion(portion of 972 in BA) of the passivation layer(972, ¶0113) includes an end that is coplanar with an upper surface of the second portion of the cathode electrode layer(158, ¶0046).
Kim ‘803 teaches a display device(Fig. 5) wherein the second portion(portion of 972 in BA) of the passivation layer(PT, ¶0076) includes an end that is coplanar with an upper surface of the second portion of the cathode electrode layer(CAT, ¶0076). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that the second portion of the passivation layer includes an end that is coplanar with an upper surface of the second portion of the cathode electrode layer, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line and between the cathode electrode and the driving current line VDD(¶0099) while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Regarding claim 20, Kim ‘803 teaches the display device of claim 18, wherein the display device further comprises: a data line(134, ¶0050).
Kim ‘803 is not relied on to teach a data line(134, ¶0050) that is non-overlapping with the cathode electrode layer(158, ¶0046).
Kim ‘902 teaches a display device(Fig. 5) comprising data line(DL, ¶0099) that is non-overlapping with the cathode electrode layer(CAT, ¶0076). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 to include a data line that is non-overlapping with the cathode electrode layer, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line(¶0099) and between the cathode electrode and the driving current line VDD while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Regarding claim 21, Kim ‘803 teaches the display device of claim 19, further comprising:
a first capping layer(170, ¶0046) on the bank, the first capping layer(170, ¶0046) on a same layer as the structure(154, ¶0055); and
a second capping layer(182, ¶0046) on the first capping layer(170, ¶0046) and the power connection line(960, ¶0115).
Regarding claim 22, Kim ‘803 teaches the display device of claim 21, but is not relied on to teach an upper surface of the first capping layer(170, ¶0046) is coplanar with the end of the second portion of the passivation layer(972, ¶0113) and the upper surface of the second portion of the cathode electrode layer(158, ¶0046).
Kim ‘803 teaches a display device(Fig. 5) wherein an upper surface of the first capping layer(PC, ¶0077) is coplanar with the end of the second portion of the passivation layer(PT, ¶0076) and the upper surface of the second portion of the cathode electrode layer(CAT, ¶0076). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that an upper surface of the first capping layer is coplanar with the end of the second portion of the passivation layer and the upper surface of the second portion of the cathode electrode layer, as taught by Kim ‘902, in order to reduce the parasitic capacitances between the cathode electrode and the data line and between the cathode electrode and the driving current line VDD(¶0099) while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Regarding claim 23, Kim ‘803 teaches the display device of claim 18, further comprising:
a plurality of pixels(1PA, 2PA, red, green, blue and white color pixels ¶0048) are arranged in a matrix form along a first direction and a second direction that intersects the first direction, wherein the power connection line(960, ¶0115) comprises a grid pattern(mesh, ¶0062, ¶0013) extending across the second portion of the cathode electrode layer(158, ¶0046).
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2016/035803 A1) herein Kim ‘803 and Kim et al. (US 2022/0208902 A1) herein Kim ‘902 as applied to claim 9 above, further in view of Kim et al. (US 2011/0241563 A1) herein Kim ‘563, all of record.
Regarding claim 17, Kim ‘803, in view of Kim ‘902, teaches the display device of claim 9, wherein the display device further comprises:
a power line(not illustrated, ¶0061) configured to supply a voltage(¶0061).
The limitation of a power line(not illustrated, ¶0061) configured to supply a low-potential voltage is a recitation how the product/device is being used. The structure as defined in Kim ‘803 could be used in the manner claimed (i.e. the power line of Kim ‘803 could be configured to supply a low-potential voltage) and thus Kim ‘803 anticipates the limitations of this claim. A claim containing a "recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus" if the prior art apparatus teaches all the structural limitations of the claim, MPEP 2114 (II).
Kim ‘803 and Kim ‘902 are not relied on to teach the power line(not illustrated, ¶0061) connected to the power connection line(960, ¶0115), wherein the power connection line(960, ¶0115) applies the low-potential voltage to the cathode electrode layer(158, ¶0046). Kim ‘803 does teach the power connection line(960, ¶0115) is an auxiliary electrode(¶0115).
Kim ‘563 teaches a display device(Fig. 4) wherein the power connection line(220, ¶0057) electrically connected to the power line(150, ¶0057), wherein the power connection line(220, ¶0057) applies voltage to the cathode electrode(730, ¶0057, ¶0044). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device Kim ‘803, so that the power connection line electrically connected to the power line, and supplies the voltage from the power line to the plurality of sub-pixels, as taught by Kim ‘563, in order to minimize a voltage drop that in the second power voltage VSS due to electrical resistance of the cathode(¶0057).
Claim 24 is rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2016/035803 A1) herein Kim ‘803 and Kim et al. (US 2022/0208902 A1) herein Kim ‘902 as applied to claim 9 above, further in view of Li et al. (US 2024/0014362 A1) all of record.
Regarding claim 24, Kim ‘803, in view of Kim ‘902, teaches the display device of claim 18, further comprising:
a plurality of pixels(1PA, 2PA, red, green, blue and white color pixels ¶0048) are arranged in a matrix form along a first direction and a second direction that intersects the first direction.
Kim ‘803 and Kim ‘902 are not relied on to teach wherein the power connection line(960, ¶0115) covers an entire area of all of the plurality of pixels and comprises a transparent material. Kim ‘803 does teach the power connection line(960, ¶0115) is an auxiliary electrode(¶0115).
Li teaches a display device(Fig. 6) wherein the power connection line(13b, ¶0102) covers(¶0083) an entire area of all of the plurality of pixels and comprises a transparent material(¶0102). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kim ‘803 so that the power connection line covers an entire area of all of the plurality of pixels and comprises a transparent material, as taught by Li, in order to forgo patterning of the power connection line thus simplifying the difficulty of the process operation(¶0084).
Allowable Subject Matter
Claims 5-6 are allowed.
The following is an examiner’s statement of reasons for allowance: Claim 5 has been rewritten in independent form including all of the limitations of the base claim 1. Please see the office action of 3/27/2026 for reasons for allowance.
Claim 6 depends on claim 5 and is allowed.
Response to Arguments
Applicant's arguments filed 6/23/2026 have been fully considered but they are not persuasive.
Regarding claim 1, Applicant argues Kim '902 (D3) likewise fails to teach the recited disconnection. FIG. 5B and FIG. 4C show that, in the Y-direction, the cathode is continuously connected from one emission area to another through the second bank ([0086]-[0087]). The present specification at [0165] and [0176], for example, expressly excludes such a continuously extending, non-disconnected configuration. Accordingly, neither Kim '803 nor Kim '902 teaches or suggests the recited adjacent-sub-pixel disconnection, and there is no proper motivation to combine them to arrive at the recited configuration.
The examiner respectfully submits that the embodiment of Fig. 4c is different embodiment than the embodiment of Fig. 5 of which the rejection is based on. Fig. 5A depicts a discontinuity(please see examiner annotated Fig. 5A) in the organic light-emissive layer(OL, ¶0076), the cathode electrode layer(CAT, ¶0076), and the passivation layer(PT, ¶0076) between sub-pixels(EA). Further Kim ‘902 states “each of the cathode electrodes CAT formed at each of the emission areas EA may be physically and electrically disconnected along the X-axis direction by the portions where only the first bank BA1 is disposed”(¶0103). Additionally, Kim ‘902 states “on the first bank BA1, the cathode electrode CAT, the first protecting layer PT and the second protecting layer PC are not deposited. In the figure, the light emitting layer OL may not be deposited on the first bank BA1”(¶0078). Thus Kim ‘902 teaches the organic light-emissive layers(OL, ¶0076) of adjacent sub-pixels(EA) from the plurality of sub-pixels(EA) are disconnected from each other(¶0078), cathode electrode layers(CAT, ¶0076) of the adjacent sub-pixels(EA) are disconnected from each other(¶0103), and passivation layers(PT, ¶0076) of the adjacent sub-pixels(EA) are disconnected from each other(¶0078). One of ordinary skill in the art before the effective filing date of the claimed invention would be motivated to modify the device of Kim ‘803 to arrive at the recited configuration, in order to reduce the parasitic capacitances between the cathode electrode and the data line and between the cathode electrode and the driving current line VDD(¶0099) while having no degradation of video quality due to the interference between the lines with the ultra-high density structure(¶0105).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA DYKES whose telephone number is (571)270-3161. The examiner can normally be reached M-F 9:30 am-5 pm.
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/LAURA M DYKES/Examiner, Art Unit 2892
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