Acknowledgment
The Remarks filed on April 29, 2026 responding to the Office Action mailed on February 27, 2026 have been considered. This Office Action fully considers the amendments to the pending application in which claims 1 to 19 are pending.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The Information Disclosure Statement (IDS), filed on May 6, 2026 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner.
Notation
References to patents will be in the form of [C:L] where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of [xxxx].
Response to Arguments
In order to be entitled to reconsideration or further examination, the applicant or patent owner must reply to the Office action. The reply by the applicant or patent owner must be reduced to a writing which distinctly and specifically points out the supposed errors in the examiner's action and must reply to every ground of objection and rejection in the prior Office action. See MPEP 714.02.
Applicant argues that Examiner’s analysis (mapping) or Wirz is inconsistent and improper, see Remarks at page 8, paragraph 3, because Wirz teaches a die to die arrangement rather than a die to substrate arrangement, Id. Examiner understands the merit of Applicant’s argument turns on the broadest reasonable interpretation of substrate for the proposition that a die is not a substrate within the scope of claim 1.
During examination, the claims must be interpreted as broadly as their terms reasonably allow. In re American Academy of Science Tech Center, 367 F.3d 1359, 1369 (Fed. Cir. 2004). Under a broadest reasonable interpretation, words of the claim must be given their plain meaning, unless such meaning is inconsistent with the specification. See MPEP 2111. The presumption that a term is given its ordinary and customary meaning may be rebutted by the applicant by clearly setting forth a different definition of the term in the specification. In re Morris, 127 F.3d 1048, 1054 (Fed. Cir. 1997). Limitations may not, however, be imported into the claims from the specification. See MPEP 2111. If extrinsic reference sources, such as dictionaries, evidence more than one definition for the term, the intrinsic record must be consulted to identify which of the different possible definitions is most consistent with applicant’s use of the terms. See MPEP 2111.
Initially, Examiner has not found and Applicant does not point to a definition of ‘substrate’. Turning to extrinsic evidence, Examiner notes that the definition of substrate in the art is ‘the supporting material upon which or within which elements or a semiconductor device are fabricator or attached”, see definition of substrate downloaded from URL <https://www.jedec.org/standards-documents/dictionary/terms/substrate-semiconductor-device-1-general> on May 6, 2026.
Turning to Applicant’s use of ‘substrate’, Examiner notes this is item 200 and 218 in Figures 2A and 2B. It appears to Examiner that substrates 200 and 218 are supporting
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materials or structures upon which the elements of semiconductor device 108 are attached. Examiner also notes that at [0010], Applicant recites “[0010] FIG. 4 is a flowchart illustrating an exemplary fabrication process of fabricating a substrate for an IC package such as the substrates described in FIGS. 1, 2A, and 2B, wherein the substrate employs a reduced area, added metal pad(s) to metal interconnect(s) to reduce die-substrate clearance, including, but not limited to, the substrates in FIGS. 1, 2A, and 2B;” It appears to Examiner a definition of ‘supporting material upon which or within which elements of a semiconductor device are fabricated or attached’ is the definition most consistent with Applicant’s use of the term. Further Examiner notes, that Applicant asserts that substrate is not limited by the features shown in Figure 2A and 2B. Turning
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to Wirz, Examiner notes that die 126 is a supporting material on which or within which elements or a semiconductor device are fabricated or attached. Examiner notes that at [0022] Wirz recites; “[0022] As further shown in FIG. 1, each of the semiconductor dies 104 includes a semiconductor substrate 126 (e.g., a silicon substrate, a gallium arsenide substrate, an organic laminate substrate, etc.) and through-substrate vias (TSVs) 128 extending through the substrate 126 from the first side 108a to the second side 108b of the die 104. The TSVs 128 are coupled to corresponding interconnects 106. In some embodiments, the TSVs 128 can be coupled to substrate pads 130 or other conductive features located on either side of the semiconductor substrate 126.” (Emphasis added). Wirz teaches 126 is both a semiconductor and package, e.g. OLGA, substrate and 130 are substrate pads. Examiner is unpersuaded by Examiner’s claim interpretation or mapping of Wirz is inconsistent and improper, whatever that may mean. If Applicant requires substrate to be package substrate, Applicant is encouraged to amend the claims accordingly. In any event, Wirz teaches 126 may be an organic laminate substrate which has the structure of a package substrate.
Applicant argues that Examiner’s position that conductive pillar 112 as reads on a second pad of claim 1 is incorrect, see Remarks at page 8 paragraph 4, because conductive pillar 112 ‘can be coupled’ to redistribution structure 265B on second side of second die 104b and 112 is not coupled to substrate pad 130. Examiner disagrees. Wirz clearly shows 112 coupled to 130. Is it not the case that 112 being formed on 130 results in 112 being coupled to 130. Again, Examiner looks to the definition of couple which includes ‘to join or combine with something else’ definition of couple with downloaded from URL <https://www.merriam-webster.com/dictionary/couple%20with> om May 5, 2026. Clearly 112 is joined to 130. Again, Examiner is unpersuaded that Examiner’s claim interpretation of mapping of Wirz is inconsistent or improper, rather it is just common sense.
Applicant attacks Wirz as not teaching the claimed cross sectional areas, see Remarks at page 9 paragraph 1. Examiner has not relied on Wirz to teach the claimed cross sectional areas of the first and second pads. The rejection of claim 1 was based upon Wirz and the teachings of references that bond pads are square. In response to Applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Applicant argues that Wirz does not relate to second pad having a reduced cross sectional area that is coupled to the first pad on a substrate, see Remarks at page 9 paragraph 1. Be that as it may, Wirz discloses the claimed first and second pads, the solder joint to a die interconnect and at the very least suggests the area relationships of claim.
Applicant argues that Examiner has merely relied on Rubin and Huan for teaching that square bond pads are conventional, See Remarks at page 9 paragraph 2. Applicant is correct. Because Wirz’s cross sections do not reveal depth, to prove the area relationship, Examiner has provided Rubin and Huan for the proposition that Wirz’s pads are conventional, i.e., square, which Applicant concedes is conventional in the art, see Remarks at page 9, paragraph 2.
Applicant argues that establishing square bond pads does not establish the claimed cross sectional areas of first and second pads. See Remarks at page 9 paragraph 2. Applicant is wrong. A square. by definition. has all side of equal length. Wirz shows one side. It follows, as squares, that side lengths are proportional to area. Applicant’s contention does not withstand a casual application of the definition of a square to Wirz’s disclosure.
Applicant again stresses the second pad coupled to a first surface of the first pad with related cross sectional area relationships as not being shown by the prior art, see Remarks at page 9, paragraph 4. As discussed above, Examiner understands that 112 is joined to 110 and so the two pads are coupled.
Applicant argues Rubin and Huang do not teach or suggest the second pad cross sectional area is less than the first pad cross sectional area, see Remarks at page 10 paragraph 2. Yet with knowledge that square pads are conventional, use of this fact enables Wirz’s disclosure to reach the claimed subject matter. Applicant is encouraged to apply or at least acknowledge the interrelated teachings of the prior art with the knowledge, skills and abilities of an artisan. Examiner, again, notes that in response to Applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986).
Applicant argues Examiner has failed to provide a rational[e] underpinning the conclusion of obviousness, see Remarks at page 10 paragraph 3. Examiner disagrees. Rubin and Huang teach square bond pads are conventional in the art, which Applicant concedes. The rationale underpinning requires recognizing that the cross sections provided in Wirz, applied to a square pad, as taught by Rubin and Huang, results in the required area relationships of claim 1. Applicant is reminded that the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Applicant points to no unexpected results when pads are square. Applicant’s allegation of patentability is merely that.
Applicant repeats argument for claim 1 as applied to claim 11, see Remarks at page 10 paragraph 3. For the reasons discussed above, Examiner is unpersuaded that rejection of claim 11 is reversible error.
Because Applicant has claimed separate pad structures, because Applicant has not provided a definition of a pad, because an artisan would recognize a pad as any combination structures between a solder joint and a substrate, because Wirz discloses two structures between the solder joint and the substrate, because application of Rubin and Huang teaching of square pads applied to Wirz results in area relationships of claim 1, Examiner is unconvinced that the rejection of claim 1 is reversible error.
Applicant is reminded of the right to appeal after being twice rejected, as is the case here. Applicant is encouraged to present argument with facts and analysis to clearly point to novelty. Mere allegations of impropriety, whatever that means, do not advance prosecution. Applicant is reminded that limitations may not be imported into the claims from the specification. See MPEP 2111.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 3-5 and 10-15 STAND rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2018/0342475 (Wirz), U.S. 2021/0183773 (Rubin) and US. 2025/0105212 (Huang).
Regarding claim 1 Wirz teaches and suggests at annotated Figure 2A an integrated circuit (IC) package, comprising:
a die comprising, 126 [0022], a plurality of die interconnects. 110 [0019]; and
a substrate, 126 [0021], comprising a lower metallization layer, 130/112 [0021-22], extending in a first direction, e.g. Z direction as annotated, the lower metallization layer comprising a plurality of metal interconnects, 130/112 [0021-24], the plurality of metal interconnects comprising:
a first pad, 130 [0021], having a first surface, as annotated, and a second surface, as annotated, opposite the first surface, as shown, in a second direction orthogonal to the first direction, i.e. xy direction as annotated, the first pad having a first cross-sectional area extending in the first direction; and
a second pad, 112 [0024], coupled to the first surface, as shown, the second pad having a second cross-sectional area extending in the first direction, z direction, and suggests it is less than the first cross-sectional area; and
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a solder joint, 114/253 [0024-25], coupled to the second pad, as shown, and a first die interconnect, e.g. 110, of the plurality of die interconnects, as shown, the first die interconnect having a third cross-sectional area extending in the first direction, as shown and Wirz suggests it is less than the first cross-sectional area, and the second cross-sectional area is at least equal to the third cross-sectional area.
Wirz does not explicitly teach a second cross-sectional area extending in the first direction less than the first cross-sectional area; and the second cross-sectional area is at least equal to the third cross-sectional area, i.e. Wirz does not teach the shapes of the pads and die interconnect structure in the xy plane
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Rubin is directed to semiconductor packaging. Rubin teaches at annotated Figure 1B an interconnect structure, e.g., interposer has square bond pad, 136 [0033].
Huang is directed to semiconductor packaging. At annotated Figure 14, Huang teaches an integrated circuit 50 [0016], has square bonding pads 84 [0026], i.e. die interconnect structures are square.
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Taken as a whole the prior art is directed to semiconductor packaging. Rubin and Huang teach it is conventional in the art to use square die and interposer bond pads. An artisan would find it useful to utilize known bond pad shapes. An artisan would recognize that when Wirz’s die and/or interposer bond are configured as square as taught by Rubin and Huang that a second cross-sectional area extending in the first direction less than the first cross-sectional area; and the second cross-sectional area is at least equal to the third cross-sectional area.
Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the device of claim 1 wherein a second cross-sectional area extending in the first direction less than the first cross-sectional area; and the second cross-sectional area is at least equal to the third cross-sectional area, to implement conventional bond pads that are square in the xy plane and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
Regarding claim 3 which depends upon claim 1, Examiner understands that the device of claim 1 with the plurality of metal interconnects further comprises: a second first pad having a fourth cross-sectional area extending in the first direction and a third surface extending in the first direction; and the IC package further comprises: a second second pad extending in the first direction and adjacent to the third surface, the second second pad having a fifth cross-sectional area extending in the first direction less than the fourth cross-sectional area; and a second solder joint coupled to the second second pad and a second die interconnect of the plurality of die interconnects, the second die interconnect having a sixth cross-sectional area extending in the first direction less than the fourth cross-sectional area, the sixth cross-sectional is less than or equal to the fifth cross-sectional area is a duplication of the interconnect structure of claim 1 and Examiner takes the position that mere duplication of parts has no patentable significance unless and new or unexpected result is obtained, See MPEP 2144.
Regarding claim 4 which depends upon claim 3, Examiner understands that the device of claim 1 wherein the first cross-sectional area is equal to the fourth cross-sectional area, the second cross-sectional area is equal to the fifth cross-sectional area, and the third cross-sectional area is equal to the sixth cross-sectional area perfects the duplication of parts analysis for claim 3 and so has no patentable significance absent a showing of a new or unexpected result, see MPEP 2144.
Regarding claim 5 which depends upon claim 3, Wirz teaches the first pad and the second first pad are coupled in the first direction to form a plane at Figure 2A, i.e. the abut one another.
Regarding claim 10 which depends upon claim 1 Wirz teaches inter alia at [0040], the disclosed package useful for mobile phones.
Accordingly it would have obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the package of claim 1 integrated into a device selected from the group consisting of: a set top box; an entertainment unit; a navigation device; a communications device; a fixed location data unit; a mobile location data unit; a global positioning system (GPS) device; a mobile phone; a cellular phone; a smart phone; a session initiation protocol (SIP) phone; a tablet; a phablet; a server; a computer; a portable computer; a mobile computing device; a wearable computing device; a desktop computer; a personal digital assistant (PDA); a monitor; a computer monitor; a television; a tuner; a radio; a satellite radio; a music player; a digital music player; a portable music player; a digital video player; a video player; a digital video disc (DVD) player; a portable digital video player; an automobile; a vehicle component; an avionics systems; and a multicopter because Wirz teaches this is a useful application of the package.
Regarding claim 11 and referring to the discussion at claim 1, Wirz teaches and suggests a method for fabricating a substrate, comprising:
forming a die, 126 [0022], comprising a plurality of die interconnects, 110 [0019];
forming a substrate, 126 [0021], comprising a lower metallization layer, 130/112 [0021p22], extending in a first direction, Z direction as annotated, the lower metallization layer comprising a plurality of metal interconnects, 130/112, the plurality of metal interconnects comprising:
a first pad, 130 [0021], having a first surface, as annotated, and a second surface, as annotated, opposite the first surface in a second direction orthogonal to the first direction, as annotated and shown, the first pad having a first cross-sectional area extending in the first direction;
forming a second pad, 112 [0024], coupled to the first surface, as shown, the second pad having a second cross-sectional area extending in the first direction and suggests it is less than the first cross-sectional area; and
coupling a solder joint, 114 [0024-25], to the second pad, as shown, and a first die interconnect, 110, of the plurality of die interconnects, and suggests the first die interconnect having a third cross-sectional area extending in the first direction and suggests it is less than the first cross-sectional area, the second cross-sectional area is at least equal to the third cross-sectional area.
Wirz does not explicitly teach a second cross-sectional area extending in the first direction less than the first cross-sectional area; and the second cross-sectional area is at least equal to the third cross-sectional area, i.e. Wirz does not teach the shapes of the pads and die interconnect structure in the xy plane
Rubin is directed to semiconductor packaging. Rubin teaches at annotated Figure 1B an interconnect structure, e.g., interposer has square bond pad, 136 [0033].
Huang is directed to semiconductor packaging. At annotated Figure 14, Huang teaches an integrated circuit 50 [0016], has square bonding pads 84 [0026], i.e. die interconnect structures are square.
Taken as a whole the prior art is directed to semiconductor packaging. Rubin and Huang teach it is conventional in the art to use square die and interposer bond pads. An artisan would find it useful to utilize known bond pad shapes. An artisan would recognize that when Wirz’s die and/or interposer bond are configured as square as taught by Rubin and Huang that a second cross-sectional area extending in the first direction less than the first cross-sectional area; and the second cross-sectional area is at least equal to the third cross-sectional area.
Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 10 wherein a second cross-sectional area extending in the first direction less than the first cross-sectional area; and the second cross-sectional area is at least equal to the third cross-sectional area, to implement conventional bond pads that are square in the xy plane and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007).
Regarding claim 12 which depends upon claim 11, Wirz teaches the second cross-sectional area is larger than the third cross-sectional area by an amount to ensure alignment between the solder joint and the second pad, i.e., solder joint is in the correct relative position with respect to the second pad.
Regarding claim 13 which depends upon claim 11, Examiner understands that the method of claim 11 wherein: the plurality of metal interconnects further comprises: a second first pad having a fourth cross-sectional area extending in the first direction and a third surface extending in the first direction; and the method further comprises: forming a second second pad extending in the first direction and adjacent to the third surface, the second second pad having a fifth cross-sectional area extending in the first direction less than the fourth cross-sectional area; and coupling a second solder joint to the second second pad and a second die interconnect of the plurality of die interconnects, the second die interconnect having a sixth cross-sectional area extending in the first direction less than the fourth cross-sectional area, the sixth cross-sectional area matches the fifth cross-sectional area, results in the duplication of the interconnect structure of claim 1 which has not patentable significance absent a showing of a new or unexpected result, see MPEP 2144.
Regarding claim 14 which depends upon claim 13, Examiner understand that the method of claim 13 wherein the first cross-sectional area is equal to the fourth cross-sectional area, the second cross-sectional area is equal to the fifth cross-sectional area, and the third cross-sectional area is equal to the sixth cross-sectional area results from the duplication of the structure produced by the method claim 11 which has no patentable weight absent a showing of a new or unexpected result, see MPEP 2144.
Regarding claim 15 which depends upon claim 13, Wirz teaches the first pad and the second first pad are coupled in the first direction to form a plane, i.e. they abut one another.
Allowable Subject Matter
Claims 2, 6-9 and 16-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 2 the prior art does not teach the device claim 1, wherein the substrate further comprising: an upper metallization layer extending in the first direction, the upper metallization layer comprising a second plurality of metal interconnects, the second plurality of metal interconnects comprising: a second first pad having a fourth cross-sectional area extending in the first direction and a third surface extending in the first direction; and wherein the IC package further comprises: a second second pad extending in the first direction and adjacent to the third surface, the second second pad having a fifth cross-sectional area extending in the first direction and less than the fourth cross-sectional area; and a second solder joint coupled to the second second pad and a second die interconnect of the plurality of die interconnects, the second die interconnect having a sixth cross-sectional area extending in the first direction and less than the fourth cross-sectional area, the sixth cross-sectional is less than or equal to the fifth cross-sectional area.
Regarding claim 6 the prior art fails to disclose the device claim 1, wherein the second cross-sectional area is equal to or less than 30π square micrometers (μm2).
Regarding claim 7 the prior art fails to disclose the device claim 1, wherein the first die interconnect of the plurality of die interconnects has a first height less than 37 micrometers (μm).
Regarding claim 8 depends upon claim 6 and is allowable on that basis.
Regarding claim 9 depends upon claim 7 and is allowable on that basis.
Regarding claim 16, the prior art fails to teach the method of claim 11 wherein the second cross-sectional area is equal to or less than 30π square micrometers (μm2).
Regarding claim 17 the prior art does not teach the method of claim 11, wherein the first die interconnect of the plurality of die interconnects has a first height less than 37 micrometers (μm).
Regarding claim 18 the prior art does not teach the method of claim 16, wherein the solder joint has a second height of less than 30 μm.
Regarding claim 19 depends upon claim 17, and is allowable on that basis.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is listed on the notice of references cited.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joe Schoenholtz whose telephone number is (571)270-5475. The examiner can normally be reached M-Thur 7 AM to 7 PM PST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ms. Yara Green can be reached at (571) 272-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.E. Schoenholtz/Primary Examiner, Art Unit 2893
Prosecution Insights