Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
1. Claim(s) 1-3,19-23 are rejected under 35 U.S.C. 102a(1) as being anticipated by US 20130056847 A1 (Chen).
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Regarding claim 1, Chen shows (Fig. 4) an integrated circuit (IC) package, comprising:
an integrated circuit (IC) die (410, para 27) including an input/output (I/O) pad (not shown in figure but stated in claim 6 as a connector); and
a vertical thin-film inductor (TFI) extending vertically (420, para 27, not repeated for the current embodiment, extending from the bottom of die 410 to the ball 460) substantially from the I/O pad to a solder bump (460, solder ball (para 33).
Regarding claim 2, Chen shows (Fig. 4) wherein the vertical TFI (420) comprises an electrical conducting pillar (472, 436,438 post, para 28,31) extending vertically substantially from the I/O pad (connector as in claim 6) to a solder bump (460).
Regarding claim 3, Chen shows (Fig. 4) wherein the electrical conducting pillar (472, 436,438 post) comprises copper (para 34, since posts are part of the metal interconnect structure).
Regarding claim 19, Chen shows (Fig. 4) further comprising a passivation layer (452, 456 para 31,33) coaxially surrounding the electrical conducting pillar (472, 436, 438, para 33).
Regarding claim 20, Chen shows (Fig. 4) wherein the passivation layer comprises a polymer (para 34, polyimide a type of polymer) or an epoxy mold compound.
Regarding claim 21, Chen shows (Fig. 4) wherein the polymer comprises polyimide (para 34) or polybenzoxazoles (PBO).
Regarding claim 22, Chen shows (Fig. 4) a method of fabricating an integrated circuit (IC) package, comprising:
providing an integrated circuit (IC) (410, para 27) including an input/output (I/O) pad (not shown in figure but stated in claim 6 as a connector);
forming a vertical thin-film inductor (TFI) extending vertically (420, para 27, not repeated for the current embodiment, extending from the bottom of die 410 to the ball 460) from substantially the I/O pad; and
forming a solder bump (460, solder ball (para 33) over the vertical TFI.
Regarding claim 23, the prior art/s as noted in the above rejection of claim 2, discloses the entire claimed invention.
Allowable Subject Matter
Claims 4-18, 24-30 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 4 or 24, the prior art of record, either singularly or in combination, does not disclose or suggest the combination of limitations including “first magnetic semi-ring layer electrically isolated from the electrical conducting pillar”.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to WASIUL HAIDER whose telephone number is (571)272-1554. The examiner can normally be reached M-F 9 a.m. - 6 p.m..
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/WASIUL HAIDER/Primary Examiner, Art Unit 2812