DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 12/07/23 was/were received by the Examiner before the issuance/mailing date of the first office action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) has/have been considered (except for anything in foreign language non-accompanied by an English translation) by the Examiner.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "70" and "71" have both been used to designate a same layer, and reference characters “60” and “62” are used to designate a same layer. Applicants are advised to use a symbol such as “}” for reference number 70, and another for 60 to show that 60 contains or encompasses 62 and 61 Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
The drawings are objected to because the layer between layer 30 and layer 40 is not labeled and described. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 1 recites the limitation “an etching layer, the etching layer being etched with the second electrode as a pattern reference” (emphasis added). The expression “etching layer” conveys the sense of a material layer. The description of the so-called “etching layer” (which is item 72 described in [0031] and [0033]-[0034]) does not explain it to be made of any material, but rather hints that it is a trench or opening etched into layer 71. So, the Examiner believes that 72 is merely a trench or opening etched in layer 71, and as such, a trench or opening is not a layer and cannot be reasonably construed as a layer in the art. If that is the case, Applicants should revise the description and claims to use, for structural element 72, a term conventionally accepted to describe a structure such as a trench or opening. Applicants should refrain from responding by arguing back that Applicants can be his/her own lexicographer because to do so for the problematic expression “etching layer” which is used in a sense contrary to what is conventional, the description must have clearly redefined the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term (see MPEP 2111.01.IV). In case Applicants would disagree with the assessment above and were to maintain that the so-called “etching layer” 72 is a material layer in the conventional sense, then Applicants must describe how it is formed and etched to leave the portion labeled 72 in the drawings, and also described which material the so-called “etching layer” is made of so that as required by 35 U.S.C. 112, the specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1 further recites “an etching layer, the etching layer being etched with the second electrode as a pattern reference to increase resistance by etching so that current flows in the direction toward the main semiconductor layer to achieve steering effect” (emphasis added). It is unclear from the description of the invention how the resistance is increased by etching besides the lack of precision of which type of resistance (electrical, mechanical or chemical) is involved.
Claim 5 recites “the first semiconductor layer is exposed to the second semiconductor layer and the light-emitting layer.”. It is unclear how the first semiconductor layer (30) is exposed to the second semiconductor layer (50) and the light-emitting layer (40) since to the second semiconductor layer (50) and the light-emitting layer (40) are entirely above the first semiconductor layer (30).
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “the direction” and claim 7 recites “the other semiconductor layers”. There are lacks of antecedent basis for those limitations in the claims.
Claims 11 and 12 each recites “the extension electrode” (note the singular form). This limitation is found indefinite because it is unclear which one of the “plurality of extension electrodes” recited in independent claim 1 they are referring back to.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 5-6 and 11-12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Ko et al. (US 2010/0052000).
a. Re claim 1, Ko et al. disclose a light-emitting diode current-steering device for enhancing light extraction efficiency of a light-emitting diode and improving current-steering, comprising: a contact electrode 12 (layer 12 on fig. 3 is described to be a metal layer or an ohmic contact layer and therefore can reasonably be construed as a contact electrode; see figs. 3-18 and related text; see remaining of disclosure for more details); a substrate 11 ([0052]) connected to the contact electrode; a first electrode 18 ([0058]) connected (via 13 and 12) to the substrate; a first semiconductor layer 13 ([0050]) electrically connected to the first electrode; a light-emitting layer 14 ([0050]-[0051]) electrically connected to the first semiconductor layer; a second semiconductor layer 15 ([0050]) electrically connected to the light-emitting layer; a second electrode 17 ([0058]) having a main electrode 171 ([0072], figs. 13-18) and a plurality of extension electrodes 172&173; and a current-steering layer 16 ([0058]) disposed between one side of the second semiconductor layer and one side of the second electrode (explicit on fig. 3), the current-steering layer having a main semiconductor layer (body portion of 16 extending between portions 161 or portions 161&164 or between portions 161&164 and 1611-1616 on fig. 13; note in [0058] that 16 is disclosed to be made of semiconductor doped semiconductor material) and an etching layer 161 (or 161&164 or 161&164&1611-1616), “the etching layer being etched with the second electrode as a pattern reference to increase resistance by etching” (see product-by-process remarks below for the quoted limitation) so that current flows in a direction toward the main semiconductor layer to achieve steering effect (discontinuities 161 are disclosed in at least [0061] to steer current towards areas that include the semiconductor body as defined above).
a'. In the alternative to the above, claim 1 can be rejected as followed based on figs. 16-18: Ko et al. disclose a light-emitting diode current-steering device for enhancing light extraction efficiency of a light-emitting diode and improving current-steering, comprising: a contact electrode 18a (see [0077]; see figs. 3-16-18 and related text; see remaining of disclosure for more details); a substrate 11 ([0052]) connected (via 12&13, noting that it is implicit from fig. 3 that platform 153 in figs. 16-18 is a representation of stacked layers 11-14 of fig. 3) to the contact electrode; a first electrode 18b ([0077]) connected (via 13 and 12) to the substrate; a first semiconductor layer 13 ([0050]) electrically connected to the first electrode; a light-emitting layer 14 ([0050]-[0051]) electrically connected to the first semiconductor layer; a second semiconductor layer 15 ([0050]) electrically connected to the light-emitting layer; a second electrode 17 ([0058]) having a main electrode 171 ([0072], figs. 13-18) and a plurality of extension electrodes 172&173; and a current-steering layer 16 ([0058]) disposed between one side of the second semiconductor layer and one side of the second electrode (explicit on fig. 3), the current-steering layer having a main semiconductor layer (body portion of 16 extending between labeled and unlabeled discontinuity portions like 161 and other in 16 as visible on figs. 16-18; note in [0058] that 16 is disclosed to be made of semiconductor doped semiconductor material) and an etching layer (labeled and unlabeled discontinuity portions like 161 and other in 16 as visible on figs. 16-18), “the etching layer being etched with the second electrode as a pattern reference to increase resistance by etching” (see product-by-process remarks below for the quoted limitation) so that current flows in a direction toward the main semiconductor layer to achieve steering effect (discontinuities 161 and the likes are disclosed in at least [0061, [0072]-[0073] and [0083] to steer current towards areas that include the semiconductor body as defined above).
The Examiner notes that the process limitations of ““the etching layer being etched with the second electrode as a pattern reference to increase resistance by etching”” found in product claim(s) 1 invoke the product-by-process doctrine. Product-by-process claims are not limited to the manipulations of the recited steps, only the structure implied by the steps (MPEP § 2113). For example, anticipation of claim 1 does not require “the etching layer being etched with the second electrode as a pattern reference to increase resistance by etching” wherein it is noted that the discontinuities pointed out above as reading on the etching layer are electrically insulating areas as per at least [0057] and therefore would increase electrical resistance in layer 16.
b. Re claim 5, the first semiconductor layer is exposed (in an oblique direction intersection layers 13-15 in the step area of 13 where 18 is formed) to the second semiconductor layer and the light-emitting layer.
c. Re claim 6, “a roughening process is performed on the main semiconductor layer” (this quoted limitation falls under the product-by-process doctrine invoked above and therefore, only the structure matters in this case, and this structure is the main semiconductor layer 171 having a roughened surface, which can be seen in fig. 5c for example; see [0062]) to improve the light extraction efficiency ([0062] states “For example, there is a rough contact surface 171 between the second electrical connector 17 and the contact layer 16 in order to increase the contact area between each other. The larger contact area can enhance the structure stability of the electrical connector 17 or allow more current pass”, so more current passing would implicitly result in improved light output, thus improved light extraction efficiency).
d. Re claim 11 and in view of the 112 2nd rejection above, the main electrode, at least one of the plurality of
e. Re claim 12 and in view of the 112 2nd rejection above, when the main electrode and at least one of the plurality of s are used (at least in part) as a reference for the region of the etching layer, a connection position (junction position between 171 and 172 on fig. 14) between the main electrode and the extension electrode is not etched (i.e. is not removed) “to achieve an improved steering effect” (the limitation “to achieve an improved steering effect” does not structurally distinguish over fig. 14 of Ko et al. wherein it is noted that he fact that there is not disconnect between 171 and 172 allows current to flow farther from 171 to farther regions of 16 thereby improving the steering of said current by 172&173 and 16).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-4, 7 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ko et al. (US 2010/0052000).
a. Re claim 2, Ko et al. disclose all the limitations of claim 1 as stated above except explicitly that the contact electrode is composed of a combination of titanium/gold or nickel/gold. However, it is conventionally known in the art that nickel and titanium offer good diffusion and corrosion barrier properties and gold offers excellent corrosion barrier and electrical conductivity properties. As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the contact electrode is composed of a combination of titanium/gold or nickel/gold in order to benefit from the advantageous properties listed above (see MPEP 2144.I&II).
b. Re claim 3, Ko et al. disclose all the limitations of claim 1 as stated above including that the first semiconductor layer is a P-type layer or an N-type layer (see [0050]), except explicitly that the semiconductor layer is an epitaxial layer. However, it is conventionally known in the art that epitaxial semiconductor layers have higher purity, less crystal defects and higher electrical conductivity compared to semiconductor layers made by other less sophisticated methods. As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the first semiconductor layer to be an epitaxial semiconductor layer in order to benefit from the advantages listed above (see MPEP 2144.I&II).
c. Re claim 4, Ko et al. disclose all the limitations of claim 1 as stated above including that the second semiconductor layer is a P-type layer or an N-type layer (see [0050]), except explicitly that the semiconductor layer is an epitaxial layer. However, it is conventionally known in the art that epitaxial semiconductor layers have higher purity, less crystal defects and higher electrical conductivity compared to semiconductor layers made by other less sophisticated methods. As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the second semiconductor layer to be an epitaxial semiconductor layer in order to benefit from the advantages listed above (see MPEP 2144.I&II).
d. Re claim 7 and in view of the 112 2nd rejection above, Ko et al. disclose all the limitations of claim 1 as stated above including that the main semiconductor layer is a P-type [semiconductor] layer or an N-type [semiconductor] layer (as a doped semiconductor layer as per [0054], 16 is necessarily either a p-type or n-type) and has a thickness thinner than the first and second semiconductor layers (explicit on fig. 3), except explicitly that the semiconductor layer is an epitaxial layer. However, it is conventionally known in the art that epitaxial semiconductor layers have higher purity, less crystal defects and higher electrical conductivity compared to semiconductor layers made by other less sophisticated methods. As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the semiconductor layer 16 (thus the main semiconductor layer also) to be an epitaxial semiconductor layer in order to benefit from the advantages listed above (see MPEP 2144.I&II).
e. Re claim 10, Ko et al. disclose all the limitations of claim 1 as stated above except explicitly that the second electrode is composed of germanium, titanium, nickel, platinum, gold or chromium. However, it is conventionally known in the art that gold offers excellent corrosion barrier and electrical conductivity properties. As such, it would have been obvious to one skilled in the art before the effective filing date of the invention to have provided the second electrode composed of gold in order to benefit from the advantageous properties listed above (see MPEP 2144.I&II).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Tarsa et al. (US 6,885,036), Ou et al. (US 2005/0285136) and Wu et al. (US 6,445,007) disclose structures similar to the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENIEL M GUMEDZOE whose telephone number is (571)270-3041. The examiner can normally be reached M-F: 9:00AM - 5:30PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PENIEL M GUMEDZOE/Primary Examiner, Art Unit 2899