DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 11-14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yamaoka (US 2018/0254087).
Regarding claim 11, Yamaoka (Fig. 11) shows a method of driving a semiconductor memory device, the method comprising:
setting a victim word line (any word line adjacent to the selected word line) from address information of an aggressor word line (the unselected word line adjacent to the selected word line is located based on address information of the selected word line); and
temporarily applying a victim voltage (from t3 until the voltage of WLunsel to Vss), which is lower than an off voltage (Vread is considered the off voltage because it is used to deactivate the unselected word line), to the victim word line during a falling section of the aggressor word line (from CR to Vss).
Regarding claim 12, Yamaoka discloses the method of claim 11, wherein the address information of the aggressor word line comprises address information of a selected word line among the word lines.
Regarding claim 13, Yamaoka discloses the method of claim 12, wherein the victim word line comprises at least one of word lines adjacent to the selected word line (any unselected word line adjacent to the selected word line).
Regarding claim 14, Yamaoka discloses the method of claim 12, further comprising:
applying a driving voltage having a logic high level (CR) to the aggressor word line during an enable section of the aggressor word line; and applying the off voltage having a logic low level (Vread is considered the off voltage having a logic low (lower than CR) to non-selected word lines among the word lines.
Allowable Subject Matter
Claims 7, 9, 10 and 18 are allowed.
Claims 19 and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 7, the prior art made of record and considered pertinent to the applicant's disclosure does not teach the claimed limitation of “applying an off voltage having a logic low level to non-selected word lines among the plurality of word lines; and temporarily applying a victim voltage, which is different from the off voltage, to a word line adjacent to the selected word line among the non-selected word lines during a falling section where a voltage of the selected word line is transited from the driving voltage to the off voltage, wherein a voltage level of the victim voltage is lower than a voltage level of the off voltage.” in combination with the other limitations thereof as is recited in the claim. Claims 9 and 10 depend on claim 7.
Regarding claim 18, the prior art made of record and considered pertinent to the applicant's disclosure does not teach the claimed limitation of “applying an off voltage having a logic low level to remaining non-selected word lines of the memory bank; and temporarily applying a victim voltage, which is different from the off voltage, to a word line that is disposed adjacent to the selected word line among the non-selected word lines when the voltage of the selected word line is falling from the driving voltage to the off voltage, wherein a voltage level of the victim voltage is lower than a voltage level of the off voltage.” in combination with the other limitations thereof as is recited in the claim. Claims 9 and 10 depend on claim 7.
Regarding claim 19, the prior art made of record and considered pertinent to the applicant's disclosure does not teach the claimed limitation of “wherein the falling section is delayed from a falling edge where a driving voltage to be applied to the aggressor word line is transited to the off voltage.” in combination with the other limitations thereof as is recited in the claim.
Regarding claim 19, the prior art made of record and considered pertinent to the applicant's disclosure does not teach the claimed limitation of “wherein a voltage having a logic high level is applied to the aggressor word line, and the off voltage comprises a ground voltage.” in combination with the other limitations thereof as is recited in the claim.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUAN HOANG whose telephone number is (571)272-1779. The examiner can normally be reached 7:30AM-4:00PM M-F.
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/HUAN HOANG/Primary Examiner, Art Unit 2827
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