Prosecution Insights
Last updated: April 19, 2026
Application No. 18/533,185

TRANSPARENT DISPLAY APPARATUS

Non-Final OA §DP
Filed
Dec 08, 2023
Examiner
KEBEDE, BROOK
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Auo Corporation
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
93%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allow Rate
887 granted / 1000 resolved
+20.7% vs TC avg
Minimal +4% lift
Without
With
+4.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
28 currently pending
Career history
1028
Total Applications
across all art units

Statute-Specific Performance

§101
1.6%
-38.4% vs TC avg
§103
33.9%
-6.1% vs TC avg
§102
31.0%
-9.0% vs TC avg
§112
11.6%
-28.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1000 resolved cases

Office Action

§DP
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claims 1, 3, 6, 7, 8 and 10 objected to because of the following informalities: Claims 1 recites the limitation “a transparent substrate, having a plurality of display areas and a plurality of transparent areas; a first pixel array, disposed on the transparent substrate, wherein the first pixel array comprises a plurality of first pixels, arranged in an array along a first direction and a second direction, wherein the first direction and the second direction intersect, and each of the first pixels overlaps a corresponding display area; and a plurality of first openings, wherein each of the first openings is surrounded by a portion of the first pixels, and each of the first openings overlaps with a corresponding transparent area; a plurality of signal lines, disposed on the transparent substrate and are electrically connected to the first pixels; and a light leakage suppression element, comprising a plurality of light blocking structures spaced apart from each other, wherein the transparent substrate has a first side and a second side opposite to each other, the first pixels are disposed on the first side of the transparent substrate, and at least a portion of each of the light blocking structures of the light leakage suppressing element is disposed on the second side of the transparent substrate” in lines 2-17. However, there is a lack of proper antecedent basis for “the first pixels,” in lines 6-7, 9, 12 and 15, for “each of the first openings,” in lines 8 and 9, “the light blocking structures,” in line 16. Changing “the first pixels” to -- the plurality of first pixels -- provides proper antecedent basis and constancy in the claim. Similar changes should properly be applied in claims 3, 7 and 8 also. Changing “each of the first openings” to -- each of the plurality of first openings -- provides proper antecedent basis and constancy in the claim. Changing “the light blocking structures” to -- the plurality of light blocking structures -- provides proper antecedent basis and constancy in the claim. Similar changes should properly be applied in claims 2, 3 and 6 also. Claim 10 recites the limitation “wherein the light leakage suppression element comprises: a first light blocking pattern layer, having a plurality of first light blocking patterns spaced apart from each other; a second light blocking pattern layer, having a plurality of second light blocking patterns spaced apart from each other, wherein the first light blocking patterns respectively overlap with the second light blocking patterns; and a transparent spacer layer disposed between the first light blocking pattern layer and the second light blocking pattern layer, wherein each of the light blocking structure comprises one of the first light blocking patterns and one of the second light blocking patterns overlapping with each other” in lines 1-11. However, there is a lack of proper antecedent basis for “the first light blocking patterns” and “the second light blocking patterns” in the claim. Chaing “the first light blocking patterns” and “the second light blocking patterns” to --“the plurality of first light blocking patterns” and “the plurality of second light blocking patterns” provides proper antecedent basis. Applicant’s cooperation is requested in reviewing the claims’ structure to ensure proper claim construction and to correct any subsequently discovered instances of claim language noncompliance. See Morton International Inc., 28USPQ2d 1190, 1195 (CAFC, 1993). Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1 and 3 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 7 of copending Application No. 18/772,286 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because of the followings: Although the conflicting claims are not identical, the scope of the claimed limitations of the instant application as claimed in claims 1 and 3 is similar to that of the claimed limitations of copending Application No. 18/772,286 as claimed in claims 1 and 7. Therefore, the claims are not patentably distinct from each other. The instant Application: 1. A transparent display apparatus, comprising: a transparent substrate, having a plurality of display areas and a plurality of transparent areas; a first pixel array, disposed on the transparent substrate, wherein the first pixel array comprises a plurality of first pixels, arranged in an array along a first direction and a second direction, wherein the first direction and the second direction intersect, and each of the first pixels overlaps a corresponding display area; and a plurality of first openings, wherein each of the first openings is surrounded by a portion of the first pixels, and each of the first openings overlaps with a corresponding transparent area; a plurality of signal lines, disposed on the transparent substrate and are electrically connected to the first pixels; and a light leakage suppression element, comprising a plurality of light blocking structures spaced apart from each other, wherein the transparent substrate has a first side and a second side opposite to each other, the first pixels are disposed on the first side of the transparent substrate, and at least a portion of each of the light blocking structures of the light leakage suppressing element is disposed on the second side of the transparent substrate. 3. The transparent display apparatus according to claim 1, wherein the first pixels are arranged with a first pitch in the second direction, the light blocking structures are arranged with a second pitch in the second direction, and the first pitch and the second pitch are substantially equal. Co-pending Application 18/772,286: 1. A transparent display apparatus, comprising: a transparent substrate, having a plurality of display areas and a plurality of transparent areas; a pixel array, disposed on the transparent substrate, wherein the pixel array comprises: a plurality of pixels, arranged in an array in a first direction and a second direction, wherein the first direction and the second direction intersect, and each of the pixels overlaps with a corresponding one of the display areas; and a plurality of openings, wherein each of the openings is surrounded by a part of the pixels, and the each of the openings overlaps with a corresponding one of the transparent areas; a plurality of signal lines, disposed on the transparent substrate and are electrically connected to the pixels; and a light blocking element, comprising a plurality of light blocking pillars spaced apart from each other, wherein the transparent substrate has a first side and a second side opposite to each other, the pixels are disposed on the first side of the transparent substrate, and the light blocking pillars are disposed on the second side of the transparent substrate.  7. The transparent display apparatus according to claim 1, wherein the light blocking pillars are arranged at equal intervals with a first pitch in a first arrangement direction parallel to the transparent substrate, the light blocking pillars are arranged at equal intervals with a second pitch in a second arrangement direction parallel to the transparent substrate, the light blocking pillars are arranged at equal intervals with a third pitch in a third arrangement direction parallel to the transparent substrate, the first arrangement direction, the second arrangement direction, and the third arrangement direction are intersected and not perpendicular to each other, and the first pitch, the second pitch, and the third pitch are substantially equal.  This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.   Allowable Subject Matter Claim 2 and 4-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure Zhang et al. (US 2015/0153488) and Feng (US 2017/0168223) also disclose similar inventive subject matter. Correspondence Any inquiry concerning this communication or earlier communications from the examiner should be directed to BROOK KEBEDE whose telephone number is 571-272-1862. The examiner can normally be reached Monday Friday 8:00 AM 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at 571-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BROOK KEBEDE/ Primary Examiner, Art Unit 2894 /BK/ February 4, 2026
Read full office action

Prosecution Timeline

Dec 08, 2023
Application Filed
Feb 04, 2026
Non-Final Rejection — §DP (current)

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
93%
With Interview (+4.3%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 1000 resolved cases by this examiner. Grant probability derived from career allow rate.

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