DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-13 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
The applicant has amended the independent claim 1 to include:
wherein the first spacer and the second spacer are discrete structures separated from each other by a space, and extending from the second semiconductor layer to the second electrode by crossing the space between the first spacer and the second spacer.
However, as seen from Fig. 1A, there is no space between the spacers 110A and 110B, but rather element 160 which is a transparent molding layer.
Furthermore, element 170, which is the transparent conductive layer, does not cross the space between spacers 110A and 110B. In support for the amendment, the applicant argued, on page 8 of the remarks filed on 5/29/2026,
“Support for these amendments can be clearly found in the original specification and the drawings as filed, particularly in FIG. 1A. As illustrated in FIG. 1A, the first spacer (110a) and the second spacer (110b) are depicted as two structurally independent and physically disconnected components formed on the substrate, with a clear spatial gap separating them. Additionally, FIG. 1A shows the transparent conductive layer (170) originating from the LED structure (140) located on the first spacer (110a), physically traversing the space separating the two discrete spacers, and terminating at the second electrode (130) located within the second spacer (110b)”.
Hence, the applicant argues about “spatial gap” and “traversing” which are not present in the disclosure. Likewise, the language, “crossing” and “space” are not present in the disclosure neither.
Applicant is kindly requested to explain where the added limitations are present in the specification and the drawings as originally filed. The examiner is readily available for an interview at any time of preference.
For examination purposes, the added portions of the claim are removed from consideration.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Sakariya et al. (2014/0159064).
Regarding Claim 1, in Figs. 5A and 15G, Sakariya et al. discloses a display element, comprising: a first spacer 110 (the right one); a second spacer 110 (the left one), located on one (left) side of the first spacer; at least one first electrode 420, surrounded by the first spacer 110; a second electrode 470, surrounded by the second spacer; at least one light-emitting diode (LED) structure450 (p-n diode), located on the first electrode 470, and comprising: a first semiconductor layer 414 (top or bottom one), located on the first electrode 420; a multi-quantum well layer 416 , located on the first semiconductor layer; and a second semiconductor layer 414, located on the multi-quantum well layer; a reflective layer 132, located on a sidewall of the first spacer 110 (right one) facing the LED structure; a first transparent molding layer 142/150 (see paragraph 0125 and 0149), located on the reflective layer 132 and surrounding the LED structure, wherein a top surface of the second semiconductor layer 414 (the other of the top or bottom one) is higher than a top surface of the first transparent molding layer 142/150 (see paragraph 0109 and 0139); and a transparent conductive layer 160 (see paragraph 0150 and 0151), located on the top surface of the transparent molding layer 142/150 and the top surface of the second semiconductor layer 414, and extending to the second electrode 470.
Regarding Claim 2, the sidewall of the first spacer 110 (the right one) is a stepped surface (tapered).
Regarding Claim 3, included angle between the sidewall of the first spacer 110 (the right one) and a lower surface is 30-55 degrees (see paragraph 0117).
Regarding Claim 4, a light-absorbing structure 170, located on the transparent conductive layer 160 and surrounding a top portion of the second semiconductor layer 414 (the other of the top or bottom one)
Regarding Claim 5, a second transparent molding layer 142/150, located on the transparent conductive layer 160 and surrounded by the light-absorbing structure 170.
Regarding Claim 6, a substrate 100, located on the second transparent molding layer 142/150 (see paragraph 0111, 0113, 0116, 0117).
Regarding Claim 7, the substrate 100 has a light-absorbing layer inside, and the light-absorbing layer is located on the light-absorbing structure (see paragraph 0111, 0113, 0116, 0117).
Regarding Claim 8, the substrate 100 has a light-reflective layer inside, and the light-reflective layer is located on a sidewall of the light-absorbing layer (see paragraphs 0111 and 0113)
Regarding Claim 9, the substrate 100 has a light-reflective layer inside, and the light-absorbing layer is located on the light-absorbing structure (see paragraphs 0111 and 0113)
Regarding Claim 10, the substrate 100 has a thickness of less than 0.5 mm (see paragraph 0116, 0117 and 0139).
Regarding Claim 11, the reflective layer 132, the first electrode 420 and the second electrode 470 are formed by a same film layer (see paragraph 0143)
Regarding Claim 12, there are three LED structures arranged in a column, the three LED structures are a red LED structure, a green LED structure and a blue LED structure respectively, there are three first electrodes, the first semiconductor layers of the three LED structures are electrically connected to the three first electrodes respectively, and the second semiconductor layers of the three LED structures are electrically connected to the second electrode (see Figs. 5A, 5B and paragraphs 0008, 0126, 0139, 0141)
Regarding Claim 13, there are a plurality of LED structures arranged in a plurality of columns, and the LED structures in each of the columns comprise a red LED structure, a greenLED structure and a blue LED structure, there are a plurality of first electrodes, the first semiconductor layers of the LED structures are electrically connected to the first electrodes respectively, and the second semiconductor layers of the LED structures are electrically connected to the second electrode (see Figs. 5A, 5B and paragraphs 0008, 0126, 0139, 0141)
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to FAZLI ERDEM whose telephone number is (571)272-1914. The examiner can normally be reached M-F, 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/FAZLI ERDEM/Primary Examiner, Art Unit 2812 6/10/2026
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