DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Domestic Benefit
No claim to an application for domestic benefit.
Foreign Priority
Receipt is acknowledged of certified copies of papers (i.e., application number 202211581689.2 filed in China on 12/09/2022) required by 37 CFR 1.55 electronically retrieved on 01/06/2024.
Two Information Disclosure Statements
The two information disclosure statements respectively submitted on 12/08/2023 and 03/9/2026 were both filed before first Office action. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the two information disclosure statements have been considered.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title or similar is suggested:
-- SEMICONDUCTOR DEVICE WITH SEGMENTED EMITTER REGIONS AND VARIABLE-GEOMETRY GATE BUSBAR FOR UNIFORM GATE SIGNAL PROPAGATION --.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 5, 8 and 26 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by CN 114220853 to Yao et al (“Yao”).
Regarding independent claim 1, Yao teaches (see fig. 4 and corresponding text) discloses a semiconductor device having a plurality of cells (see corresponding text) , each of the plurality of cells comprising a gate (implicit, see fig. 4, below emitter pad 11), wherein the semiconductor device comprises a gate pad (see fig. 4, gate pad 12, erroneously as 11), a gate busbar (13) and a plurality of gate lines (implicit, see fig. 4, below emitter pad 11, gate fingers connecting gates of the cells), the gate busbar connects the gate pad to the plurality of gate lines (implicit, see fig. 4), the plurality of gate lines connects the gate busbar to the gates of the plurality of cells (implicit, see fig. 4), each of the plurality of gate lines is disposed along a first axis (see fig. 4), the gate busbar comprises a plurality of first portions (see fig. 4, portions of gate busbar 13 parallel to the gate pad) each disposed along a second axis (see fig. 4) and at least one second portion each disposed along the first axis (see fig. 4, portion of gate busbar 13 perpendicular to the first portions), the second axis intersects with the first axis (see fig. 4), the plurality of first portions are spaced apart from each other to divide the semiconductor device into a plurality of emitter segments (11 ), lengths of the plurality of emitter segments along the first axis (the lengths of the emitter segments change since the shape of each of the emitter segments 11 in fig. 4 is different from each other) and widths or thicknesses of the plurality of first portions or the at least one second portion change with respective distances thereof from the gate pad (see fig. 4), such that gate signals arriving at the gates of the plurality of cells from the gate pad via the gate busbar and the plurality of gate lines are consistent (implicit, since all the technical features are disclosed by Yao).
Yao’s Figure 4 also teaches the limitations of claims 2, 5, 8 and 26.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 9 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over CN 114220853 to Yao et al (“Yao”) in view of US 2017/0278957 A1 to Hikasa.
Yao teaches all limitations of claim 1 and claim 2 and claim 8 from which claim 9 depends.
Regarding claim 9, Yao does not disclose the features wherein each of the plurality of first portions is provided with an opening.
The problem to be solved by this feature may be regarded as how to improve the connectivity of the emitter pad.
Yao (see fig. 1, 2) show one of the portions being provided with an opening. Hikasa (see fig. 1) shows a semiconductor device with an emitter pad (3), a gate pad (12) and gate fingers (first portions) (10) on an upper face of the device, similar to Yao. Hikasa shows the possibility of forming the gate fingers with openings.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize that combining Hikasa’s openings with Yao’s invention would have been beneficial in order to provide further electrical connections to other outside devices.
Yao teaches all limitations of claim 1 and claim 2 from which claim 24 depends.
Yao does not disclose the features of claim 24, wherein the gate pad is located at a corner, in the middle of a side edge, or in a middle region of the semiconductor device.
The problem to be solved by this feature may be regarded as how to provide a more versatile gate pad.
Yao (see fig, 1, 2) forms a gate pad in the middle of a bottom region but is silent about providing the gate pad differently. Hikasa (see fig. 1) shows the possibility of forming a gate pad in a corner.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to recognize that combining Hikasa’s gate pad location with Yao’s invention would have been beneficial in order to provide more preferred electrical connections in certain needed regions over other regions.
Allowable Subject Matter
Claims 3-4, 6-7, 10-23 and 25 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The alternative layouts of gate busbar and emitter segments disclosed in claims 3, 11 and 17 would not be apparent from Yao. These alternative solutions also reduce the gate signal difference between cells of the device. One of ordinary skill in the art before the effective filing date of the claimed invention would not modify the layout shown in Yao without applying inventiveness. Hence, the subject matter of claims 3, 6, 7, 11, 17 as well as that of dependent claims 4, 12-16 and 18-23 and 25 is to be considered inventive over Yao. Claim 10 is not made obvious over Yao.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN P DULKA whose telephone number is (571)270-7398. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ELISEO RAMOS-FELICIANO can be reached at (571)272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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29 March 2026
/John P. Dulka/Primary Examiner, Art Unit 2817
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