DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Note from the Examiner
For clarity, references to specific claim numbers are presented in bold. Cited claim limitations are presented in bold the first time they are associated with a particular prior art disclosing the cited limitations, and subsequent reference to the already disclosed claim limitations are presented un-bolded. Certain elements from prior art which are not required by the claims are also presented un-bolded if they are particularly pertinent to understanding how the references are being combined. Item-to-item matching and Examiner explanations for 102 and 103 rejections have been provided in parenthesis.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kaji et al. (WO 2020136810 A1), hereinafter referred to as “Kaji” (please note that all citations from Kaji herein are made with reference to the Espacenet English translation of Kaji received from applicant on December 8, 2023);
[Matsuoka et al. (US 20100002455 A1), hereinafter referred to as “Matsuoka”. Is utilized herein as evidence].
Regarding Claim 1, Kaji discloses a semiconductor device (fig. 2, 100) comprising:
a semiconductor element (fig. 2, 5; see [0017]) including a first electrode (fig. 2, 51; see [0017]);
a sealing resin (fig. 2, 4; see [0026] and note that filling member 4 is made of silicone resin) covering the semiconductor element (see fig. 2: filling member 4 completely covers semiconductor element 5);
and a coating member (fig. 2, 11; see [0027]-[0028]);
wherein the coating member is interposed between the first electrode and the sealing resin (see fig. 2: metal thin film member 11 is disposed between electrode 51 and filling member 4), and contains a material (the metal thin film member 11 contains silver; see [0028]: “[a]s the material of the metal thin film member 11 … gold, silver, titanium, copper, nickel or the like can be used”) with higher thermal conductivity than the sealing resin (the silver (Ag) material of the metal thin film member 11 has a higher thermal conductivity than the silicone resin material of filling member 4;
see evidentiary reference Matsuoka [0004]: “such as epoxy resin or silicone resin, which has a low thermal conductivity of 1.0 W/mK or less”; also see evidentiary reference Matsuoka [0155]: “Cu (having a thermal conductivity of 403 W/mK), Ni (having a thermal conductivity of 94 W/mK), Au (having a thermal conductivity of 319 W/mK), Ag (having a thermal conductivity of 428 W/mK), Pd (having a thermal conductivity of 72 W/mK), Sn (having a thermal conductivity of 68 W/mK), or Al (having a thermal conductivity of 236 W/mK)”).
Regarding claim 2, Kaji discloses the semiconductor device according to claim 1, wherein the coating member (fig. 2, 11; see [0028]: metal thin film member 11 contains silver (Ag)) contains a metal.
Regarding claim 3, Kaji discloses the semiconductor device according to claim 2, wherein the coating member (fig. 2, 11; see [0028]: metal thin film member 11 contains silver (Ag)) contains Ag or Cu.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 4 is rejected under 35 U.S.C. 103 as obvious over Kaji, in view of Kajiwara et al. (US 20140264383 A1), hereinafter referred to as “Kajiwara”.
Regarding claim 4, Kaji discloses the semiconductor device according to claim 3.
Kaji fails to disclose wherein the coating member contains sintered Ag or sintered Cu.
Kajiwara discloses a semiconductor device (Kajiwara fig. 16, 35) comprising a semiconductor element (Kajiwara fig. 16, 1; see Kajiwara [0053]; also see Kajiwara [0177]: SiC chip 1 is the same in the second embodiment of fig. 16 as in the first embodiment of fig. 2) with a coating member (Kajiwara fig. 16, 36; see Kajiwara [0184]-[0185]: note that the silver (Ag) layer 36 is sintered) interposed between a first electrode (Kajiwara fig. 16, 2; see Kajiwara [0181]) and a sealing resin body (Kajiwara fig. 16, 14; see Kajiwara [0071]-[0072]; also see Kajiwara [0177]: sealing body 14 is the same in the second embodiment of fig, 16 as in the first embodiment of fig. 2).
The coating member of Kajiwara is incorporated as a portion of the coating member of the device taught in Kaji between the first electrode and the sealing resin wherein the combination discloses wherein the coating member contains sintered Ag or sintered Cu.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kaji with the coating member of Kajiwara to uniformly disperse incoming current across the first electrode and thereby suppress the occurrence of local overheating (see Kajiwara [0188]-[0189]);
and the combination is a simple substitution of one known element for another to obtain predictable results—simple substitution of a portion of the coating member of Kaji (Kaji fig. 2, 51: the portion between electrode 51 and sealing resin 4) with the coating member of Kajiwara (Kajiwara fig. 16, 36) to obtain predictable results (i.e. suppression of local overheating).
Claim 5 is rejected under 35 U.S.C. 103 as obvious over Kaji, in view of Okuda et al. (US 20180190642 A1), hereinafter referred to as “Okuda”.
Kaji discloses the semiconductor device according to claim 1.
Kaji fails to disclose wherein the first electrode contains Al.
Okuda discloses a semiconductor device (Okuda fig. 2, A10; see [0045]) comprising a semiconductor element (Okuda fig. 2, 11; see Okuda [0046]) including a first electrode (Okuda fig. 2, 111a; see Okuda [0047]: “second electrode 111a and the third electrode 111b are composed of a Cu layer and an Al layer mutually laminated”; note that second electrode 111a contains aluminum (Al)), wherein sealing resin (Okuda fig. 2, 6; c.f. the cross-sectional view of Okuda fig. 4; see Okuda [0044]; note that sealing resin 6 covers semiconductor element 11) covers the semiconductor element.
The first electrode of Okuda is incorporated as the first electrode of Kaji wherein the combination discloses wherein the first electrode contains Al.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kaji with the first electrode of Okuda because of the affordability of aluminum compared to other suitable electrode metals;
and the combination is a simple substitution of one known element for another to obtain predictable results—simple substitution of the first electrode of Kaji with (Kaji fig. 2, 51) with the first electrode of Okuda (Okuda fig. 2, 111a) to obtain predictable results (the result would be predictable because one of ordinary skill in the art would recognize that the aluminum first electrode of Okuda would perform the same function as the first electrode of Kaji (i.e. conducting electrical current)).
Claims 6-8 and 10-11 are rejected under 35 U.S.C. 103 as obvious over Kaji, in view of Eldridge et al. (US20010020545 A1), hereinafter referred to as “Eldridge”.
Regarding claim 6, Kaji discloses the semiconductor device according to claim 1, further comprising at least one first wire (Kaji fig. 2, 6; see Kaji [0013]; note that Kaji discloses a plurality of bonding wires 6).
Kaji fails to disclose said first wire including a bonding section joined to the first electrode.
Eldridge discloses techniques for interconnecting microelectronic components (see Eldridge [0048]) and making wire bond connections (See Eldridge [0052]; also see Eldridge [0003] and note that it is well known in the art to make wire bond connections between conductive pads (i.e. electrodes) on semiconductor dies). Eldridge further discloses one such wire bond connection (see Eldridge fig. 5 and [0455]) in which a wire (Eldridge fig. 5, 502; see Eldridge [0460]) that includes a bonding section (Eldridge fig. 5, 502a; see Eldridge [0460]) is connected to an electrode (Eldridge fig. 5, 512; see Eldridge [0460]), wherein both the bonding section and the electrode are covered by a conductive coating member (Eldridge fig. 5, 520; see Eldridge [0460] and [0463]-[0466]).
The bonding section of Eldridge is incorporated with the first wires of Kaji connecting said first wires to the first electrode of Kaji (Kaji fig. 2, 51; see specifically the leftmost semiconductor element 5 in Kaji fig. 2) and wherein the combination discloses the semiconductor device according to claim 1, further comprising at least one first wire (Kaji fig. 2, 6) including a bonding section (Eldridge fig. 5, 502a) joined to the first electrode (Kaji fig. 2, 51).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Kaji with the bonding section of Eldridge because the modification would be a simple substitution of one known element for another to obtain predictable results—simple substitution of the wire bond of Kaji (see Kaji fig. 3) with the ball wire bond of Eldridge (Eldridge fig. 5, 502a) to obtain predictable results (bonding wires to electrodes in order to electrically interconnect elements in electronic packaging devices is well-known in the art; for example, see Eldridge “Background of the Invention”).
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Regarding claim 7, Kaji and Eldridge disclose the semiconductor device according to claim 6, wherein the at least one first wire (Kaji fig. 2, 6; see Kaji [0013]; note that Kaji discloses a plurality of bonding wires 6) includes a plurality of first wires (see Kaji figs. 1 and 2: there are a plurality of bonding wires 6 connected to the leftmost semiconductor element 5 as shown in both figs. 1 and 2), and the bonding sections (Eldridge fig. 5, 502a) of the plurality of first wires are disposed along an outer edge of the first electrode (see Kaji fig. 1 c.f. fig. 2: two bonding wires 6 are bonded along the outer edges of electrode 51 on the leftmost semiconductor element 5; also see Kaji fig. 3 which clearly shows a wire bonding site (i.e. the point where bonding wire 6 contacts electrode 51) at an edge of electrode 51; in the combined device, bonding sections from Eldridge are located at the bonding sites of each of these bonding wires).
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Regarding claim 8, Kaji and Eldridge disclose the semiconductor device according to claim 7, wherein the coating member (Kaji fig. 2, 11; see Kaji [0027]-[0028]) is disposed at an area (see Kaji fig. 1 c.f. fig. 2; also see Kaji [0027]: thin film member 11 is formed on the entire surface of electrode 51) surrounded by the bonding sections (Eldridge fig. 5, 502a; in the combined device the bonding sections connect the bonding wires 6 to the electrode 51 at the indicated bonding sites) of the plurality of first wires (Kaji fig. 2, 6; see Kaji fig. 1 c.f. Kaji figs. 2-3: a portion of metal thin film member 11 is disposed at an area surrounded on two sides by the bonding sites of each bonding wire 6 on the leftmost semiconductor element 5).
Regarding claim 10, Kaji and Eldridge disclose the semiconductor device according to claim 6, wherein each first wire (Kaji fig. 2, 6; see Kaji [0025]: bonding wire 6 is made of a copper alloy) contains Cu.
Regarding claim 11, Kaji and Eldridge disclose the semiconductor device according to claim 6, wherein the coating member (Kaji fig. 2, 11; see Kaji [0027]-[0028]) is in contact with the bonding section (Eldridge fig. 5, 502a) of each first wire (Kaji fig. 2, 6; see Kaji [0027]: metal thin film member 11 electrically connects bonding wires 6 and electrode 51 through direct contact; since, in the combined device, the bonding sections electrically connect each bonding wire 6 to electrode 51, the bonding sections are also electrically connected and in direct contact with metal thin film member 11 disposed thereon).
Claims 9, 12-16, and 18 are rejected under 35 U.S.C. 103 as obvious over Kaji, in view of Eldridge, further in view of Okuda.
Regarding claim 9, Kaji and Eldridge disclose the semiconductor device according to claim 6.
Kaji and Eldridge fail to explicitly disclose wherein each first wire contains a metal different from a metal contained in the first electrode.
Okuda discloses a semiconductor device (Okuda fig. 2, A10; see [0045]) comprising a semiconductor element (Okuda fig. 2, 11; see Okuda [0046]) including a first electrode (Okuda fig. 2, 111a; see Okuda [0047]: “second electrode 111a and the third electrode 111b are composed of a Cu layer and an Al layer mutually laminated”; note that second electrode 111a contains aluminum (Al)), wherein sealing resin (Okuda fig. 2, 6; c.f. the cross-sectional view of Okuda fig. 4; see Okuda [0044]; note that sealing resin 6 covers semiconductor element 11) covers the semiconductor element.
The first electrode of Okuda is incorporated as the first electrode of the combined device of Kaji and Eldridge wherein the combination discloses wherein each first wire (Kaji fig. 2, 6; see Kaji [0025]: bonding wire 6 is made of a copper alloy) contains a metal different from a metal contained in the first electrode (the first electrode of Okuda contains aluminum and the bonding wires of Kaji contain copper).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined device of Kaji and Eldridge with the first electrode of Okuda because of the affordability of aluminum compared to other suitable electrode metals;
and the combination is a simple substitution of one known element for another to obtain predictable results—simple substitution of the first electrode of Kaji with (Kaji fig. 2, 51) with the first electrode of Okuda (Okuda fig. 2, 111a) to obtain predictable results (the result would be predictable because one of ordinary skill in the art would recognize that the aluminum first electrode of Okuda would perform the same function as the first electrode of Kaji (i.e. conducting electrical current)).
Regarding claim 12, the present combined device of Kaji, Eldridge, and Okuda, discloses the semiconductor device according to claim 6.
The present combined device of Kaji, Eldridge, and Okuda does not disclose wherein further comprising at least one metal lump joined to the first electrode.
Okuda discloses a semiconductor device (Okuda fig. 2, A10; see [0045]) comprising a semiconductor element (Okuda fig. 2, 11; see Okuda [0046]) including a first electrode (Okuda fig. 2, 111a; see Okuda [0047]: “second electrode 111a and the third electrode 111b are composed of a Cu layer and an Al layer mutually laminated”; note that second electrode 111a contains aluminum (Al)), wherein sealing resin (Okuda fig. 2, 6; c.f. the cross-sectional view of Okuda fig. 4; see Okuda [0044]; note that sealing resin 6 covers semiconductor element 11) covers the semiconductor element and wherein a plurality of metal lumps (Okuda fig. 6, 4; see Okuda [0062] and c.f. fig. 7; also see Okuda [0019]-[0020]: figs. 6-7 show close-up views of the semiconductor device 11 shown in fig. 2) and wires (Okuda fig. 6, 31; see Okuda [0060]) with bonding sections (Okuda fig. 7, 311; c.f. Okuda fig. 6) are joined to the first electrode.
The metal lumps of Okuda are incorporated into the combined device of Kaji, Eldridge, and Okuda, wherein the metal lumps are connected to the first electrode and disposed in an area surrounded by the first wires. Therefore, the combination discloses wherein further comprising at least one metal lump joined to the first electrode.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined device of Kaji, Eldridge, and Okuda, with the metal lumps of Okuda to uniformly and efficiently release heat from the electrode (see Okuda [0073]).
Regarding claim 13, Kaji, Eldridge, and Okuda disclose the semiconductor device according to claim 12 wherein the metal lump (Okuda fig. 6, 4; see Okuda [0062] and c.f. fig. 7) contains a metal different from a metal contained in the first electrode (see Okuda [0062]: heat releasing member 4 is composed of Copper (Cu); the first electrode of the combined device contains aluminum (Al)).
Regarding claim 14, Kaji, Eldridge, and Okuda disclose the semiconductor device according to claim 12, wherein the coating member (Kaji fig. 2, 11; see Kaji [0027]-[0028]) is in contact with the metal lump (Okuda fig. 6, 4; see Okuda [0062] and c.f. fig. 7; see Kaji [0027]: metal thin film member 11 electrically connects bonding wires 6 and electrode 51 through direct contact; since, in the combined device, the metal lumps of Okuda contact the first electrode, said coating member is in contact with said metal lump).
Regarding claim 15, Kaji, Eldridge, and Okuda disclose the semiconductor device according to claim 14, wherein the coating member (Kaji fig. 2, 11; see Kaji [0027]-[0028]) covers the metal lump (Okuda fig. 6, 4; see Eldridge fig. 5 and note that proximal end 502a is covered by inner coating layer 520; see Okuda fig. 7 and note that heat releasing members 4 are approximately the same size as bonding portions 311; thus, in the combined device, said coating member covers both said metal lump and the bonding sections associated with each of the first wires).
Regarding claim 16, Kaji, Eldridge, and Okuda disclose the semiconductor device according to claim 15 wherein a maximum thickness of the coating member (Kaji fig. 2, 11; see Kaji [0027]-[0028]) is greater than a thickness of the bonding section (Eldridge fig. 5, 502a) of each first wire (Kaji fig. 2, 6; see Eldridge fig. 5 and note that a maximum thickness of inner coating layer 520 is greater than a thickness of proximal end 502a; thus, in the combined device, the maximum thickness of said coating member is greater than the thickness of said bonding section of each first wire).
Regarding claim 18, Kaji, Eldridge, and Okuda disclose the semiconductor device according to claim 15, wherein the maximum thickness of the coating member (Kaji fig. 2, 11; see Kaji [0028]: “the thickness of the metal thin film member 11 is preferably 0.1 μm or more and 50 μm or less”) is at least 20 μm (see MPEP 2144.05 I. "In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)").
Claims 17 and 19-20 are rejected under 35 U.S.C. 103 as obvious over Kaji, in view of Eldridge further in view of Okuda, further in view of Kajiwara.
Regarding claim 17, the combined device of Kaji, Eldridge, and Okuda, disclose the semiconductor device according to claim 15.
The combined device of Kaji, Eldridge, and Okuda, fail to explicitly disclose wherein the coating member includes a periphery and a center portion that is thicker than the periphery.
Kajiwara discloses a semiconductor device (Kajiwara fig. 16, 35) comprising a semiconductor element (Kajiwara fig. 16, 1; see Kajiwara [0053]; also see Kajiwara [0177]: SiC chip 1 is the same in the second embodiment of fig. 16 as in the first embodiment of fig. 2) with a coating member (Kajiwara fig. 16, 36; see Kajiwara [0184]-[0185]) interposed between a first electrode (Kajiwara fig. 16, 2; see Kajiwara [0181]) and a sealing resin body (Kajiwara fig. 16, 14; see Kajiwara [0071]-[0072]; also see Kajiwara [0177]: sealing body 14 is the same in the second embodiment of fig. 16 as in the first embodiment of fig. 2).
The coating member of Kajiwara is incorporated as a portion of the coating member of the combined device of Kaji, Eldridge, and Okuda, between the first electrode and the sealing resin wherein the combination discloses wherein the coating member includes a periphery and a center portion that is thicker than the periphery (see Kajiwara fig. 16: a central portion of sintered Ag layer 36 is thicker than a peripheral portion of said layer as shown).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the combined device of Kaji, Eldridge, and Okuda, with the coating member of Kajiwara to uniformly disperse incoming current across the first electrode and thereby suppress the occurrence of local overheating (see Kajiwara [0188]-[0189]);
and the combination is a simple substitution of one known element for another to obtain predictable results—simple substitution of a portion of the coating member of the combined device of Kaji, Eldridge, and Okuda (Kaji fig. 2, 11: the portion between electrode 51 and sealing resin 4), with the coating member of Kajiwara (Kajiwara fig. 16, 36) to obtain predictable results (i.e. suppression of local overheating).
Regarding claim 19, Kaji, Eldridge, Okuda, and Kajiwara disclose the semiconductor device according to claim 15, wherein the maximum thickness of the coating member (Kajiwara fig. 16, 36; see Kajiwara [0184]: “a porous second sintered Ag layer 36 having a thickness of 30 μm or more) is at least 80 μm (see MPEP 2144.05 I. "In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)").
Regarding claim 20, Kaji, Eldridge, Okuda, and Kajiwara disclose the semiconductor device according to claim 15, wherein the maximum thickness of the coating member (Kajiwara fig. 16, 36; see Kajiwara [0184]: “a porous second sintered Ag layer 36 having a thickness of 30 μm or more) is at least 160 μm (see MPEP 2144.05 I. "In the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990)").
Conclusion
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/HAMNER FITZHUGH COLLINS IV/Examiner, Art Unit 2818
/STEVEN H LOKE/Supervisory Patent Examiner, Art Unit 2818