Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/08/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the Examiner.
Election/Restrictions
Applicant’s election of claims 1-12 without traverse in the reply filed on 04/29/2026 is acknowledged.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 114 in FIGs. 1-5, and 8-11. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding Claim 4,
Claim 4 recites the limitation "the at least one source/drain region ". There is insufficient antecedent basis for this limitation in the claim. The Examiner interprets, “the at least one source/drain region” to mean, “the source/drain regions” for consistency with independent claim 1.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3, 5-9 and 11-12 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Jo et al US 20240274677 A1. Jo et al will be referenced to as Jo henceforth.
Regarding Claim 1,
Jo teaches:
“A semiconductor device, comprising:
source/drain regions (source/drain regions 130, [0054], FIG. 3D) disposed at a first level (annotated FIG. 3D #1);
contacts connecting to the source/drain regions on a first side of the source/drain regions ([0064], annotated FIG. 3D #2: The contacts contact 130 at a top side of 130. This top side is a first side of 130.);
a contact extension having end portions connected to the contacts and a length spanning a distance between the contacts (annotated FIG. 3D #3); and
a cut plug disposed through the length and electrically isolating portions of the contact extension (isolation insulating films CX, insulating structure 180, [0064], [0071], annotated FIG. 3D #4) to form at least two signal paths to the source/drain regions (annotated FIG. 3D #5) from a metal layer above the first level (upper wiring layers M1, [0146], FIG. 3D).”
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Annotated FIG. 3D #1
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432
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Annotated FIG. 3D #2
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Annotated FIG. 3D #3
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Annotated FIG. 3D #4
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Annotated FIG. 3D #5
Regarding Claim 2,
Jo teaches:
“The semiconductor device as recited in claim 1, wherein the contacts and the contact extension share a top surface (FIG. 3D).”
Regarding Claim 3,
Jo teaches:
“The semiconductor device as recited in claim 1, wherein the length of the contact extension spans over at least one source/drain region (FIG. 3D).”
Regarding Claim 5,
Jo teaches:
“The semiconductor device as recited in claim 1, wherein the cut plug is formed through a via (via contacts VA, [0072], annotated FIG. 3D), and the via is divided such that portions of the via are electrically isolated from one another and disposed within the at least two signal paths (annotated FIG. 3D #4, annotated FIG. 3D #5: A portion of VA lies within each signal path.). ”
Regarding Claim 6,
Jo teaches:
“The semiconductor device as recited in claim 5, wherein the cut plug is formed between two metal lines of the metal layer above the first level (FIG. 3D).”
Regarding Claim 7,
Jo teaches:
“The semiconductor device as recited in claim 1, wherein the contacts and the contact extension are integrally formed ([0143], FIG. 20D, 21D: The contacts and contact extension are integrally formed and later etched such that the plurality of source/drain contacts are formed.).”
Regarding Claim 8,
Jo teaches:
“A semiconductor device, comprising:
a central source/drain region disposed between outer source/drain regions at a first level (source/drain regions 130, [0054], annotated FIG. 3D #6);
contacts connecting to the outer source/drain regions on a first side of the outer source/drain regions ( [0064], annotated FIG. 3D #2: The contacts contact 130 at a top side of 130. This top side is a first side of 130.);
a contact extension having end portions connected to the contacts and a length spanning a distance between the contacts and over the central source/drain region (annotated FIG. 3D #3);
a via connecting the contact extension to upper metal structures (via contacts VA, [0072], FIG. 3D: VA connects to M1 which is made up of metal lines.);
and a cut plug (annotated FIG. 3D #4) disposed through the via and the length to electrically isolate portions of the via and the contact extension (annotated FIG. 3D #3, annotated FIG. 3D #4) to form at least two signal paths to the outer source/drain regions from the upper metal structures above the first level (annotated FIG. 3D #5).”
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Annotated FIG. 3D #6
Regarding Claim 9,
Jo teaches:
“The semiconductor device as recited in claim 8, wherein the contacts and the contact extension share a top surface (FIG. 3D).”
Regarding Claim 11,
Jo teaches:
“The semiconductor device as recited in claim 8, wherein the upper metal structures include metal lines and the cut plug is formed between two metal lines above the first level (annotated FIG. 3D #5).”
Regarding Claim 12,
Jo teaches:
“The semiconductor device as recited in claim 8, wherein the contacts and the contact extension are integrally formed ([0143], FIG. 20D, 21D: The contacts and contact extension are integrally formed and later etched such that the plurality of source/drain contacts are formed.). ”
Allowable Subject Matter
Claims 4 and 10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding Claim 4,
Jo fails to explicitly teach:
“wherein the at least one source/drain region includes a contact at a second side opposite the first side.” In view of the rest of the limitations of claim 4.
Jo fails to explicitly teach the above limitation because it is not obvious to combine the invention of Jo with other art which teaches the above limitation.
This is because although an MPR in on an opposite side of the source/drain regions relative to the contacts, the MPR is not, “at”, that is in direct physical contact with, an opposite side of the source/drain regions. Therefore, Jo does not meet the limitation above.
A combination of another prior art with Jo to meet the limitation is not obvious because moving the MPR to be in direct physical contact with a bottom side of the central source/drain region would require the MPR to no longer be in contact with the WVPR. In such a case, the VPR would serve no purpose and may cause short channel effects. Therefore a combination is not obvious.
The Examiner did not find prior art which one of ordinary skill in the art would use alone or would find obvious to combine with the invention of Jo to reach all of the limitations of the claim.
Regarding Claim 10, this claim contains a similar limitation to claim 4, and in view of the limitations of claim 8, claim 10 is objectionable for the same reasons as claim 4.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDRE XAVIER RAMIREZ whose telephone number is (571)272-2715. The examiner can normally be reached Monday - Friday 8:30 AM to 6:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ALEXANDRE X RAMIREZ/Examiner, Art Unit 2812
/William B Partridge/Supervisory Patent Examiner, Art Unit 2812
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