DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restriction
Restriction to one of the following inventions is required under 35 U.S.C. 121:
I. Claims 1-9, drawn to a semiconductor device, classified in 361/764.
II. Claims 10-19, drawn to a method, classified in 29/846.
III. Claim 20, drawn to a method, classified in 29/832.
The inventions are independent or distinct, each from the other because:
Inventions III and I-II are related as process of making and product made. The inventions are distinct if either or both of the following can be shown: (1) that the process as claimed can be used to make another and materially different product or (2) that the product as claimed can be made by another and materially different process (MPEP § 806.05(f)). In the instant case the invention III can be made by sealing or encapsulating instead of pressing the insulating covering extending beyond the capacitor body into a notch.
Inventions II and I are related as process of making and product made. The inventions are distinct if either or both of the following can be shown: (1) that the process as claimed can be used to make another and materially different product or (2) that the product as claimed can be made by another and materially different process (MPEP § 806.05(f)). In the instant case the process as claimed can be used to make another and materially different product, for example, the method can be made by stamping or punching instead of cutting one or more openings fully through the PCB.
Restriction for examination purposes as indicated is proper because all the inventions listed in this action are independent or distinct for the reasons given above and there would be a serious search and/or examination burden if restriction were not required because one or more of the following reasons apply:
Different searches, classifications, and fields.
Applicant is advised that the reply to this requirement to be complete must include (i) an election of an invention to be examined even though the requirement may be traversed (37 CFR 1.143) and (ii) identification of the claims encompassing the elected invention.
The election of an invention may be made with or without traverse. To reserve a right to petition, the election must be made with traverse. If the reply does not distinctly and specifically point out supposed errors in the restriction requirement, the election shall be treated as an election without traverse. Traversal must be presented at the time of election in order to be considered timely. Failure to timely traverse the requirement will result in the loss of right to petition under 37 CFR 1.144. If claims are added after the election, applicant must indicate which of these claims are readable upon the elected invention.
Should applicant traverse on the ground that the inventions are not patentably distinct, applicant should submit evidence or identify such evidence now of record showing the inventions to be obvious variants or clearly admit on the record that this is the case. In either instance, if the examiner finds one of the inventions unpatentable over the prior art, the evidence or admission may be used in a rejection under 35 U.S.C. 103 or pre-AIA 35 U.S.C. 103(a) of the other invention.
During a telephone conversation with Michael Cleveland on 01/02/2026 a provisional election was made with traverse to prosecute the invention of Group I, claims 1-9. Affirmation of this election must be made by applicant in replying to this Office action. Claims 10-20 withdrawn from further consideration by the examiner, 37 CFR 1.142(b), as being drawn to a non-elected invention.
Applicant is reminded that upon the cancelation of claims to a non-elected invention, the inventorship must be corrected in compliance with 37 CFR 1.48(a) if one or more of the currently named inventors is no longer an inventor of at least one claim remaining in the application. A request to correct inventorship under 37 CFR 1.48(a) must be accompanied by an application data sheet in accordance with 37 CFR 1.76 that identifies each inventor by his or her legal name and by the processing fee required under 37 CFR 1.17(i).
The examiner has required restriction between product or apparatus claims and process claims. Where applicant elects claims directed to the product/apparatus, and all product/apparatus claims are subsequently found allowable, withdrawn process claims that include all the limitations of the allowable product/apparatus claims should be considered for rejoinder. All claims directed to a nonelected process invention must include all the limitations of an allowable product/apparatus claim for that process invention to be rejoined.
In the event of rejoinder, the requirement for restriction between the product/apparatus claims and the rejoined process claims will be withdrawn, and the rejoined process claims will be fully examined for patentability in accordance with 37 CFR 1.104. Thus, to be allowable, the rejoined claims must meet all criteria for patentability including the requirements of 35 U.S.C. 101, 102, 103 and 112. Until all claims to the elected product/apparatus are found allowable, an otherwise proper restriction requirement between product/apparatus claims and process claims may be maintained. Withdrawn process claims that are not commensurate in scope with an allowable product/apparatus claim will not be rejoined. See MPEP § 821.04. Additionally, in order for rejoinder to occur, applicant is advised that the process claims should be amended during prosecution to require the limitations of the product/apparatus claims. Failure to do so may result in no rejoinder. Further, note that the prohibition against double patenting rejections of 35 U.S.C. 121 does not apply where the restriction requirement is withdrawn by the examiner before the patent issues. See MPEP § 804.01.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the “a connector of a host device”, claim 1, line 4 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, and 4-9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muto (U.S. 2021/0015006 in view of Nagasawa et al. (U.S. 2023/0284390).
As to claim 1, Muto discloses a semiconductor device (32, para-0032) as shown in figures 1-12, comprising:
a printed circuit board (PCB) substrate (20), comprising:
a plurality of contact fingers (29, figure 3, para-0042) configured to electrically couple the semiconductor device (1) to a connector (the host interface) of a host device, para-0052;
a first opening (S0) fully through the substrate;
one or more pin slots (the through holes, not label, where the pins 42a-42b fitted into) partially through a first surface (top surface) of the substrate (20) and extending laterally from a first side of the first opening (S0);
a notch slot (20cb, 20cc) partially through the first surface of the substrate and extending laterally from a side of the first opening opposing the first side of the first opening;
one or more semiconductor dies (27, 28, or 31) mounted on the first surface of the substrate and electrically coupled to the contact fingers (29); and
an electrical circuit device (30) within the first opening (S0), comprising:
one or more pins (42a, 42b) extending from a first side of the electrical circuit device (1)
located in a corresponding one of the pin slots and electrically coupled to the
conductive coating thereof; and
a notch (20ca) extending from a side of the electrical circuit device (30) opposite the first side of the electrical circuit device located and resting in the notch slot.
Muto does not specifically disclose each of the pin slots lined with a conductive coating, and the semiconductor dies electrically coupled to the conductive coating of one or more of the pin slots.
Nagasawa teaches a semiconductor storage device (1) as shown in figures 1-13 comprising a circuit board (21) having one or more semiconductor dies (24, 25), each of the pin slots (43, 45) lined with a conductive coating (land or pad 41-42, 44, 46), and the semiconductor dies (24, 25) electrically coupled to the conductive coating of one or more of the pin slots (43, 45).
It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Nagasawa employed in the semiconductor device of Muto in order to provide electrical connection structures.
Regarding claim 2, Muto as modified by Nagasawa teaches the pin slots (43, 45) lined with the conductive coating are copper plated (plated through hole, para-0119+).
Regarding claim 4, Muto as modified by Nagasawa discloses in figures 3-4 that the one or more pin slots are two pin slots (42a, 42b fitted into the through holes), both extending a same distance laterally from the first side of the first opening (S0).
Regarding claim 5, Muto as modified by Nagasawa teaches in figures 3-4 the one or more pin slots (43, 45) are two pin slots, extending difference distances laterally from the first side of the first opening (see figure 4).
Regarding claim 6, Muto as modified by Nagasawa discloses the electrical circuit device is an electrolytic capacitor (30, para-0056+).
Regarding claim 7, Muto as modified by Nagasawa teaches in figure 3 one or more pins (31, 32) are soldered (para-0115+) to the conductive coating (41-42, 44, or 46) of the corresponding pin slot.
Regarding claims 8-9, Muto as modified by Nagasawa discloses the one or more semiconductor dies (27-28, 31, para-0056) include one or more memory dies and a memory controller die, and the semiconductor device (1) is a solid-state drive (SSD, para-0032).
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Muto in view of Nagasawa as applied to claims above, and further in view of Iwasaki et al. (U.S. 2013/0286612).
Regarding claim 3, Muto as modified by Nagasawa discloses all of the limitations of claimed invention except for the electrical circuit device is covered with an insulating covering extending beyond a body of the electrical circuit device from the side of the electrical circuit device opposite the first side of the electrical circuit device and pressed into the notch.
Iwasaki teaches a circuit board (41) as shown in figures 4-6 comprising the electrical circuit device (52) is covered with an insulating (49) covering extending beyond a body (52a) of the electrical circuit device (52) from the side of the electrical circuit device opposite the first side of the electrical circuit device and pressed into the notch (62).
It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Iwasaki employed in the semiconductor device of Muto and Nagasawa in order to provide the electronic device excellent bonding to the circuit board.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN T DINH whose telephone number is (571)272-1929. The examiner can normally be reached MON-FRI: 8AM-4:30PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/TUAN T DINH/Primary Examiner, Art Unit 2848