Detailed Action
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Election/Restriction
Applicant’s election without traverse of Invention I and Species I in the reply filed on 27 March 2026 is acknowledged.
Claims 14-16 and 19-20 withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected invention or species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 27 March 2026. Examiner notes that the applicants reply listed claim 16 as part of Species I, however as claim 16 depends from claim 15 it is subject to withdrawal as depending from a non-elected invention.
Foreign Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) to foreign application DE 102022213418 filed on 12 December 2022. The foreign application is not in English. The certified copy of the foreign priority application has been received. Filing Dates for the Claims — All Claims Not Entitled to Priority DateTo be entitled to the filing date of the foreign priority application DE 102022213418 that is not in English, an English translation of the non-English language foreign application and a statement that the translation is accurate in accordance with 37 CFR 1.55 is required to perfect the claim for priority under 35 U.S.C. 119 (a)-(d). The foreign application must adequately support the claimed subject matter, meaning satisfy the written description and enablement requirements of 35 U.S.C. 112(a). See MPEP §§ 215 and 216. 37 C.F.R. 1.55(g)(3)(ii)-(iii). To demonstrate compliance with 35 U.S.C. 112(a), applicant should point to support for their claimed subject matter in their translations.
Claim Rejections 35 U.S.C. § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 11, 12, and 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lutz et al. (US Pub. 20050019974), hereinafter referred to as Lutz.
Regarding claim 11, Lutz teaches semiconductor component, comprising: a semiconductor substrate ((Lutz, 38, Fig. 4D, para. 56); an insulation layer (Lutz, 40, Fig. 4D, para. 56); and a first monocrystalline silicon layer (Lutz, 42, Fig. 4D, para. 57), wherein the insulation layer is arranged on the semiconductor substrate and the first monocrystalline silicon layer is arranged on the insulation layer (Lutz, see Fig. 4D), and at least one first region (Lutz, 30a-c and 32a-c, Fig. 4D, paras. 50-55) that extends starting from the first monocrystalline silicon layer up to a surface of the semiconductor substrate; wherein the at least one first region includes a second monocrystalline silicon (Lutz, para. 54. Lutz shows that 30a-c may be crystalline and created via “CVD processes”, which are known in the art as a means of growing mono-crystalline silicon, see Lutz para. 70).
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Regarding claim 12, Lutz teaches the semiconductor component according to claim 11, wherein the at least one first region is an array with a plurality of connection regions that extend starting from the first monocrystalline silicon layer up to the surface of the semiconductor substrate (Lutz, Fig. 4D, see above), wherein the connection regions are filled with the second monocrystalline silicon (Lutz, para. 54. Lutz shows that 30a-c may be crystalline and created via “CVD processes”, which are known in the art as a means of growing mono-crystalline silicon, see Lutz para. 70).
Regarding claim 17, Lutz teaches the semiconductor component according to claim 11, wherein the at least one first region (Lutz, Fig. 4D, see above) has a lateral extension that is at least twice as large as a thickness of the insulation layer(Lutz, 40, Fig. 4D, see above, 1st region is much wider than twice the width of the insulation layer).
Claim Rejections 35 U.S.C. § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Lutz as applied to claim 12 above, and further in view of Hwang et al. (US Pub. 20200105689), hereinafter referred to as Hwang.
Regarding claim 13, Lutz teaches the semiconductor component according to claim 12, but does not explicitly teach wherein the connection regions have a round cross-section.
Lutz does teach that the openings (Lutz, 46, Fig. 4B) where connections regions (Lutz 30a-c and 32a-c, Fig. 4d) will be created can be formed using well known lithographic and etching techniques (Lutz, para. 59).
Further Hwang teaches a technique which may cause cylindrical through holes, which would have a round cross section (Hwang, para. 37). Therefore it would have been obvious to one having ordinary skill in the art to utilize the technique of Hwang which would allow for the incorporation of testing methodologies that incorporated verification with known good dies to increase yield and decrease costs (Hwang para. 19)
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Lutz as applied to claim 1 above, and further in view of Gogoi (US Pub 20160167954), hereinafter referred to as Gogoi.
Regarding claim 18, Lutz teaches the semiconductor component according to claim 11, but does not teach wherein the first monocrystalline silicon layer has second regions laterally with respect to the first region, and the surface of the semiconductor substrate has second regions in the first region, wherein the second regions have the same doping type as the semiconductor substrate.
However, Gogoi teaches a semiconductor device with an n-type doped substrate (Gogoi, 519, Fig. 5B, para. 236) an n-type doped monocrystalline layer (Gogoi, 517, Fig. 5A para 236), linked by vertical interconnects (Gogoi, 650, 651, 652, 655, 656, Fig. 5B, paras. 149, 151)
Therefore, it would have been obvious to a person having ordinary skill in the art before the filing date of the invention to combine the teaching of Lutz with the doped monocrystalline layer and substrate of Gogoi in order to improve performance, lower costs, and reduce complexity in manufacturing and assembly (Gogoi, para. 4).
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Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Chui et al. (US Pub 20080013144) teaches a MEMS sensor that has a TSV which passes through multiple oxide and silicon layers.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KIERAN M CUNNINGHAM whose telephone number is (571)272-9654. The examiner can normally be reached Mon-Fri 8:00-4:3.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at 5712703042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KIERAN M. CUNNINGHAM/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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