Prosecution Insights
Last updated: October 02, 2026
Application No. 18/534,698

SEMICONDUCTOR ELEMENT, ELECTRONIC DEVICE COMPRISING SEMICONDUCTOR ELEMENT, AND SEMICONDUCTOR CHIP

Final Rejection §103
Filed
Dec 10, 2023
Priority
Jan 04, 2023 — provisional 63/436,889 +1 more
Examiner
SUN, YU-HSI DAVID
Art Unit
2817
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Innolux Corporation
OA Round
2 (Final)
78%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
683 granted / 881 resolved
+9.5% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
31 currently pending
Career history
897
Total Applications
across all art units

Statute-Specific Performance

§101
3.5%
-36.5% vs TC avg
§103
46.3%
+6.3% vs TC avg
§102
22.5%
-17.5% vs TC avg
§112
19.9%
-20.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 881 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 7, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Bour et al. (US PG Pub 2004/0206949, hereinafter Bour) in view of Tansu et al. (US Pat 9,349,910, hereinafter Tansu). Regarding claim 1, figure 1A of Bour discloses a semiconductor device, comprising: a first type semiconductor layer (Fig. 1A; 134; ¶ [0032]); a second type semiconductor layer (Fig. 1A; 136; ¶ [0032]); a quantum well structure (Fig. 1A; 120; ¶ [0032]) disposed between the first type semiconductor layer (Fig. 1A; 134; ¶ [0032]) and the second type semiconductor layer (Fig. 1A; 134; ¶ [0032]), and comprising a pair of barrier layers (Fig. 2A; 201 and 202; ¶ [0044]), a first reflection unit disposed under the first type semiconductor layer (Fig. 1A; 110; ¶ [0031]); and a second reflection unit disposed on the second type semiconductor layer (Fig. 1A; 111; ¶ [0031]) and defining a resonant cavity with the first reflection unit (Fig 1A; 1A; 130; ¶ [0032]; optical cavity is a type of resonate cavity), wherein, the quantum well structure is arranged in the resonant cavity (Fig 1A;120 and 130; ¶ [0032]; optical cavity is a type of resonate cavity). Bour does not teach a first active layer and a second active layer which are disposed between the pair of barrier layers, and the first active layer and the second active layer respectively comprising Group 13 elements of different concentrations. Tansu teaches in Column 2 and Column 3, a first active layer (Column 2 Line 67 and Column 3 Line 1-2) and a second active layer (Column 3 Line 2-4) which are disposed between the pair of barrier layers (Column 3 Line 4-6), and the first active layer and the second active layer respectively comprising Group 13 elements (Column 3 Line 9-14) of different concentrations (Column 3 Line 9-14). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour, a light-emitting device with two reflector units, and optical cavity and a quantum well structure and Tansu, explaining a Type II multi-quantum well structure with two active layers. This combination would produce a semiconductor structure with a first semiconductor layer forming a quantum well for electrons and a second semiconductor layer forming a quantum well for holes formed on the first semiconductor layer and third semiconductor layers sandwiching the first and second semiconductor layers as barrier layers to the electrons and holes Tansu (Column 3 Line 1-6). Bour does not explicitly disclose the semiconductor device is a micro light-emitting diode having a chip size in a range of 1µm to 100 µm. However, micro light-emitting diodes having a chip size in a range of 1µm to 100 µm are well known in the art and it would have been obvious to form the device as a micro LED in the claimed size for the purpose of forming a compact, high density device. Bour does not explicitly disclose the semiconductor device is configured to emit blue light of a main peak wavelength in a range of 420 nanometers to 460 nanometers or green light of a main peak wavelength in a range of 510 nanometers to 540 nanometers. However, it would have been obvious to form the device to emit light with peak wavelengths in the claimed ranges within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)). With respect to Claim 7, Bour and Tansu teach the same structure and materials as the claimed invention and will be taken as producing the same effect as claimed. With respect to Claim 12, Bour does not explicitly disclose a staggered quantum well structure. Tansu teaches in Column 4, having a staggered quantum well structure (Fig. 1, Column 4 Line 33-35). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and Tansu, a light-emitting device with staggered quantum wells. This combination would produce a structure to improve luminescence efficiency in nitride gain media by utilizing a staggered InGaN quantum well Tansu (Column 3 Line 32-25). Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu, as applied to claim 1, further in view of Sakong (US 20070297474). With respect Claim 2, Bour and Tansu do not teach wherein the quantum well structure further comprises a third active layer, the second active layer is disposed between the first active layer and the third active layer, wherein a concentration of the Group 13 elements in the first active layer and in the third active layer is respectively smaller than a concentration of the Group 13 elements in the second active layer. Sakong teaches in Fig 2, wherein the quantum well structure (Fig 2; 16; ¶ [0041]) further comprises a third active layer (Fig 2; 16 and 14; ¶ [0041]), the second active layer is disposed between the first active layer and the third active layer (Fig 2; 16 and 14; ¶ [0041]), wherein a concentration of the Group 13 elements in the first active (Fig 2; 14; ¶ [0058]) layer and in the third active layer (Fig 2; 14; ¶ [0058]) is respectively smaller than a concentration of the Group 13 elements in the second active layer. (Fig 2; 14; ¶ [0051]) It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Sakong, a light emitting semiconductor device with active three layers comprising the quantum well. This combination would produce a semiconductor device with active layers in the quantum well to prevent diffusion of group 13 element from the barrier layers Sakong (¶ [0041]). Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu, as applied to claim 1, further in view of Hamaguchi (US 20180366906). With respect to Claim 3, Bour and Tansu do not explicitly disclose the second reflection unit comprises a first Bragg reflector, a second Bragg reflector and a middle layer between the first Bragg reflector and the second Bragg reflector, wherein the first Bragg reflector and the second Bragg reflector form a mirror structure by using the middle layer to serve as a mirror axis. Hamaguchi teaches in Fig. 1, comprises a first Bragg reflector (Fig. 1; 41; ¶ [0096] ¶ [0075]), a second Bragg reflector (Fig. 1; 42; ¶ [0096] ¶[0075]) and a middle layer (Fig. 1; 20; ¶ [0097] ¶ [0075]) between the first Bragg reflector and the second Bragg reflector, wherein the first Bragg reflector and the second Bragg reflector form a mirror structure by using the middle layer to serve as a mirror axis (Fig. 1; 20; 41; 42; ¶ [0096] ¶ [0097]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, light-emitting devices with two reflector units, an optical cavity and a quantum well structure and of Hamaguchi, a light emitting element with two Distributed Braggs Reflector (DBR) light reflectors. This combination would produce a semiconductor device that can obtain a desired light reflectance depending on the stack configuration of the DBR layers Hamaguchi (¶ [0075]). Claim 4-6 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu and Hamaguchi, as applied to claim 3, further in view of Pfeffer (US 20230124794). With respect to Claim 3, Bour does not teach in nano-porous Bragg reflectors. Pfeffer teaches in ¶ [0043] are nano-porous Bragg reflectors ¶ [0043]. It would be obvious to one with ordinary skill in the art before the effective filing date to combine the inventions of Bour, Tansu a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Hamaguchi, a light-emitting element with two Distributed Braggs Reflector light reflectors modified by the invention of Pfeffer teaching Distributed Braggs Reflectors being nanoporous. This combination would produce a semiconductor device that uses nanoporous structures to increase scattering Pfeffer (¶ [0043]). With respect to Claim 5, Bour teaches in Fig 1A, wherein the first reflection unit (Fig 1A; 110; ¶ [0031]) is a Bragg reflector. Bour and Tansu does not teach wherein the first reflection unit is a nano-porous Bragg reflector. Pfeffer teaches in ¶ [0043], a nano-porous Brags reflector is a Brags reflector (¶ [0043]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Pfeffer a semiconductor structure with microLEDs and nanoporous Bragg reflectors. The combination would produce a semiconductor device with nanoporous Bragg reflectors with high reflectivity that may be used to increase scattering Pfeffer(¶ [0043]). With respect to Claim 6, Bour and Tansu do not teach wherein the nano-porous Bragg reflector comprises a plurality of alternately stacked nano-porous gallium nitride layers and gallium nitride layers. Pfeffer teaches in Fig 3C, wherein the nano-porous Bragg reflector comprises a plurality of alternately stacked nano-porous gallium nitride layers and gallium nitride layers (Fig 3C; 302; ¶ [0043]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Pfeffer a semiconductor structure with microLEDs and nanoporous Bragg reflectors comprises a plurality of alternately stacked nano-porous gallium nitride layers and gallium nitride layers. The combination would produce a semiconductor light-emitting device with reflector units that contain Bragg reflectors with embedded nanoporous structures that may be used to increase scatter Pfeffer (¶ [0043]). With respect to Claim 13, Bour and Tansu do not teach having a thin film filter structure. Pfeffer teaches in ¶ [0095], having a thin film filter structure. (¶ [0095]; anti reflective coating). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Pfeffer a semiconductor structure with microLEDs, nanoporous Bragg reflectors and a thin film filter. The combination would produce a semiconductor light-emitting device with a thin film filter structure to prevent Fresnel reflection Pfeffer (¶ [0095]). Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu, as applied to claim 1, further in view of Han (US 8779412). With respect to Claim 8, Bour and Tansu do not teach wherein an indium concentration of the first active layer is different from an indium concentration of the second active layer. Han teaches in Fig. 1, wherein an indium concentration of the first active layer is different from an indium concentration of the second active layer (Fig. 1; 103a; Column 4 Line 36-40). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two a quantum well structure and of Hans, a semiconductor light emitting device with various indium concentrations in the active layer. This combination produces a semiconductor structure with a tunable band gap in the quantum well layer. The material in the active layer determines the band gap energy affecting the light emitted. The content of indium of the quantum well layers (active layer) determines the band gap energy in the quantum well. When the content of indium (In) of the quantum well layer (active layer) made of InGaN is gradually increased, the band gap energy can be gradually reduced. Similarly, when the content of indium (In) of the quantum well layer (active layer) made of InGaN is gradually reduced, the band gap energy can be gradually increased Han (Column 6 Line 24-34). With respect to Claim 9, Bour and Hans do not teach wherein an indium to gallium ratio of the first active layer is 0.155/0.845. Tansu teaches in Column 11, wherein an indium to gallium ratio of the first active layer is 0.155/0.845 (Column 11 Line 1-7). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Han, a light-emitting semiconductor device with two reflector units, an optical cavity and a quantum well structure and of Tansu a light-emitting device with staggered quantum wells. This would produce a semiconductor device with a first active layer of indium to gallium ratio to be 0.1555/0.845 similar content with conventional quantum wells Han (Column 11 Line 6- 7). With respect to Claim 10, Bour, Tansu and Hans do not teach wherein an indium to gallium ratio of the second active layer is 0.33/0.67. However, the ordinary artisan would have recognized the ratio of indium to gallium in the second active layer to be a result effective variable affecting the band gap of the active layer. Thus, it would have been obvious to have a ratio of indium to gallium within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B Claims 14 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu, as applied to claim 1, further in view of Shur (U S20120217473). With respect to Claim 14, Bour and Tansu do not teach electronic device, comprising: a circuit substrate. Shur teaches in Fig 5 and Fig 6, an electronic device, comprising: a circuit substrate (Fig. 5; 120, 122 and 124; ¶ [0051]); and the circuit substrate (Fig. 6; 116 and 126; ¶ [0051]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Shur a light emitting semiconductor device on a substrate. This combination produces a semiconductor device on a substrate including the device design, circuit design and the fabrication of the physical circuit Shur (¶ [0051]). With respect to Claim 18, Bour teaches in Fig. 1A, a semiconductor device, comprising: a first type semiconductor layer (Fig. 1A; 134; ¶ [0032]); a second type semiconductor layer (Fig. 1A; 136; ¶ [0032]); a quantum well structure (Fig. 1A; 120; ¶ [0032]) disposed between the first type semiconductor layer (Fig. 1A; 134; ¶ [0032]) and the second type semiconductor layer (Fig. 1A; 134; ¶ [0032]), and comprising a pair of barrier layers (Fig. 2A; 201 and 202; ¶ [0044]), a first reflection unit disposed under the first type semiconductor layer (Fig. 1A; 110; ¶ [0031]); and a second reflection unit disposed on the second type semiconductor layer (Fig. 1A; 111; ¶ [0031]) and defining a resonant cavity with the first reflection unit (Fig 1A; 1A; 130; ¶ [0032]; optical cavity is a type of resonate cavity), wherein, the quantum well structure is arranged in the resonant cavity (Fig 1A;120 and 130; ¶ [0032]; optical cavity is a type of resonate cavity). Bour does not teach a first active layer and a second active layer which are disposed between the pair of barrier layers, and the first active layer and the second active layer respectively comprising Group 13 elements of different concentrations. Tansu teaches in Column 2 and Column 3, a first active layer (Column 2 Line 67 and Column 3 Line 1-2) and a second active layer (Column 3 Line 2-4) which are disposed between the pair of barrier layers (Column 3 Line 4-6), and the first active layer and the second active layer respectively comprising Group 13 elements (Column 3 Line 9-14) of different concentrations (Column 3 Line 9-14). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour, a light-emitting device with two reflector units, and ab optical cavity and Tansu, explaining a Type II multi-quantum well structure with two active layers. This combination would produce a semiconductor structure with a first semiconductor layer forming a quantum well for electrons and a second semiconductor layer forming a quantum well for holes formed on the first semiconductor layer and third semiconductor layers sandwiching the first and second semiconductor layers as barrier layers to the electrons and holes Tansu (Column 3 Line 1-6). Bour and Tansu do not teach two semiconductor elements. Shur further teaches in Fig. 6, two semiconductor elements (Fig. 6; 126; ¶ [0050] and 1 [0051]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Shur a light emitting semiconductor device a substrate with one or more devices. This combination produces a semiconductor device with multiple devices on a substrate including the device design, circuit design and the fabrication of the physical circuit Shur (¶ [0051]). Bour does not explicitly disclose the semiconductor device is a micro light-emitting diode having a chip size in a range of 1µm to 100 µm. However, micro light-emitting diodes having a chip size in a range of 1µm to 100 µm are well known in the art and it would have been obvious to form the device as a micro LED in the claimed size for the purpose of forming a compact, high density device. Bour does not explicitly disclose the semiconductor device is configured to emit blue light of a main peak wavelength in a range of 420 nanometers to 460 nanometers or green light of a main peak wavelength in a range of 510 nanometers to 540 nanometers. However, it would have been obvious to form the device to emit light with peak wavelengths in the claimed ranges within the claimed range, since it has been held by the Federal circuit that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. (In Gardner v. TEC Systems, Inc., 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied, 469 U.S. 830, 225 USPQ 232 (1984)). Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu, as applied to claim 1, further in view of Hsiao (US 20220209049). With respect to Claim 11, Bour and Tansu do not teach wherein a thickness of the first active layer is different from a thickness of the second active layer. Hsiao teaches in Fig. 5, wherein a thickness of the first active layer (Fig. 5; 003; ¶ [0032]) is different from a thickness of the second active layer (Fig. 5; 007; ¶ [0048]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and Hsiao a semiconductor multi-junction LED with varying thicknesses in active layers. This combination produces a semiconductor device that can be configured to emit light having targeted wavelengths that are influenced by active layer thickness Hsiao (¶ [0032]). Claims 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu and Shur, as applied to claim 14, further in view of Pfeffer. With respect to Claim 15, Bour, Tansu and Shur do not teach further comprising a light conversion unit overlapping the semiconductor element along a normal direction of the circuit substrate. Pfeffer teaches in Fig 1, further comprising a light conversion unit overlapping the semiconductor element along a normal direction of the circuit substrate (Fig.1; 102; ¶ [0023]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Shur a light emitting semiconductor device comprised of a substrate with one or more devices and Pfeffer a semiconductor structure with microLEDs and a light conversion unit overlapping the semiconductor element along a normal direction of the circuit substrate. This would produce a semiconductor device with light conversion units connect to semiconductor elements so the semiconductor elements can drive the light conversion units Pfeffer (¶ [0023]). With respect to Claim 16, Bour, Tansu and Shur do not teach further comprising a color filter unit overlapping the semiconductor element along a normal direction of the circuit substrate. Pfeffer teaches in 1 [0087], further comprising a color filter unit overlapping the semiconductor element along a normal direction of the circuit substrate. (Fig 1; Fig 9; 924; ¶ [0087]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Shur a light emitting semiconductor device a substrate with one or more devices and Pfeffer a semiconductor structure with microLEDs and color filters. This would produce a semiconductor device that can render light to produce a specific image using colors Pfeffer (¶ [0087]). With respect to Claim 17, Bour, Tansu and Shur do not teach comprises alternately stacked first lower reflection unit layers and second lower reflection unit layers to form a plurality of sets of lower reflection unit stack layers, and the lower reflection unit stack layer comprises alternately stacked doped nano-porous semiconductor layers and undoped non-porous semiconductor layers to form a nano-porous Bragg reflector. Pfeffer teaches in Fig. 3B alternately stacked first lower reflection unit layers and second lower reflection unit layers to form a plurality of sets of lower reflection unit stack layers (Fig. 3B; 302c; ¶ [0123] ¶ [0043]), and the lower reflection unit stack layer comprises alternately stacked doped nano-porous semiconductor layers and undoped non-porous semiconductor layers to form a nano-porous Bragg reflector (Fig. 3B; 302c; ¶ [0043]). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Shur a light emitting semiconductor device a substrate with one or more devices and Pfeffer explaining the stacking order of the reflection units. This combination would produce a semiconductor device with a reflection unit having alternately stacked doped nano-porous semiconductor layers and undoped non-porous semiconductor layers to form a nano-porous Bragg reflector stacked layers that contain embedded voids that scatter light effectively Pfeffer (¶ [0043]). Claims 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Bour in view of Tansu and Shur, as applied to claim 14, further in view of Haberem (US 10797201). With respect to Claim 19, Bour and Tansu and Shur do not teaches wherein the two semiconductor elements are electrically connected in series. Haberem teaches in Column 3, wherein the two semiconductor elements are electrically connected in series. (Column 3 Line 60-63). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Shur a light emitting semiconductor device a substrate with one or more devices and Haberem a monolithic LED chip with semiconductor elements connected ins series. This combination would produce a microchip with multiple semiconductor elements connected in series to arrange the active areas in close proximity such that space between adjacent ones of the active areas is substantially not visible when the emitter is emitting, thereby allowing the chip to emit light similar to that of a filament Haberem(Column 3 Line 65-67 and Column 4 Line1-2). With respect to Claim 20, Bour, Tansu and Shur do not teach wherein the two semiconductor elements are electrically connected in parallel. Haberem teach in Column 3, wherein the two semiconductor elements are electrically connected in parallel (Column 3 Line 63-65). It would be obvious to one with ordinary skill in the art before the effective filing date to combine the invention of Bour and Tansu, a light-emitting device with two reflector units, an optical cavity and a quantum well structure and of Shur a light emitting semiconductor device a substrate with one or more devices and Haberem a monolithic LED chip with semiconductor elements connected in parallel. This combination would produce a microchip with multiple semiconductor elements collected in parallel to arrange the active areas in close proximity such that space between adjacent ones of the active areas is substantially not visible when the emitter is emitting, thereby allowing the chip to emit light similar to that of a filament Haberem (Column 3 Line 65-67 and Column 4 Line1-2). Response to Arguments Applicant’s arguments with respect to claims 1 and 18 have been considered but are moot in light of the new grounds of rejection set forth above. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU-HSI DAVID SUN whose telephone number is (571)270-5773. The examiner can normally be reached Mon-Fri 8am-4pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YU-HSI D SUN/ Primary Examiner, Art Unit 2817
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Prosecution Timeline

Dec 10, 2023
Application Filed
Feb 20, 2026
Non-Final Rejection (signed) — §103
Mar 24, 2026
Non-Final Rejection mailed — §103
Jun 24, 2026
Response Filed
Aug 25, 2026
Final Rejection mailed — §103 (current)

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3-4
Expected OA Rounds
78%
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86%
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2y 8m (~0m remaining)
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