Prosecution Insights
Last updated: April 19, 2026
Application No. 18/534,829

DISPLAY DEVICE

Non-Final OA §102§103
Filed
Dec 11, 2023
Examiner
TANG, ALICE W
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
LG Display Co., Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
2y 10m
To Grant
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allow Rate
9 granted / 10 resolved
+22.0% vs TC avg
Strong +20% interview lift
Without
With
+20.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
38 currently pending
Career history
48
Total Applications
across all art units

Statute-Specific Performance

§103
49.2%
+9.2% vs TC avg
§102
29.2%
-10.8% vs TC avg
§112
20.5%
-19.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 10 resolved cases

Office Action

§102 §103
DETAILED ACTION This Office action responds to the patent application no. 18/534,829 filed on December 11, 2023. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Drawings The drawings are objected to under 37 CFR 1.83(a) because they fail to show line V-V' in FIG. 4A as described in the paragraphs (¶) [0028] and [0080] of the specification and “buffer layer 111 is disposed on the plurality of high-potential power lines VDD, the plurality of data lines DL, the plurality of reference lines RL” as described in the ¶ [0097]. Any structural detail that is essential for a proper understanding of the disclosed invention should be shown in the drawing. MPEP § 608.02(d). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: The reference character, “AN” in FIG. 4A is not mentioned in the description. Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Specification The spacing of the lines of the specification is such as to make reading difficult. New application papers with lines 1 1/2 or double spaced (see 37 CFR 1.52(b)(2)) on good quality paper are required. The disclosure is objected to because of the following informalities: The buffer layer 111 only is disposed on the light-blocking layer (LS) and the insulating layer (IN) and is NOT “disposed on the plurality of high-potential power lines VDD, the plurality of data DL, the plurality of reference lines RL” as described in ¶ [0097]. ITO and IZO are provided as examples of conductive material having a high work function for the anode 121 in ¶ [00138] and ITO and IZO are provided as examples of conductive material having a low work function for the cathode 123 in ¶ [00141]. Are ITO and IZO high work function or low work function for this invention? Appropriate correction is required. Claim Objections Claim 6 is objected to because of the following informalities: It is missing “of” between “more indium”. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 15 is rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Shimmoto et al. (Shimmoto hereinafter) (US 2008/0050893). Regarding Claim 15: Shimmoto (see FIGs. 2, 5B, and10) teaches a display device comprising: a substrate comprising a light-emitting area DA, and a circuit area in which a drive circuit DR1/DR2 for operating a light-emitting element is disposed, wherein the substrate comprises: a plurality of first substrate patterns 703a overlapping with a part of the light-emitting area and a part of the circuit area; a second substrate pattern 704a overlapping with the circuit area and made of a material different from a material of the plurality of first substrate patterns. Shimmoto (see ¶ [0067], [0064], [0025]) teaches “the semiconductor layer of the TFT device for each of the pixels in the display region DA is formed of a hydrogenated amorphous silicon (a-Si:H) and the semiconductor layer of the semiconductor devices of the first driving circuit DRV1 and the second driving circuit DRV2 are formed of a polycrystal silicon”; the driving circuits on two sides of the DA; and a plurality of scanning signal lines GL and a plurality of video signal lines DL and the TFT device having a gate, drain, and a source; “the second step conducts irradiation of a first continuous oscillation laser only to the region of forming the driving circuit and the peripheral region thereof at the outside of the display region”. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3 and 10-14 are rejected under 35 U.S.C. 103 as being unpatentable over Shimmoto et al. (Shimmoto hereinafter) (US 2008/0050893) in view of Kwon (US 2023/0074232). Regarding Claims 1-3 and 10-14: Shimmoto (see FIGs. 2, 5B, and10) teaches {1} a display device comprising: a substrate 10 including a plurality of DA in which a light-emitting element is disposed, and a circuit area in which a drive circuit DR1/DR2 for operating the light-emitting element is disposed, wherein the substrate comprises a plurality of first substrate patterns 703a disposed to correspond to the light-emitting area, and a second substrate pattern 704a disposed to correspond to the circuit area, and wherein the plurality of first substrate patterns are made of different materials from the second substrate pattern; {2} a width of each of the plurality of first substrate patterns is equal to or larger than a width of the light-emitting area; {3} the plurality of first substrate patterns comprises: a first pattern overlapping with the light-emitting area; and a second pattern connected with the first pattern and disposed at a portion adjacent to the second substrate pattern, and wherein at least a part of the second pattern overlaps with the circuit area; and {14} the second substrate pattern surrounds the plurality of first substrate patterns. Shimmoto (see ¶ [0067], [0064], [0025]) teaches “the semiconductor layer of the TFT device for each of the pixels in the display region DA is formed of a hydrogenated amorphous silicon (a-Si:H) and the semiconductor layer of the semiconductor devices of the first driving circuit DRV1 and the second driving circuit DRV2 are formed of a polycrystal silicon”; the driving circuits on two sides of the DA; and a plurality of scanning signal lines GL and a plurality of video signal lines DL and the TFT device having a gate, drain, and a source; “the second step conducts irradiation of a first continuous oscillation laser only to the region of forming the driving circuit and the peripheral region thereof at the outside of the display region”. However, Shimmoto does not explicitly teach {1} subpixels; {10} an insulation layer above the substrate; {11} the insulation layer comprises inorganic material and is disposed on the plurality of first substrate patterns and the second substrate pattern; {12} a film member under the substrate; and {13} the film member comprises at least one of a polarizing plate and a barrier film. Kwon (see FIG. 10 and ¶ [0163], [0096], [0100], [0133], [0144]. [0172]) teaches a display device comprising “a plurality of third patterns PTN3 may be disposed only in the emission area EA … and the circuit area CA in each of the plurality of subpixels SP … the shape and size of the third patterns PTN3 may be substantially the same as the shape and size of the emission area EA on a plane”; a buffer layer 111 and a gate insulating layer 112 and a passivation layer 113 “may be formed of a single layer or a multiplayer of silicon oxide (SiOx) or silicon nitride (SiNx)”; a polarizing plate 150 below the patterns PTN1-PTN3; “a barrier film may be disposed together with the polarization plate 150 under the lower substrate 110”; and “non-display area NA is an area surrounding the display area AA”. It would have been obvious to a person of ordinarily skilled in the art before the effective filing date of the instant invention to modify the teaching of Shimmoto et al. to further include the teaching of Kwon to apply to newer technology development, such as subpixels instead of just pixels; to slightly enlarge the polycrystal silicon coverage to the display area DA as long as the enlargement does not impact the functionality of the DA; to form additional inorganic insulating layer above the patterned substrate to isolate the various signal lines and electrodes; to form additional layers underneath the patterned substrate to selectively transmit light to reduce reflection of external light incident to the substrate and to minimize moisture and oxygen entering into the substrate. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Shimmoto et al. (Shimmoto hereinafter) (US 2008/0050893) as applied to claim 15 above, and further in view of Kwon (US 2023/0074232). Regarding Claim 20: Shimmoto does not explicitly teach an insulation layer above the substrate. Kwon (see FIG. 10 and ¶ [0096], [0100], [0133]) teaches a display device comprising a buffer layer 111 and a gate insulating layer 112 and a passivation layer 113 “may be formed of a single layer or a multiplayer of silicon oxide (SiOx) or silicon nitride (SiNx)”. It would have been obvious to a person of ordinarily skilled in the art before the effective filing date of the instant invention to modify the teaching of Shimmoto et al. to further include the teaching of Kwon to form additional inorganic insulating layer above the patterned substrate to isolate the various signal lines and electrodes. Allowable Subject Matter Claims 4-9 and 16-19 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Correspondence Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALICE W TANG whose telephone number is (571)272-7227. The examiner can normally be reached Monday-Friday: 8:30 am to 5 pm.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached at (571)272-1705. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALICE W TANG/Examiner, Art Unit 2814 /WAEL M FAHMY/Supervisory Patent Examiner, Art Unit 2814
Read full office action

Prosecution Timeline

Dec 11, 2023
Application Filed
Jan 31, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12599045
SENSOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THREROF
2y 5m to grant Granted Apr 07, 2026
Study what changed to get past this examiner. Based on 1 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+20.0%)
2y 10m
Median Time to Grant
Low
PTA Risk
Based on 10 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month