Prosecution Insights
Last updated: April 19, 2026
Application No. 18/535,159

SYSTEM AND METHOD OF FINDING PIXEL-TO-DESIGN TARGET FOR DRAM INSPECTION

Non-Final OA §103
Filed
Dec 11, 2023
Examiner
CONNER, SEAN M
Art Unit
2663
Tech Center
2600 — Communications
Assignee
Kla Corporation
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
357 granted / 454 resolved
+16.6% vs TC avg
Strong +27% interview lift
Without
With
+27.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
22 currently pending
Career history
476
Total Applications
across all art units

Statute-Specific Performance

§101
11.5%
-28.5% vs TC avg
§103
47.9%
+7.9% vs TC avg
§102
12.0%
-28.0% vs TC avg
§112
21.1%
-18.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 454 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-34, all the claims pending in the application, are rejected. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-2, 11-14, 23-25, and 34 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Patent Application Publication No. 2021/0256675 to Nie et al. (hereinafter “Nie”) in view of U.S. Patent Application Publication No. 2023/0326279 to Di Venuto Dayer (hereinafter “Di Venuto Dayer”). As to independent claim 1, Nie discloses a method for pixel-to-design alignment for inspection of a dynamic random access memory wafer (Abstract and [0001-0008] discloses that Nie is directed to “detecting defects” in “the semiconductor arts”, and more specifically to “wafer inspection” of “DRAM cell regions” using “pixel to design alignment (“PDA”)), the method comprising: receiving an input frame from an inspection sub-system ([0053] discloses a computer subsystem 124 configured to receive images of a specimen from “the inspection subsystem shown in Fig. 1a”); calculating a one-dimensional projection profile based on the input frame along at least one of a first direction or a second direction ([0064-0074] discloses that the computer subsystem performs “image projection” on the acquired frame image in “first and second dimensions orthogonal to each other on the specimen” – namely, “the x and y directions” – by “projecting a line or swath of pixels onto the horizontal or vertical axis”; see 602a and 602b of Fig. 6); calculating a local range for at least a portion of the one-dimensional projection profile along at least one of the first direction or the second direction ([0064-0074] discloses identifying “peaks” in the respective plots in each direction; see 604 of Fig. 6); determining one or more threshold values based on at least one characteristic of the input frame along at least one of the first direction or the second direction, wherein the one or more threshold values are configured to segment the local range into two or more distinct regions ([0064-0074] discloses that “the center may be determined at multiple positions across the height of a peak, which may then be combined in some manner, e.g., by finding a mean or median of the different center positions, to find an overall center of the peak and thus the page break center in this direction”, wherein the determined center of the peak is a threshold which divides the peak into two distinct regions – one above the center and one below; see center line in 604 of Fig. 6); identifying one or more conjunction locations of two or more non-repeating patterns based on the two or more distinct regions ([0064-0074] discloses “determining a first center of the page break along a first dimension…and determining a second center of the page break along a second dimension of the page break orthogonal to the first dimension”, thus identifying “an intersection of the page break in the two dimensions” which is “much like a cross target, which are the best alignment candidates in the images”; notably, [0008, 0058] discloses that the “non-repeating page break region…separates cell regions…include[ing] repeating patterned features”; that is, the page break regions for which the conjunction locations are determined are non-repeating patterns); and obtaining a location for one or more pixel-to-design alignment targets based on the one or more conjunction locations ([0064-0074] discloses that “the page break center is used as an anchor point (or alignment target) to calculate the offset between specimen images and design for alignment purposes”). Nie does not expressly disclose applying a bandpass filter to the input frame to generate a band-passed image based on which the one-dimensional projection profile is calculated. Di Venuto Dayer, like Nie, is directed to an “inspection process” of an object by “comparing some object images with reference images”, wherein the inspection process involves “a 1D profile corresponding to the sum of color intensity along each line” (Abstract, [0190, 0197-0198, 0264]). As a “preprocessing” step to the 1D profile calculation, Di Venuto Dayer discloses that the image may be “band-pass” filtered ([0253]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Nie to bandpass filter the input image prior to calculating the 1D profiles, as taught by Di Venuto Dayer, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have “remove[d] macroscopic color variations across the image and which are not significant”, thus “enhanc[ing] the desired surface structure and remov[ing] unwanted elements” ([0230, 0253] of Di Venuto Dayer). As to claim 2, Nie as modified above further teaches determining one or more care areas based on the one or more pixel-to-design alignment targets ([0071-0075] of Nie discloses that “images are aligned with design based on page break center locations in design and specimen images, which enables substantially accurate placement of design-based care areas”), wherein the one or more care areas represent one or more regions of interest of the dynamic random access memory wafer ([0025-0029] of Nie discloses that “embodiments are described herein with respect to dynamic random access memory (DRAM) devices”, wherein the “specimen is a wafer”). As to claim 11, Nie as modified above further teaches that the first direction comprises an x-direction and the second direction comprises a y-direction perpendicular to the x-direction ([0064-0074] of Nie discloses that the computer subsystem performs “image projection” on the acquired frame image in “first and second dimensions orthogonal to each other on the specimen” – namely, “the x and y directions” – by “projecting a line or swath of pixels onto the horizontal or vertical axis”; see 602a and 602b of Fig. 6). As to independent claim 12, Nie discloses a system for pixel-to-design alignment for inspection of a dynamic random access memory wafer (Abstract and [0001-0008] discloses that Nie is directed to “detecting defects” in “the semiconductor arts”, and more specifically to “wafer inspection” of “DRAM cell regions” using “pixel to design alignment (“PDA”)), comprising: an inspection sub-system ([0030-0048] discloses “inspection subsystem 100” shown in Fig. 1) comprising: an illumination source configured to generate illumination directed toward the dynamic random access memory wafer, wherein the illumination interacts with a surface of the dynamic random access memory wafer ([0032] discloses an “illumination subsystem configured to direct light to specimen 14”; [0025-0027] discloses that the specimen for inspection is a DRAM; [0041] discloses that the illumination is scattered at “the specimen surface”); and a detector configured to detect the illumination reflected from the surface of the dynamic random access memory wafer ([0039-0043] discloses “detector 28…and detector 34” which is “configured to collect and detect light at scattering angle(s) that are at or close to normal to the specimen surface” ; [0025-0027] discloses that the specimen for inspection is a DRAM); and a controller comprising one or more processors configured to execute program instructions stored in memory, wherein the program instructions are configured to cause the one or more processors ([0045-0046] discloses “computer subsystem 36 may be coupled to the detectors of the inspection subsystem”, wherein the computer subsystem include “one or more processors, which executes instructions from a memory medium” to cause the processor to perform the disclosed algorithm) to perform the steps recited in independent claim 1. Accordingly, claim 12 is rejected for the above reasons and for reasons analogous to those discussed above in conjunction with claim 1, including the reasons for combining the Nie and Di Venuto Dayer references. As to claim 13, Nie as modified above further teaches that the inspection sub-system comprises a broadband plasma inspection sub-system and the illumination source comprises a broadband plasma light source ([0036] of Nie discloses that “Light source 16 may include a broadband plasma (BBP) light source”; accordingly, the inspection sub-system comprising the BBP light source is a BBP inspection sub-system). Claims 14 and 23 recite features nearly identical to those recited in claims 2 and 11, respectively. Accordingly, claims 14 and 23 are rejected for reasons analogous to those discussed above in conjunction with claims 2 and 11, respectively. Independent claim 24 recites a system for pixel-to-design alignment for inspection of a dynamic random access memory wafer comprising: a controller comprising one or more processors configured to execute program instructions stored in memory, wherein the program instructions are configured to cause the one or more processors ([0045-0046] discloses “computer subsystem 36” which includes “one or more processors, which executes instructions from a memory medium” to cause the processor to perform the disclosed algorithm) to perform the steps recited in independent claim 1. Accordingly, claim 24 is rejected for the above reasons and for reasons analogous to those discussed above in conjunction with claim 1, including the reasons for combining the Nie and Di Venuto Dayer references. Claims 25 and 34 recite features nearly identical to those recited in claims 2 and 11, respectively. Accordingly, claims 25 and 34 are rejected for reasons analogous to those discussed above in conjunction with claims 2 and 11, respectively. Claims 3, 15, and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Nie in view of Di Venuto Dayer and further in view of International Application No. WO96/18158 to Surka (hereinafter “Surka”). As to claim 3, Nie as modified above does not expressly disclose that calculating the local range comprises subtracting a maximum intensity value from a minimum intensity value within a window of the one- dimensional projection profile, wherein the window is defined by a predetermined pixel width along at least one of the first direction or the second direction. Surka, like Nie, is directed to analyzing a “peak” in a 1D intensity projection of an image (pages 46-52 and Fig. 11). Specifically, Surka discloses sliding a window 32 pixels wide along the projection image and “subtracting the maximum value (Maxwιn) in the window from the minimum value in the window (Minwιn) and dividing this amount by the maximum of the dynamic range” (page 50). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the proposed combination of Nie and Di Venuto Dayer to calculate a maximum value minus a minimum value of pixels in a fixed-width sliding window along the 1D projection, as taught by Surka, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have increased the accuracy of identifying the peaks in the projection, as desired by Nie ([0068]). Specifically, “‘stretching’ the projection signal so that it extends along its entire dynamic range” would have facilitated “calculating the areas of a plurality of regions described by the projection signal” (p. 49-51 of Surka). Claims 15 and 26 each recite features nearly identical to those recited in claim 3. Accordingly, claims 15 and 26 are rejected for reasons analogous to those discussed above in conjunction with claim 3. Claims 4-10, 16-22, and 27-33 are rejected under 35 U.S.C. 103 as being unpatentable over Nie in view of Di Venuto Dayer and further in view of U.S. Patent Application Publication No. 2022/0207682 to Koronel et al. (hereinafter “Koronel”). As to claim 4, Nie as modified above further teaches that a region of the two or more distinct regions exceeding the one or more threshold values indicates a position of at least one of a non-repeating region of the DRAM ([0005-0006, 0025-0027, 0064-0074] of Nie discloses that the specimen for inspection is a DRAM that includes repeating cell regions and non-repeating “random” or “logic areas” therebetween which correspond to the “spaces between the areas containing repeating patterns in the setup image as the page break targets”, the centers of which are delineated as a threshold and are detected in the analysis detailed above in the mapping of claim 1). However, Nie does not expressly disclose that these non-repeating random/logic areas are a sense amplifier or a sub-word line driver. Koronel, like Nie, is directed to inspecting a DRAM by aligning an inspection image with design data, wherein an inspection unit or area 512 includes cell area 514 which is “repetitive”, horizontal logic area 516, vertical logic area 518, and an intersection area 520, wherein “the non-cell areas (e.g., the horizontal areas and/or the vertical areas)…are not repetitive” (Abstract, [0050, 0074, 0078-0087]; see 512 of Fig. 5). Notably, Koronel’s horizontal logic area 516, vertical logic area 518, and intersection area 520 of the DRAM under inspection are respectively analogous to Nie’s vertical and horizontal “logic areas”/“page breaks” between cells and the “page break intersection” areas therebetween of the DRAM under inspection (See Fig. 5 of Koronel and Fig. 6 of Nie, portions of which are reproduced and annotated below). Koronel specifies that the horizontal logic area 516 is a “Sense Amplifier (SA)” of the DRAM and the vertical logic area 518 is a “Sub Word-line Driver (SWD)” of the DRAM ([0079]). PNG media_image1.png 570 844 media_image1.png Greyscale It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the proposed combination of Nie and Di Venuto Dayer such that the horizontal logic areas between cells are Sense Amplifiers and the vertical logic areas between cells are Sub Word Line Drivers of the DRAM, as taught by Koronel, to arrive at the claimed invention discussed above. Such a modification is the result of simple substitution of one known element for another producing a predictable result. In particular, Nie’s generically described vertical and horizontal logic areas and Koronel’s specific vertical Sub Word-line driver and horizontal Sense Amplifier in respective logic areas perform the same general and predictable function, the predictable function being to control the DRAM. In the context of the inspection systems of both references, these logic areas serve as reference areas for the cells that exist therebetween which are the actual objects of inspection on the DRAM. Since each individual element and its function are shown in the prior art, albeit shown in separate references, the difference between the claimed subject matter and the prior art rests not on any individual element or function but in the very combination itself - that is in the substitution of Nie’s generically described vertical and horizontal logic areas by replacing them with Koronel’s specific vertical Sub Word-line driver and horizontal Sense Amplifier in respective logic areas. Thus, the simple substitution of one known element for another producing a predictable result renders the claim obvious. As to claim 5, Nie as modified above further teaches that the one or more conjunction locations are defined as an intersection point of the sense amplifier and the sub-word line driver ([0027, 0066-0068] of Nie discloses that “a center of the page break portion extending in the x direction and a center of the page break portion extending in the y direction” are determined and “used to determine a center of the intersection of the page break” such that the “cross target” of the “logic regions”/“page breaks” are used as alignment targets; [0079] of Koronel specifies that the horizontal logic area 516 is a “Sense Amplifier (SA)” of the DRAM and the vertical logic area 518 is a “Sub Word-line Driver (SWD)” of the DRAM, wherein the SA 516 and SWD 518 meet at intersection area 520; the reasons for combining the references are the same as those discussed above in conjunction with claim 4). As to claim 6, Nie as modified by Di Venuto Dayer does not expressly disclose that one of the one or more pixel-to-design alignment targets is configured to cover a first cell boundary and a second cell boundary between the sense amplifier and a cell. However, Koronel discloses that one of the one or more pixel-to-design alignment targets is configured to cover a first cell boundary and a second cell boundary between the sense amplifier and a cell ([0073-0086] of Koronel discloses an inspection unit area 512 (reproduced above in the rejection of claim 4) including horizontal logic area Sense Amplifier 516 and boundaries of cells 514 on either side thereof). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the proposed combination of Nie and Di Venuto Dayer to set the inspection area to include an entirety of a cell, adjacent Sense Amplifier, Sub Word-Line Driver, intersection area, and portions of cells opposite the adjacent Sense Amplifier and Sub Word-Line Driver, as taught by Koronel, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have improved inspection target accuracy by leveraging the “repetitive” nature of the “big cell” region 512 for inspection despite elements therein (516, 518, and 520) being “not repetitive within the region itself” ([0092] of Koronel). As to claim 7, Nie as modified by Di Venuto Dayer does not expressly disclose that one of the one or more pixel-to-design alignment targets is configured to cover a first cell boundary and a second cell boundary between the sub-word line driver and a cell. However, Koronel discloses that one of the one or more pixel-to-design alignment targets is configured to cover a first cell boundary and a second cell boundary between the sub-word line driver and a cell ([0073-0086] of Koronel discloses an inspection unit area 512 (reproduced above in the rejection of claim 4) including vertical logic area Sub Word-line Driver 518 and boundaries of cells 514 on either side thereof). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the proposed combination of Nie and Di Venuto Dayer to set the inspection area to include an entirety of a cell, adjacent Sense Amplifier, Sub Word-Line Driver, intersection area, and portions of cells opposite the adjacent Sense Amplifier and Sub Word-Line Driver, as taught by Koronel, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have improved inspection target accuracy by leveraging the “repetitive” nature of the “big cell” region 512 for inspection despite elements therein (516, 518, and 520) being “not repetitive within the region itself” ([0092] of Koronel). As to claim 8, Nie does not expressly disclose that one of the one or more pixel-to-design alignment targets is rejected when only a single cell boundary is covered between at least one of the sense amplifier or the sub-word line driver and a cell. However, Koronel discloses that one of the one or more pixel-to-design alignment targets is rejected when only a single cell boundary is covered between at least one of the sense amplifier or the sub-word line driver and a cell ([0073-0086] discloses that all inspection unit areas are required to include the “big cell” comprising an entirety of each of a cell 514, adjacent Sense Amplifier 516, Sub Word-Line Driver 518, and intersection area 520, as well as an additional cell boundary opposite the adjacent Sense Amplifier 516 and another additional cell boundary opposite the Sub Word-Line Driver 518; see Fig. 5; thus, an alignment target that includes only a single cell boundary would necessarily be rejected). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the proposed combination of Nie and Di Venuto Dayer to set the inspection area to include an entirety of a cell, adjacent Sense Amplifier, Sub Word-Line Driver, intersection area, and portions of cells opposite the adjacent Sense Amplifier and Sub Word-Line Driver, such that areas with a single cell boundary are rejected, as taught by Koronel, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have improved inspection target accuracy by leveraging the “repetitive” nature of the “big cell” region 512 for inspection despite elements therein (516, 518, and 520) being “not repetitive within the region itself” ([0092] of Koronel). As to claim 9, Nie as modified above does not expressly disclose that one of the one or more pixel-to-design alignment targets is configured to cover one of the one or more conjunction locations of the dynamic random access memory wafer in its entirety. However, Koronel discloses that one of the one or more pixel-to-design alignment targets is configured to cover one of the one or more conjunction locations of the dynamic random access memory wafer in its entirety ([0073-0086] of Koronel discloses an inspection unit area 512 (reproduced above in the rejection of claim 4) including intersection area 520 in its entirety; see Fig. 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the proposed combination of Nie and Di Venuto Dayer to set the inspection area to include an entirety of a cell, adjacent Sense Amplifier, Sub Word-Line Driver, and intersection area, as taught by Koronel, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have improved inspection target accuracy by leveraging the “repetitive” nature of the “big cell” region 512 for inspection despite elements therein (516, 518, and 520) being “not repetitive within the region itself” ([0092] of Koronel). As to claim 10, Nie as modified above does not expressly disclose that obtaining one of the one or more pixel-to-design alignment targets comprises determining one or more symmetric edges around the one or more conjunction locations. However, Koronel discloses that obtaining one of the one or more pixel-to-design alignment targets comprises determining one or more symmetric edges around the one or more conjunction locations (Fig. 5 and [0073-0086] of Koronel discloses an inspection unit area 512 (reproduced above in the rejection of claim 4) including symmetric cell boundaries on either side of horizontal logic area 516 and another set of symmetric cell boundaries on either side vertical logic area 518). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the proposed combination of Nie and Di Venuto Dayer to set the inspection area to include an entirety of a cell, adjacent Sense Amplifier, Sub Word-Line Driver, and intersection area, such that edges of the cells around the intersection area are symmetric, as taught by Koronel, to arrive at the claimed invention discussed above. Such a modification is the result of combining prior art elements according to known methods to yield predictable results. It is predictable that the proposed modification would have improved inspection target accuracy by leveraging the “repetitive” nature of the “big cell” region 512 for inspection despite elements therein (516, 518, and 520) being “not repetitive within the region itself” ([0092] of Koronel). Claims 16-22 recite features nearly identical to those recited in claims 4-10, respectively. Accordingly, claims 16-22 are rejected for reasons analogous to those discussed above in conjunction with claims 4-10, respectively. Claims 27-33 recite features nearly identical to those recited in claims 4-10, respectively. Accordingly, claims 27-33 are rejected for reasons analogous to those discussed above in conjunction with claims 4-10, respectively. Pertinent Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kumar (U.S. Patent Application Publication No. 2019/0362489) is directed to semiconductor inspection using pixel-to-design alignment based on x and y direction 1D profiles. Kumar also contemplates bandpass filtering the inspection images. Each of these teachings is relevant to the independent claims of the subject application. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SEAN M CONNER whose telephone number is (571)272-1486. The examiner can normally be reached 10 AM - 6 PM Monday through Friday, and some Saturday afternoons. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Greg Morse can be reached at (571) 272-3838. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SEAN M CONNER/Primary Examiner, Art Unit 2663
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Prosecution Timeline

Dec 11, 2023
Application Filed
Jan 07, 2026
Non-Final Rejection — §103 (current)

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